CN104795087B - sense amplifier and memory for reading data - Google Patents

sense amplifier and memory for reading data Download PDF

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Publication number
CN104795087B
CN104795087B CN201410027809.3A CN201410027809A CN104795087B CN 104795087 B CN104795087 B CN 104795087B CN 201410027809 A CN201410027809 A CN 201410027809A CN 104795087 B CN104795087 B CN 104795087B
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China
Prior art keywords
memory cell
control signal
sense amplifier
current branch
signal
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CN201410027809.3A
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Chinese (zh)
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CN104795087A (en
Inventor
杨翼
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中芯国际集成电路制造(上海)有限公司
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Publication of CN104795087A publication Critical patent/CN104795087A/en
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Abstract

The present invention provides a kind of sense amplifier and memory for being used to read data.Wherein, the sense amplifier at least includes:The first current branch comprising the memory cell continued including multiple the second current branch, the 3rd control signals by keyholed back plate provide circuit and comparator;Wherein, the memory cell continued is chosen by the first control signal and the second control signal, 3rd control signal provides circuit based on the first control signal and the second control signal to provide control the multiple the 3rd control signal by keyholed back plate, so that the electric current of the second current branch and the current in proportion of first current branch;Comparator is used to export after the difference that the voltage drop of the memory cell continued and the second current branch relevant voltage drop is amplified.Corresponding memory can be built based on above-mentioned sense amplifier.Advantages of the present invention includes:With larger read voltage dynamic range, and by technique, supply voltage and temperature(PVT)Influence it is smaller.

Description

Sense amplifier and memory for reading data

Technical field

The present invention relates to storage circuit field, more particularly to a kind of sense amplifier and storage for being used to read data Device.

Background technology

Sense amplifier(Sense amplifier, SA)It is the important component in memory, for reading in memory The data that each memory cell is stored.Different types of memory, the structure of the sense amplifier each used is not fully It is identical.

For example, in 201110211607.0 pairs of Chinese Patent Application Publications of Application No., disclosing one kind and being applied to SRAM sense amplifier.Wherein, the memory cell in SRAM is configured using six transistors, when carrying out digital independent, SRAM Respective memory unit export a pair of complementary signals respectively on bit line BL and BLb, sense amplifier is carried out to the complementary signal Exported after differential amplification.In order to improve the speed of sense amplifier, the sense amplifier employs cross-coupled circuit, tail current Transistor and output stage, and the source electrode connection negative level of tail current transistor.

In another example, in Application No. 201210306027.4, in Chinese patent literature, disclosing, a kind of Flash is sensitive to be put Big device, the sense amplifier includes:Reference voltage generating circuit, reference cell array bit line, on memory cell array bit line Capacitive load enter the pre-charge circuit, current amplifier circuit and comparator of line precharge, wherein, current amplifier electricity The reference voltage signal amplification that road is exported according to reference voltage generating circuit flows through the storage list in Flash memory cell array The electric current of member and the reference unit in reference cell array;Comparator is used for amplifying and storage unit array bitline and reference unit battle array Voltage signal on row bit line.

For another example in the Chinese patent literature of Application No. 201110372015.7, disclosing a kind of applied to non-easy The property lost memory(NVM)Sense amplifier.The sense amplifier has reference current branch road and all the way memory cell current all the way Branch road, " 0 " or " 1 " signal is exported by comparing the two paths of signals.

All it is by corresponding relatively to export to reference arm although above-mentioned each sensitive amplifier structure is different " 0 " or " 1 " signal.And in the sense amplifier at some using current source to provide reference current to reference arm, due to The bias voltage that the current source is used is normally from bandgap voltage reference or directly uses external supply voltage conduct Its bias voltage, the bias voltage that each memory cell is used during different from read operation, due to the error of two bias voltage Scope has differences, moreover, bandgap voltage reference or external supply voltage are easily by technique, temperature and temperature(I.e. PVT)Influence, therefore, easily influence digital independent precision;Therefore need to enter the sensitive amplifier structure of existing this type Row is improved.

The content of the invention

The shortcoming of prior art in view of the above, big it is an object of the invention to provide a kind of read voltage dynamic range Sense amplifier for reading the signal that memory cell is stored.

Another object of the present invention is to provide a kind of by technique, supply voltage and temperature to be influenceed less memory.

In order to achieve the above objects and other related objects, the present invention provides a kind of for reading the letter that memory cell is stored Number sense amplifier, it at least includes:

The first current branch comprising the memory cell continued, wherein, the memory cell continued is believed by the first control Number and second control signal choose;

Second current branch, it includes multiple by keyholed back plate;

3rd control signal provides circuit, and it is described many that it provides control based on the first control signal and the second control signal Individual the 3rd control signal by keyholed back plate so that the electric current of the electric current of second current branch and first current branch into than Example;

Comparator, one input connects first current branch, another input and connects the second electric current branch Road, for the difference that the voltage drop of the memory cell continued and the second current branch relevant voltage drop to be given after amplification Output.

Preferably, the quantity by keyholed back plate that second current branch includes based on memory cell included by keyholed back plate Quantity is determined;It is further preferable that second current branch also includes the isolated tube controlled by isolation signals.

Preferably, the 3rd control signal provides circuit and included:The first of partial pressure is carried out to first control signal Bleeder circuit and the second bleeder circuit that partial pressure is carried out to second control signal;It is further preferable that the first partial pressure electricity Road is resistor voltage divider circuit;Second bleeder circuit is also resistor voltage divider circuit.

Preferably, the circuit that memory cell is used includes the first metal-oxide-semiconductor controlled by the first control signal and connection should First metal-oxide-semiconductor and the second metal-oxide-semiconductor controlled by the second control signal;It is further preferable that memory cell also includes by isolation signals The isolated tube of control.

Preferably, the memory cell that the memory cell continued belongs in EEPROM.

The present invention a kind of memory is also provided, in the memory body comprising be previously used for read memory cell deposited The sense amplifier of the signal of storage.

As described above, the sense amplifier and memory that are used to read data of the present invention, have the advantages that:Tool There is larger read voltage dynamic range, and influenceed smaller by technique, supply voltage and temperature.

Brief description of the drawings

Fig. 1 is shown as the sense amplifier schematic diagram for being used to read the signal that memory cell is stored of the present invention.

The preferred circuit that Fig. 2 is shown as the sense amplifier for reading the signal that memory cell is stored of the present invention shows It is intended to.

Component label instructions

1 sense amplifier

11 first current branch

111 memory cell continued

12 second current branch

13 the 3rd control signals provide circuit

131 first bleeder circuits

132 second bleeder circuits

14 comparators

Embodiment

Embodiments of the present invention are illustrated by particular specific embodiment below, those skilled in the art can be by this explanation Content disclosed by book understands other advantages and effect of the present invention easily.

Fig. 1 is referred to Fig. 2.It should be clear that structure, ratio, size depicted in this specification institute accompanying drawings etc., is only used to Coordinate the content disclosed in specification, so that those skilled in the art is understood with reading, being not limited to the present invention can be real The qualifications applied, therefore do not have technical essential meaning, the tune of the modification of any structure, the change of proportionate relationship or size It is whole, in the case where not influenceing effect of the invention that can be generated and the purpose that can reach, all should still it fall in disclosed skill Art content is obtained in the range of covering.Meanwhile, in this specification it is cited as " on ", " under ", "left", "right", " centre " and The term of " one " etc., is merely convenient to understanding for narration, and is not used to limit enforceable scope of the invention, its relativeness It is altered or modified, under without essence change technology contents, when being also considered as enforceable category of the invention.

As illustrated, the present invention provides a kind of sense amplifier for being used to read the signal that memory cell is stored.The spirit Quick amplifier 1 at least includes:First current branch 11, the second current branch 12, the 3rd control signal provide circuit 13 and compared Device 14.

First current branch 11 includes the memory cell continued, wherein, the memory cell continued is by the first control Signal processed and the second control signal are chosen.

Wherein, the memory cell continued is not provided with referential array including any one or stores single with reference to bit line etc. Member;Preferably, the memory cell continued is electrically erasable ROM(Electrically Erasable Programmable ROM, EEPROM)In memory cell.

A kind of the first preferred current branch 11 is as shown in Fig. 2 first current branch includes the memory cell 111 continued And it is used as the NMOS tube N7 of switching tube.Wherein, the memory cell 111 include as the NMOS tube N1 of isolated tube, NMOS tube N2 and NMOS tube N3;NMOS tube N7 grid accesses the first control signal SG, drain electrode access supply voltage Vdd, source electrode connection NMOS tube N1 drain electrode;NMOS tube N1 grid access isolation signals A, the positive input of drain electrode connection comparator 13, source electrode connection NMOS tube N2 source electrode;NMOS tube N2 grid accesses the first control signal SG, drain electrode connection NMOS tube N3 drain electrode;NMOS tube N3 grid accesses the second control signal CG, source electrode connection low level VSS.It should be appreciated by those skilled in the art that the first control Signal SG and the second control signal CG is the memory cell continued that selection is currently needed for carrying out read operation in each memory cell.

Second current branch 12 includes multiple by keyholed back plate.

Preferably, the quantity by keyholed back plate that second current branch 12 includes based on memory cell included by keyholed back plate Quantity determine, for example, memory cell is included by the first control signal SG NMOS tube N2 controlled and by the second control signal CG control NMOS tube N3, then second current branch 12 include 2 by keyholed back plate.

A kind of the second preferred current branch is as shown in Fig. 2 second current branch includes the NMOS tube as switching tube N8, the NMOS tube N4 as isolated tube, it is used as the NMOS tube N5 and NMOS tube N6 by keyholed back plate.NMOS tube N4 and the storage list continued The structure and size of NMOS tube N1 in member 111 is identical, the NMOS tube N2 in NMOS tube N5 and the memory cell 111 continued Structure and size it is identical, the structure and size of the NMOS tube N3 in NMOS tube N6 and the memory cell 111 continued is complete It is identical;The structure and size of NMOS N7 pipes in NMOS tube N8 and the first current branch 11 are identical;NMOS tube N8 grid Connect the 3rd control circuit 13, drain electrode access supply voltage Vdd, source electrode connection NMOS tube N4 drain electrode;NMOS tube N4's Grid access isolation signals A, the reverse input end of drain electrode connection comparator 13, source electrode connection NMOS tube N5 source electrode;NMOS tube N5 grid connection the 3rd control circuit 13, drain electrode connection NMOS tube N6 drain electrode;NMOS tube N6 grid connection is described 3rd control circuit 13, source electrode connection low level VSS.

3rd control signal provides circuit 13 based on the first control signal and the second control signal to provide control institute Multiple the 3rd control signals by keyholed back plate are stated, so that the electric current of second current branch 12 and the electricity of first current branch Stream is proportional.

Wherein, the electric current of first current branch 11 is 1 times of the electric current of second current branch 12.

Preferably, the 3rd control signal provides circuit 13 and included:The of partial pressure is carried out to first control signal One bleeder circuit 131 and the second bleeder circuit 132 that partial pressure is carried out to second control signal.

A kind of the 3rd preferred control signal circuit is provided as shown in Fig. 2 the first bleeder circuit 131 include resistance R1 with R2, the second bleeder circuit 132 include resistance R3 and R4;Wherein, resistance R1 resistance is equal with resistance R2 resistance;Resistance R3's Resistance is equal with resistance R4 resistance;Resistance R1 one end connects the first control signal SG, other end connection resistance R2 and second The grid of NMOS tube N5 in current circuit 12 and NMOS tube N8 grid;Resistance R2 other end connection low level VSS;Resistance R3 one end connects the grid that the second control signal CG, the other end connect the resistance R4 and NMOS tube N6 in the second current circuit 12 Pole;Resistance R4 other end connection low level VSS.

The positive input of the comparator 14 accesses the memory cell 111 continued, reverse input end and connects the second electric current Branch road 12, output end VOUT are by corresponding electricity of the voltage drop of the memory cell 111 continued to second current branch 12 The difference of pressure drop is exported after being amplified.

The comparator 13 can be answered using any circuit that can be amplified differential signal, those skilled in the art This knows the internal structure of comparator, therefore will not be described in detail herein.

The course of work of above-mentioned sense amplifier 1 is as follows:

When entering the read operation of line storage unit, to continue when based on the first control signal SG and the second control signal CG Memory cell 111 be selected, that is, the first control signal SG is when being that high level, the second control signal CG are also high level, And isolation signals A be high level when, powered from supply voltage Vdd by NMOS tube N7 to the memory cell 111 continued, thus The positive input of comparator 13 produces read voltage;Supply voltage Vdd is formed by NMOS tube N8 in the second current branch 12 Reference current, so that the reverse input end in comparator 13 produces reference voltage;Because resistance R1 resistance is equal with R2 resistances, Resistance R3 resistance is equal with R4 resistances, therefore the signal that NMOS tube N5 and NMOS tube N8 grid is accessed is the first control signal SG 1/2, the signal of NMOS tube N6 grid access is the 1/2 of the second control signal CG;Again due to NMOS tube N7 and NMOS tube N8 Structure and size it is identical, and be switching tube, NMOS tube N1 is identical with NMOS tube N4 structure and size, NMOS Pipe N2 is identical with NMOS tube N5 structure and size, and NMOS tube N3 is identical with NMOS tube N6 structure and size, therefore The electric current of first current branch 11 is about 1 times of the second current branch 12, so that, comparator 13 is electric by the reading of its positive input Exported after the difference amplification of the reference voltage of pressure and reverse input end.

Based on above-mentioned sense amplifier 1, corresponding memory can be built, the big EEPROM of read voltage can be especially built.

Specifically, the positive input of the comparator 14 of above-mentioned sense amplifier 1 is connected with each memory cell, then Address decoder, read-write control unit etc. are connected with each memory cell respectively, thus, the decoding based on address decoding unit To select the memory cell for needing to carry out the operation such as reading or writing, and by read-write control circuit come the memory cell chosen to this Progress such as reads or writes at the operation, meanwhile, in read operation, the data stored by 1 pair of memory cell continued of sense amplifier are put Exported after big.

In summary, the present invention uses bleeder circuit by the first control signal for reading the sense amplifier of data The half of half and the second control signal is supplied to the second current branch, so that the electric current of the second current branch and the first electricity The electric current for flowing branch road presses the proportional change of identical trend, thus avoids existing use band gap reference etc. as bias voltage The problems of current source, can reduce influences of the PVT to sense amplifier while the dynamic range of read voltage is increased; Memory constructed by sense amplifier based on the present invention, it has larger read voltage dynamic range, and by technique, power supply electricity Pressure and temperature(PVT)Influence it is smaller.So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial Value.

The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe Know the personage of this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as Into all equivalent modifications or change, should by the present invention claim be covered.

Claims (9)

1. a kind of sense amplifier for being used to read the signal that memory cell is stored, it is characterised in that described to be deposited for reading The sense amplifier for the signal that storage unit is stored at least includes:
The first current branch comprising the memory cell continued, wherein, the memory cell continued by the first control signal and Second control signal is chosen;The circuit that the memory cell is used include by the first control signal control the first metal-oxide-semiconductor, And connect first metal-oxide-semiconductor and the second metal-oxide-semiconductor controlled by the second control signal;
Second current branch, it includes multiple by keyholed back plate;
3rd control signal provide circuit, its provided based on the first control signal and the second control signal control it is the multiple by 3rd control signal of keyholed back plate, so that the electric current of second current branch and the current in proportion of first current branch;
Comparator, one input connects first current branch, another input and connects second current branch, uses Exported after the difference that the voltage drop of the memory cell continued and the second current branch relevant voltage drop is amplified.
2. the sense amplifier according to claim 1 for being used to read the signal that memory cell is stored, it is characterised in that: The quantity by keyholed back plate that the quantity by keyholed back plate that second current branch includes is included based on memory cell is determined.
3. the sense amplifier according to claim 2 for being used to read the signal that memory cell is stored, it is characterised in that: Second current branch also includes the isolated tube controlled by isolation signals.
4. the sense amplifier according to claim 1 for being used to read the signal that memory cell is stored, it is characterised in that: 3rd control signal, which provides circuit, to be included:The first bleeder circuit of partial pressure is carried out to first control signal and to described Second control signal carries out the second bleeder circuit of partial pressure.
5. the sense amplifier according to claim 4 for being used to read the signal that memory cell is stored, it is characterised in that: First bleeder circuit is resistor voltage divider circuit.
6. the sense amplifier according to claim 4 for being used to read the signal that memory cell is stored, it is characterised in that: Second bleeder circuit is resistor voltage divider circuit.
7. the sense amplifier according to claim 1 for being used to read the signal that memory cell is stored, it is characterised in that: The memory cell also includes the isolated tube controlled by isolation signals.
8. the sense amplifier according to claim 1 for being used to read the signal that memory cell is stored, it is characterised in that: The memory cell that the memory cell continued belongs in EEPROM.
9. a kind of memory, it is characterised in that the use described in any one of claim 1 to 8 is included in the memory body In the sense amplifier for reading the signal that memory cell is stored.
CN201410027809.3A 2014-01-22 2014-01-22 sense amplifier and memory for reading data CN104795087B (en)

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CN104795087B true CN104795087B (en) 2017-08-25

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400606B1 (en) * 1999-10-01 2002-06-04 Samsung Electronics Co., Ltd. Sense amplifier circuit for use in a nonvolatile semiconductor memory device
CN1461009A (en) * 2002-05-20 2003-12-10 三菱电机株式会社 Semiconductor device
CN102163461A (en) * 2011-05-03 2011-08-24 苏州聚元微电子有限公司 Method for improving yield and reading reliability of electrically erasable programmable read-only memory (EEPROM)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100826497B1 (en) * 2007-01-22 2008-05-02 삼성전자주식회사 Input/output sense amplifier of circuit semiconductor memory device for reducing power consumption

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400606B1 (en) * 1999-10-01 2002-06-04 Samsung Electronics Co., Ltd. Sense amplifier circuit for use in a nonvolatile semiconductor memory device
CN1461009A (en) * 2002-05-20 2003-12-10 三菱电机株式会社 Semiconductor device
CN102163461A (en) * 2011-05-03 2011-08-24 苏州聚元微电子有限公司 Method for improving yield and reading reliability of electrically erasable programmable read-only memory (EEPROM)

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