CN104795087A - Sense amplifier used for reading data, and memorizer - Google Patents

Sense amplifier used for reading data, and memorizer Download PDF

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Publication number
CN104795087A
CN104795087A CN201410027809.3A CN201410027809A CN104795087A CN 104795087 A CN104795087 A CN 104795087A CN 201410027809 A CN201410027809 A CN 201410027809A CN 104795087 A CN104795087 A CN 104795087A
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control signal
sense amplifier
current branch
storage unit
circuit
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CN201410027809.3A
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CN104795087B (en
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杨翼
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Abstract

The invention provides a sense amplifier used for reading data, and a memorizer. The sense amplifier at least comprises: a first current branch circuit containing a memory cell to be read, a second current branch circuit containing a plurality of controlled pipes, a third control signal providing circuit, and a comparator; the memory cell to be read is selected via a first control signal and a second control signal; the third control signal providing circuit is used for providing a third control signal which is used for controlling the controlled pipes based on the first control signal and the second control signal, so that electric current of the second current branch circuit is in proportion to electric current of the first current branch circuit; the comparator is used for amplifying and outputting the difference of the voltage drop of the memory cell to be read with the corresponding voltage drop of the second current branch circuit. The corresponding memorizer can be constructed based on the sense amplifier. Advantages are that: read voltage dynamic range is relatively large; and few influences are caused by technology, power supply voltage, and temperature (PVT).

Description

For reading sense amplifier and the storer of data
Technical field
The present invention relates to memory circuit field, particularly relating to a kind of sense amplifier for reading data and storer.
Background technology
Sense amplifier (sense amplifier, SA) is the vitals in storer, the data that each storage unit for reading in storer stores.Dissimilar storer, the structure of respective adopted sense amplifier is also incomplete same.
Such as, be 201110211607.0 in Chinese Patent Application Publication at application number, disclose a kind of sense amplifier being applied to SRAM.Wherein, the storage unit in SRAM adopts six transistor arrangement, and when carrying out digital independent, the respective memory unit of SRAM exports a pair complementary signal respectively on bit line BL and BLb, and sense amplifier exports after carrying out differential amplification to this complementary signal.In order to improve the speed of sense amplifier, this sense amplifier have employed cross-coupled circuit, tail current transistor and output stage, and the source electrode of tail current transistor connects negative level.
Again such as, be in 201210306027.4 pairs of Chinese patent literatures at application number, disclose a kind of flash sensitive amplifier, this sense amplifier comprises: reference voltage generating circuit, reference cell array bit line, the pre-charge circuit capacitive load on memory cell array bit line being carried out to precharge, current amplifier circuit and comparer, wherein, the reference voltage signal that this current amplifier circuit exports according to reference voltage generating circuit amplifies the electric current flowing through the storage unit in the memory cell array of Flash and the reference unit in reference cell array; The voltage signal of comparer in amplifying and storage unit array bitline and reference cell array bit line.
Again such as, be in the Chinese patent literature of 201110372015.7 at application number, disclose the sense amplifier that one is applied to nonvolatile memory (NVM).This sense amplifier has a road reference current branch road and a road memory cell current branch road, by comparing this two paths of signals to export " 0 " or " 1 " signal.
Although above-mentioned each sensitive amplifier structure is different, be all by reference arm relatively export corresponding " 0 " or " 1 " signal.And adopt current source to provide in the sense amplifier of reference current to reference arm at some, the bias voltage adopted due to this current source is usually all from bandgap voltage reference or directly adopt external supply voltage as its bias voltage, the bias voltage that when being different from read operation, each storage unit adopts, because the error range of this two bias voltage there are differences, and, bandgap voltage reference or external supply voltage are easily subject to the impact of technique, temperature and temperature (i.e. PVT), therefore, the precision of digital independent is easily affected; Therefore need to improve the sensitive amplifier structure of this type existing.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of sense amplifier reading the large signal stored for reading cells of voltage dynamic range.
Another object of the present invention is to provide a kind of storer less by the impact of technique, supply voltage and temperature.
For achieving the above object and other relevant objects, the invention provides a kind of sense amplifier of the signal stored for reading cells, it at least comprises:
Comprise the first current branch of the storage unit continued, wherein, described in the storage unit that continues chosen by the first control signal and the second control signal;
Second current branch, it comprises multiple by keyholed back plate;
3rd control signal provides circuit, and it provides based on the first control signal and the second control signal and controls described multiple the 3rd control signal by keyholed back plate, to make the current in proportion of the electric current of described second current branch and described first current branch;
Comparer, an one input end connects described first current branch, another input end connects described second current branch, is amplified rear output for the difference of the voltage drop of the described storage unit continued and described second current branch relevant voltage being fallen.
Preferably, the quantity by keyholed back plate comprised based on storage unit by the quantity of keyholed back plate that described second current branch comprises is determined; More preferably, described second current branch also comprises the isolated tube controlled by isolation signals.
Preferably, described 3rd control signal provides circuit to comprise: carry out the first bleeder circuit of dividing potential drop to described first control signal and described second control signal carried out to the second bleeder circuit of dividing potential drop; More preferably, described first bleeder circuit is resistor voltage divider circuit; Described second bleeder circuit is also resistor voltage divider circuit.
Preferably, the circuit that storage unit adopts comprises by the first metal-oxide-semiconductor of the first control signal control and connects this first metal-oxide-semiconductor and the second metal-oxide-semiconductor controlled by the second control signal; More preferably, storage unit also comprises the isolated tube controlled by isolation signals.
Preferably, the storage unit continued belongs to the storage unit in EEPROM.
The present invention also provides a kind of storer, comprises the sense amplifier of the aforementioned signal stored for reading cells in described storer body.
As mentioned above, sense amplifier for reading data of the present invention and storer, have following beneficial effect: have and read voltage dynamic range more greatly, and less by the impact of technique, supply voltage and temperature.
Accompanying drawing explanation
Fig. 1 is shown as the sense amplifier schematic diagram of the signal stored for reading cells of the present invention.
Fig. 2 is shown as the preferred circuit schematic diagram of the sense amplifier of the signal stored for reading cells of the present invention.
Element numbers explanation
1 sense amplifier
11 first current branch
111 storage unit continued
12 second current branch
13 the 3rd control signals provide circuit
131 first bleeder circuits
132 second bleeder circuits
14 comparers
Embodiment
By particular specific embodiment, embodiments of the present invention are described below, person skilled in the art scholar the content disclosed by this instructions can understand other advantages of the present invention and effect easily.
Refer to Fig. 1 to Fig. 2.Notice, structure, ratio, size etc. that this instructions institute accompanying drawings illustrates, content all only in order to coordinate instructions to disclose, understand for person skilled in the art scholar and read, and be not used to limit the enforceable qualifications of the present invention, therefore the not technical essential meaning of tool, the adjustment of the modification of any structure, the change of proportionate relationship or size, do not affecting under effect that the present invention can produce and the object that can reach, still all should drop on disclosed technology contents and obtain in the scope that can contain.Simultaneously, quote in this instructions as " on ", D score, "left", "right", " centre " and " one " etc. term, also only for ease of understanding of describing, and be not used to limit the enforceable scope of the present invention, the change of its relativeness or adjustment, under changing technology contents without essence, when being also considered as the enforceable category of the present invention.
As shown in the figure, the invention provides a kind of sense amplifier of the signal stored for reading cells.This sense amplifier 1 at least comprises: the first current branch 11, second current branch 12, the 3rd control signal provide circuit 13 and comparer 14.
Described first current branch 11 comprises the storage unit continued, wherein, described in the storage unit that continues chosen by the first control signal and the second control signal.
Wherein, the storage unit continued described in comprises any one and does not arrange referential array or reference bit line etc. storage unit; Preferably, the storage unit continued described in is electrically erasable ROM(Electrically Erasable Programmable ROM, EEPROM) in storage unit.
As shown in Figure 2, this first current branch comprises the storage unit 111 that continues and the NMOS tube N7 as switching tube to a kind of preferred first current branch 11.Wherein, this storage unit 111 comprises NMOS tube N1, NMOS tube N2 as isolated tube and NMOS tube N3; The drain electrode that grid accesses the first control signal SG, drain electrode access supply voltage Vdd, source electrode connects NMOS tube N1 of NMOS tube N7; The grid access isolation signals A of NMOS tube N1, drain electrode connect the positive input of comparer 13, the source electrode of source electrode connection NMOS tube N2; The drain electrode that grid accesses the first control signal SG, drain electrode connects NMOS tube N3 of NMOS tube N2; The grid of NMOS tube N3 accesses the second control signal CG, source electrode connects low level VSS.It should be appreciated by those skilled in the art that the first control signal SG and the second control signal CG is by selecting the current storage unit continued needing to carry out read operation in each storage unit.
Described second current branch 12 comprises multiple by keyholed back plate.
Preferably, the quantity by keyholed back plate comprised based on storage unit by the quantity of keyholed back plate that described second current branch 12 comprises is determined, such as, storage unit comprises the NMOS tube N2 controlled by the first control signal SG and the NMOS tube N3 controlled by the second control signal CG, then described second current branch 12 comprises 2 by keyholed back plate.
As shown in Figure 2, this second current branch comprises the NMOS tube N8 as switching tube, the NMOS tube N4 as isolated tube, as the NMOS tube N5 and the NMOS tube N6 that are subject to keyholed back plate to a kind of preferred second current branch.Structure and the size of NMOS tube N4 and the NMOS tube N1 in the storage unit 111 continued are identical, structure and the size of NMOS tube N5 and the NMOS tube N2 in the storage unit 111 continued are identical, and structure and the size of NMOS tube N6 and the NMOS tube N3 in the storage unit 111 continued are identical; Structure and the size of NMOS tube N8 and the NMOS N7 pipe in the first current branch 11 are identical; The grid of NMOS tube N8 connects the drain electrode of described 3rd control circuit 13, drain electrode access supply voltage Vdd, source electrode connection NMOS tube N4; The grid access isolation signals A of NMOS tube N4, drain electrode connect the reverse input end of comparer 13, the source electrode of source electrode connection NMOS tube N5; The drain electrode that grid connects described 3rd control circuit 13, drain electrode connects NMOS tube N6 of NMOS tube N5; The grid of NMOS tube N6 connects described 3rd control circuit 13, source electrode connects low level VSS.
Described 3rd control signal provides circuit 13 to provide based on the first control signal and the second control signal and controls described multiple the 3rd control signal by keyholed back plate, with the current in proportion of the electric current and described first current branch that make described second current branch 12.
Wherein, the electric current of described first current branch 11 is 1 times, the electric current of described second current branch 12.
Preferably, described 3rd control signal provides circuit 13 to comprise: carry out the first bleeder circuit 131 of dividing potential drop to described first control signal and described second control signal carried out to the second bleeder circuit 132 of dividing potential drop.
A kind of preferred 3rd control signal provides circuit as shown in Figure 2, and the first bleeder circuit 131 comprises resistance R1 and R2, the second bleeder circuit 132 comprises resistance R3 and R4; Wherein, the resistance of resistance R1 is equal with the resistance of resistance R2; The resistance of resistance R3 is equal with the resistance of resistance R4; One end of resistance R1 connects the grid of NMOS tube N5 in the first control signal SG, other end contact resistance R2 and the second current circuit 12 and the grid of NMOS tube N8; The other end of resistance R2 connects low level VSS; One end of resistance R3 connects the grid of the NMOS tube N6 in the second control signal CG, other end contact resistance R4 and the second current circuit 12; The other end of resistance R4 connects low level VSS.
The positive input of described comparer 14 accesses that the storage unit 111, the reverse input end that continue connect the second current branch 12, the difference that the relevant voltage of the voltage drop of the described storage unit 111 continued and described second current branch 12 is fallen is amplified rear output by output terminal VOUT.
Described comparer 13 can adopt any one differential signal can be carried out the circuit amplified, and those skilled in the art should know the inner structure of comparer, therefore are not described in detail in this.
The course of work of above-mentioned sense amplifier 1 is as follows:
When carrying out the read operation of storage unit, when the storage unit 111 making based on the first control signal SG and the second control signal CG to continue is selected, namely the first control signal SG be high level, the second control signal CG also for high level time, and isolation signals A is when being high level, powered to the storage unit 111 continued by NMOS tube N7 by supply voltage Vdd, thus read voltage in the positive input generation of comparer 13; Supply voltage Vdd forms reference current by NMOS tube N8 in the second current branch 12, thus produces reference voltage at the reverse input end of comparer 13; Because the resistance of resistance R1 is equal with R2 resistance, the resistance of resistance R3 is equal with R4 resistance, therefore the signal that the signal that the grid of NMOS tube N5 and NMOS tube N8 accesses is the grid access of 1/2, NMOS tube N6 of the first control signal SG is 1/2 of the second control signal CG; Again due to the structure of NMOS tube N7 and NMOS tube N8 and size identical, and be switching tube, structure and the size of NMOS tube N1 and NMOS tube N4 are identical, structure and the size of NMOS tube N2 and NMOS tube N5 are identical, structure and the size of NMOS tube N3 and NMOS tube N6 are identical, therefore the electric current of the first current branch 11 is about 1 times of the second current branch 12, thus comparer 13 is exported after the difference reading the reference voltage of voltage and reverse input end of its positive input being amplified.
Based on above-mentioned sense amplifier 1, corresponding storer can be built, especially can build and read the large EEPROM of voltage.
Particularly, the positive input of the comparer 14 of above-mentioned sense amplifier 1 is connected with each storage unit, again address decoder, read-write control unit etc. are connected with each storage unit respectively, thus, the storage unit needing to carry out operations such as reading or writing is selected in decoding based on address decoding unit, and by operations such as the storage unit that read-write control circuit is chosen to this read or write, simultaneously, when read operation, exported after the data that the storage unit continued stores being amplified by sense amplifier 1.
In sum, the present invention adopts bleeder circuit that the half of the half of the first control signal and the second control signal is supplied to the second current branch for the sense amplifier reading data, make the electric current of the electric current of the second current branch and the first current branch by the proportional change of identical trend thus, avoid thus existing employing band gap reference etc. as bias voltage current source existing for problem, while the dynamic range of voltage is read in increase, PVT can be reduced on the impact of sense amplifier; Based on the storer constructed by sense amplifier of the present invention, it has reads voltage dynamic range more greatly, and less by the impact of technique, supply voltage and temperature (PVT).So the present invention effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.

Claims (10)

1. a sense amplifier for the signal stored for reading cells, is characterized in that, the sense amplifier of the described signal stored for reading cells at least comprises:
Comprise the first current branch of the storage unit continued, wherein, described in the storage unit that continues chosen by the first control signal and the second control signal;
Second current branch, it comprises multiple by keyholed back plate;
3rd control signal provides circuit, and it provides based on the first control signal and the second control signal and controls described multiple the 3rd control signal by keyholed back plate, to make the current in proportion of the electric current of described second current branch and described first current branch;
Comparer, an one input end connects described first current branch, another input end connects described second current branch, is amplified rear output for the difference of the voltage drop of the described storage unit continued and described second current branch relevant voltage being fallen.
2. the sense amplifier of the signal stored for reading cells according to claim 1, is characterized in that: the quantity by keyholed back plate comprised based on storage unit by the quantity of keyholed back plate that described second current branch comprises is determined.
3. the sense amplifier of the signal stored for reading cells according to claim 2, is characterized in that: described second current branch also comprises the isolated tube controlled by isolation signals.
4. the sense amplifier of the signal stored for reading cells according to claim 1, is characterized in that: described 3rd control signal provides circuit to comprise: carry out the first bleeder circuit of dividing potential drop to described first control signal and described second control signal carried out to the second bleeder circuit of dividing potential drop.
5. the sense amplifier of the signal stored for reading cells according to claim 4, is characterized in that: described first bleeder circuit is resistor voltage divider circuit.
6. the sense amplifier of the signal stored for reading cells according to claim 4, is characterized in that: described second bleeder circuit is resistor voltage divider circuit.
7. the sense amplifier of the signal stored for reading cells according to claim 1, is characterized in that: the circuit that storage unit adopts comprises the first metal-oxide-semiconductor of being controlled by the first control signal and connects this first metal-oxide-semiconductor and the second metal-oxide-semiconductor controlled by the second control signal.
8. the sense amplifier of the signal stored for reading cells according to claim 7, is characterized in that: described storage unit also comprises the isolated tube controlled by isolation signals.
9. the sense amplifier of the signal stored for reading cells according to claim 1, is characterized in that: the storage unit continued belongs to the storage unit in EEPROM.
10. a storer, is characterized in that, comprises the sense amplifier of the signal stored for reading cells described in any one of claim 1 to 9 in described storer body.
CN201410027809.3A 2014-01-22 2014-01-22 sense amplifier and memory for reading data Active CN104795087B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106409324A (en) * 2015-07-31 2017-02-15 三星电子株式会社 Semiconductor memory device and a method of operating a bit line sense amplifier of the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400606B1 (en) * 1999-10-01 2002-06-04 Samsung Electronics Co., Ltd. Sense amplifier circuit for use in a nonvolatile semiconductor memory device
CN1461009A (en) * 2002-05-20 2003-12-10 三菱电机株式会社 Semiconductor device
US20080175073A1 (en) * 2007-01-22 2008-07-24 Samsung Electronics Co., Ltd. Sense amplifiers and semiconductor memory devices for reducing power consumption and methods for operating the same
CN102163461A (en) * 2011-05-03 2011-08-24 苏州聚元微电子有限公司 Method for improving yield and reading reliability of electrically erasable programmable read-only memory (EEPROM)

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400606B1 (en) * 1999-10-01 2002-06-04 Samsung Electronics Co., Ltd. Sense amplifier circuit for use in a nonvolatile semiconductor memory device
CN1461009A (en) * 2002-05-20 2003-12-10 三菱电机株式会社 Semiconductor device
US20080175073A1 (en) * 2007-01-22 2008-07-24 Samsung Electronics Co., Ltd. Sense amplifiers and semiconductor memory devices for reducing power consumption and methods for operating the same
CN102163461A (en) * 2011-05-03 2011-08-24 苏州聚元微电子有限公司 Method for improving yield and reading reliability of electrically erasable programmable read-only memory (EEPROM)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106409324A (en) * 2015-07-31 2017-02-15 三星电子株式会社 Semiconductor memory device and a method of operating a bit line sense amplifier of the same
CN106409324B (en) * 2015-07-31 2021-07-27 三星电子株式会社 Semiconductor memory device and bit line sense amplifier operating method thereof

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