CN104794033A - CPU low-frequency fault positioning method and device based on BMC - Google Patents

CPU low-frequency fault positioning method and device based on BMC Download PDF

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Publication number
CN104794033A
CN104794033A CN201510212851.7A CN201510212851A CN104794033A CN 104794033 A CN104794033 A CN 104794033A CN 201510212851 A CN201510212851 A CN 201510212851A CN 104794033 A CN104794033 A CN 104794033A
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signal
cpld
abnormality
bmc
detects
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CN201510212851.7A
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张志安
叶丰华
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Langchao Electronic Information Industry Co Ltd
Inspur Electronic Information Industry Co Ltd
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Langchao Electronic Information Industry Co Ltd
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Priority to CN201510212851.7A priority Critical patent/CN104794033A/en
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Abstract

The invention provides a CPU low-frequency fault positioning method and device based on a BMC. The method includes the steps that, various signal lines capable of reflecting the low-frequency fault of a CPU are connected with a CPLD, the CPLD is connected with the baseboard management controller (BMC), the abnormal states of signals output by the signal lines are set in the CPLD, and when the BMC monitors that the CPLD detects abnormal signals, target signal lines corresponding to the signals in the abnormal states are determined; a display is controlled to prompt the fault of the target signal lines. By means of the scheme, detection time is shortened, and the accuracy rate is increased.

Description

A kind of localization method of the CPU low frequency fault based on BMC and device
Technical field
The present invention relates to field of computer technology, particularly a kind of localization method of the CPU low frequency fault based on BMC and device.
Background technology
Along with the development of computer technology, the exploitation of server becomes increasingly complex, and the fault that server occurs is also more and more various, when there are some faults in the server, CPU low frequency fault may be caused, therefore, when there is CPU low frequency fault, how to detect and to cause the reason device of CPU low frequency fault to become urgent problem.
Traditional detection causes the mode of the reason device of CPU low frequency fault to be: when determining to occur CPU low frequency fault, can determine reason device after utilizing oscillograph and multimeter to carry out repeatedly determination and analysis to the device that in server, each may break down.
Visible, traditional detection mode has the shortcoming long, accuracy rate is low that expends time in.
Summary of the invention
In view of this, the invention provides a kind of localization method and device of the CPU low frequency fault based on BMC, to expend time in the shortcoming long, accuracy rate is low to solve traditional detection mode.
The invention provides a kind of localization method of the CPU low frequency fault based on BMC, can reflect that each signal wire of CPU low frequency fault is connected with complex programmable logic device (CPLD), CPLD is connected with baseboard management controller BMC, the abnormality of the signal that each signal wire exports is set in CPLD, also comprises:
BMC monitor CPLD detect the signal of abnormality time, determine the target signal line corresponding to signal of described abnormality;
Control target signal line fault described in display prompts.
Preferably,
Comprise further: CPLD comprises the status register corresponding with each signal wire; Arrange signal that each signal wire exports when being high level, then CPLD detects the signal that each signal wire exports is normal condition, is 1 by the value set of corresponding state register; Arrange signal that each signal wire exports when being low level, then CPLD detects the signal that each signal wire exports is abnormality, is 0 by the value set of corresponding state register;
Described BMC monitors the signal that CPLD detects abnormality, comprising: it is 0 by 1 set that BMC monitors CPLD by the value of dbjective state register, then determine that CPLD detects the signal of abnormality.
Preferably, described BMC monitors the signal that CPLD detects abnormality, comprising:
Receive the first notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described first notification message, wherein, described first notification message is for notifying BMC, and CPLD detects the signal of abnormality.
Preferably, described BMC monitors the signal that CPLD detects abnormality, comprising:
Receive the second notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described second notification message, wherein, described second notification message is for notifying BMC, and CPLD does not get the signal that target signal line exports within the time period pre-set.
Preferably, each signal wire of the described CPU of reflection low frequency fault comprises:
One or more signal wire in reflection cpu frequency, CPU power supply signal, internal memory power supply signal and south bridge alarm signal.
Present invention also offers a kind of locating device of the CPU low frequency fault based on BMC, can reflect that each signal wire of CPU low frequency fault is connected with complex programmable logic device (CPLD), CPLD is connected with baseboard management controller BMC, the abnormality of the signal that each signal wire exports is set in CPLD, also comprises:
Whether monitoring unit, detect the signal of abnormality for monitoring CPLD;
Determining unit, for monitor at monitoring unit CPLD detect the signal of abnormality time, determine the target signal line corresponding to signal of described abnormality;
Control module, for controlling target signal line fault described in display prompts.
Preferably,
Described determining unit is 0 for monitoring CPLD at monitoring unit by the value of dbjective state register by 1 set, then determine that CPLD detects the signal of abnormality, wherein, CPLD comprises the status register corresponding with each signal wire; Arrange signal that each signal wire exports when being high level, then CPLD detects the signal that each signal wire exports is normal condition, is 1 by the value set of corresponding state register; Arrange signal that each signal wire exports when being low level, then CPLD detects the signal that each signal wire exports is abnormality, is 0 by the value set of corresponding state register.
Preferably, described determining unit, for receiving the first notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described first notification message, wherein, described first notification message is for notifying BMC, and CPLD detects the signal of abnormality.
Preferably, described determining unit, for receiving the second notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described second notification message, wherein, described second notification message is for notifying BMC, and CPLD does not get the signal that target signal line exports within the time period pre-set.
Preferably, each signal wire of the described CPU of reflection low frequency fault comprises: one or more the signal wire in reflection cpu frequency, CPU power supply signal, internal memory power supply signal and south bridge alarm signal.
Embodiments provide a kind of localization method and device of the CPU low frequency fault based on BMC, the abnormality of each signal wire output signal is detected by CPLD, when BMC monitor CPLD the signal of abnormality detected time, determine the target signal line corresponding to signal of abnormality, and control this target signal line fault of display prompts, thus decrease detection time, and improve accuracy rate.
Accompanying drawing explanation
Fig. 1 is the method flow diagram that the embodiment of the present invention provides;
Fig. 2 is the method flow diagram that another embodiment of the present invention provides;
Fig. 3 is the positioning device structure schematic diagram that the embodiment of the present invention provides;
Fig. 4 is the apparatus structure schematic diagram that the embodiment of the present invention provides.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described.Obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
As shown in Figure 1, embodiments provide a kind of localization method of the CPU low frequency fault based on BMC, can reflect that each signal wire of CPU low frequency fault is connected with complex programmable logic device (CPLD), CPLD is connected with baseboard management controller BMC, in CPLD, arrange the abnormality of the signal that each signal wire exports, the method can comprise the following steps:
Step 101: BMC monitor CPLD detect the signal of abnormality time, determine the target signal line corresponding to signal of described abnormality.
Step 102: control target signal line fault described in display prompts.
According to such scheme, the abnormality of each signal wire output signal is detected by CPLD, when BMC monitor CPLD the signal of abnormality detected time, determine the target signal line corresponding to signal of abnormality, and control this target signal line fault of display prompts, thus decrease detection time, and improve accuracy rate.
Conveniently BMC is to the monitoring of the signal condition that each signal wire that CPLD detects exports, can be by, can for each signal wire arranges corresponding status register in CPLD, signal that each signal wire exports is set when being high level, then CPLD detects the signal of each signal wire output is normal condition, is 1 by the value set of corresponding state register; Arrange signal that each signal wire exports when being low level, then CPLD detects the signal that each signal wire exports is abnormality, is 0 by the value set of corresponding state register.Therefore, it is 0 by 1 set that BMC monitors CPLD by the value of dbjective state register, then determine that CPLD detects the signal of abnormality.Like this, improve the monitoring efficiency of BMC to each signal line states.
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with drawings and the specific embodiments, the present invention is described in further detail.
As shown in Figure 2, embodiments provide a kind of localization method of the CPU low frequency fault based on BMC, the method can comprise the following steps:
Step 201: can reflect that each signal wire of CPU low frequency fault is connected with CPLD, CPLD and BMC is connected.
In the present embodiment, when there is CPU low frequency fault in server, the reason device of this CPU low frequency fault may be caused to be one or more, in order to find out this reason device fast and accurately, can by CPLD with can reflect that the device of CPU low frequency fault is connected, CPLD is used to detect each coupled device, to detect the reason device causing CPU low frequency fault.Wherein, can reflect that each signal wire of CPU low frequency fault can comprise: one or more the signal wire in reflection cpu frequency, CPU power supply signal, internal memory power supply signal and south bridge alarm signal.
As shown in Figure 3, CPLD is connected with CPU0 with CPU1 respectively, for detecting the PROCHOT# signal and MEM_HOT# signal that CPU0 and CPU1 export respectively; CPLD is connected with CPU1/MEM VR with CPU0/MEM VR respectively, for detecting the CPU_VR_HOT_N signal and MEM_VR_HOT_N signal that CPU0/MEM VR and CPU1/MEM VR exports respectively; CPLD is connected, for detecting the SMBALERT# signal of PCH and PSU with PCH (south bridge) and PSU (switching type power supply, Power Supply Unit) respectively.
In the present embodiment, owing to considering that the uncontrollable display of CPLD carries out the prompting of warning information, therefore, BMC and CPLD existing in server is connected, for the abnormality of each signal wire that monitoring CPLD detects.And BMC is connected with the display of server by Connecter.Wherein, BUS bus, UART (universal asynchronous receiving-transmitting transmitter), I2C bus, GPIO (universal input/output) etc. can be utilized to be connected by BMC and CPLD, BMC and Connerter is connected.
Step 202: the abnormality that the signal that each signal wire exports is set in CPLD.
In the present embodiment, the abnormality of the signal that each signal wire exports can be set in CPLD, wherein, the signal that CPLD needs each signal wire of Real-time Obtaining to export, and the state judging the signal that each signal wire exports according to the abnormality of the signal of each signal wire output arranged.Further, the normal condition of the signal that each signal wire exports can also be set.
In a preferred embodiment of the invention, can arrange when CPLD detects that the signal that each signal wire exports is high level, then detect that the state of the signal that each signal wire exports is normal condition.Can arrange when CPLD detects that the signal that each signal wire exports is low level, then detect that the state of the signal that each signal wire exports is abnormality.
In a preferred embodiment of the invention, the information corresponding to signal of the abnormality that each signal wire exports can also be set.In the present embodiment, the information corresponding to signal of the abnormality that each signal wire exports can be set in BMC or in CPLD.Wherein, for each signal wire in Fig. 3, with the information corresponding to the abnormality that the signal that each signal wire of this setting exports is described, the relation of this setting is as shown in table 1:
Table 1:
The signal of abnormality Information
CPU0_PROCHOT# CPU0 temperature is too high
CPU0_MEM0_HOT# CPU0 internal memory temperature is too high
CPU0_VR0_HOT_N The power supply temperature of CPU0 is too high
MEM0_VR0_HOT_N The memory power supply temperature of CPU0 is too high
CPU1_PROCHOT# CPU1 temperature is too high
CPU1_MEM0_HOT# CPU1 internal memory temperature is too high
CPU1_VR1_HOT_N The power supply temperature of CPU1 is too high
MEM1_VR1_HOT_N The memory power supply temperature of CPU1 is too high
SMBALERT# The power supply temperature of south bridge and switching type power supply is too high
Other ERROR **
According to upper table, by detecting above-mentioned signal, can know whether export the device corresponding to signal wire of this signal exception occurs, when an exception occurs, can the information of alarm corresponding signal line fault.
Step 203:CPLD detects the state of the signal that each signal wire exports, and when detecting the signal of abnormality, BMC determines the target signal line corresponding to the signal of abnormality.
In the present embodiment, CPLD needs the state detecting the signal that each signal wire exports in real time, and BMC needs monitoring CPLD in real time whether to detect the signal of abnormality.
In the present embodiment, BMC can monitor by any one of following several mode the signal that CPLD detects abnormality, and when monitoring the signal of this abnormality, how to determine the target signal line corresponding to signal of abnormality:
1, conveniently BMC can monitor the signal that CPLD detects abnormality, status register corresponding to each signal wire can be set in CPLD, when CPLD detects that the state of the signal that each target signal line exports is normal condition, the status register set 1 that so each signal wire is corresponding.When the state that CPLD detects the signal that certain target signal line exports is abnormality, the status register set 0 that so this target signal line is corresponding.Therefore, BMC can monitor each status register in CPLD, when the value set monitoring certain dbjective state register is 0, so BMC just can determine that CPLD detects the signal of abnormality, and can target signal line corresponding to the signal of signal wire determination abnormality corresponding to this status register.
In this case, can CPLD or BMC arrange each signal wire export abnormality signal corresponding to information.If arrange the information corresponding to signal of the abnormality that each signal wire exports in CPLD, so CPLD can arrange and determines target prompting information according to this, and target prompting information is sent to BMC, or, the information corresponding to signal of abnormality that each signal wire exports if arrange in BMC, is so arranged by BMC determine target prompting information according to this.
2, CPLD is when the signal of abnormality being detected, sends a notification message to BMC, and wherein, this notification message is for notifying BMC, and CPLD detects the signal of abnormality, according to this notification message, BMC determines that CPLD detects the signal of abnormality.
In this case, can CPLD or BMC arrange each signal wire export abnormality signal corresponding to information.
3, CPLD is the signal needing each signal wire of Real-time Obtaining to export, if in a setting-up time section, CPLD does not obtain the signal that target signal line exports, and so CPLD sends this notification message to BMC, according to this notification message, BMC determines that CPLD detects the signal of abnormality.
In this case, can CPLD or BMC arrange each signal wire export abnormality signal corresponding to information.
Step 204:BMC controls display prompts target signal line fault.
Wherein, BMC can utilize the display prompts target signal line fault of the network/serial ports computer for controlling of connecter and computing machine according to information.
As shown in Figure 4, present embodiments provide a kind of locating device of the CPU low frequency fault based on BMC, can reflect that each signal wire of CPU low frequency fault is connected with complex programmable logic device (CPLD), CPLD is connected with baseboard management controller BMC, the abnormality of the signal that each signal wire exports is set in CPLD, also comprises:
Whether monitoring unit 401, detect the signal of abnormality for monitoring CPLD;
Determining unit 402, for monitor at monitoring unit CPLD detect the signal of abnormality time, determine the target signal line corresponding to signal of described abnormality;
Control module 403, for controlling target signal line fault described in display prompts.
Further,
Described determining unit 402 is 0 for monitoring CPLD at monitoring unit by the value of dbjective state register by 1 set, then determine that CPLD detects the signal of abnormality, wherein, CPLD comprises the status register corresponding with each signal wire; Arrange signal that each signal wire exports when being high level, then CPLD detects the signal that each signal wire exports is normal condition, is 1 by the value set of corresponding state register; Arrange signal that each signal wire exports when being low level, then CPLD detects the signal that each signal wire exports is abnormality, is 0 by the value set of corresponding state register.
Further, described determining unit 402, for receiving the first notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described first notification message, wherein, described first notification message is for notifying BMC, and CPLD detects the signal of abnormality.
Further, described determining unit 402, for receiving the second notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described second notification message, wherein, described second notification message is for notifying BMC, and CPLD does not get the signal that target signal line exports within the time period pre-set.
Further, each signal wire of the described CPU of reflection low frequency fault comprises: one or more the signal wire in reflection cpu frequency, CPU power supply signal, internal memory power supply signal and south bridge alarm signal.
In sum, embodiments of the invention at least can realize following beneficial effect:
1, the abnormality of each signal wire output signal is detected by CPLD, when BMC monitor CPLD the signal of abnormality detected time, determine the target signal line corresponding to signal of abnormality, and control this target signal line fault of display prompts, thus decrease detection time, and improve accuracy rate.
2, by arranging status register corresponding to each signal wire in CPLD, and each signal wire is set when outputing signal as high level, the value of corresponding status register is 1, if when each signal wire output signal is for low level, the value of each status register corresponding is 0, according to the value of status register, BMC can determine whether CPLD detects the signal of abnormality, thus improve the monitoring efficiency of BMC to each signal line states.
The content such as information interaction, implementation between each unit in the said equipment, due to the inventive method embodiment based on same design, particular content can see in the inventive method embodiment describe, repeat no more herein.
It should be noted that, in this article, the relational terms of such as first and second and so on is only used for an entity or operation to separate with another entity or operational zone, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element " being comprised " limited by statement, and be not precluded within process, method, article or the equipment comprising described key element and also there is other same factor.
One of ordinary skill in the art will appreciate that: all or part of step realizing said method embodiment can have been come by the hardware that programmed instruction is relevant, aforesaid program can be stored in the storage medium of embodied on computer readable, this program, when performing, performs the step comprising said method embodiment; And aforesaid storage medium comprises: ROM, RAM, magnetic disc or CD etc. various can be program code stored medium in.
Finally it should be noted that: the foregoing is only preferred embodiment of the present invention, only for illustration of technical scheme of the present invention, be not intended to limit protection scope of the present invention.All any amendments done within the spirit and principles in the present invention, equivalent replacement, improvement etc., be all included in protection scope of the present invention.

Claims (10)

1. the localization method based on the CPU low frequency fault of BMC, it is characterized in that, can reflect that each signal wire of CPU low frequency fault is connected with complex programmable logic device (CPLD), CPLD is connected with baseboard management controller BMC, the abnormality of the signal that each signal wire exports is set in CPLD, also comprises:
BMC monitor CPLD detect the signal of abnormality time, determine the target signal line corresponding to signal of described abnormality;
Control target signal line fault described in display prompts.
2. method according to claim 1, is characterized in that,
Comprise further: CPLD comprises the status register corresponding with each signal wire; Arrange signal that each signal wire exports when being high level, then CPLD detects the signal that each signal wire exports is normal condition, is 1 by the value set of corresponding state register; Arrange signal that each signal wire exports when being low level, then CPLD detects the signal that each signal wire exports is abnormality, is 0 by the value set of corresponding state register;
Described BMC monitors the signal that CPLD detects abnormality, comprising: it is 0 by 1 set that BMC monitors CPLD by the value of dbjective state register, then determine that CPLD detects the signal of abnormality.
3. method according to claim 1, is characterized in that, described BMC monitors the signal that CPLD detects abnormality, comprising:
Receive the first notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described first notification message, wherein, described first notification message is for notifying BMC, and CPLD detects the signal of abnormality.
4. method according to claim 1, is characterized in that, described BMC monitors the signal that CPLD detects abnormality, comprising:
Receive the second notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described second notification message, wherein, described second notification message is for notifying BMC, and CPLD does not get the signal that target signal line exports within the time period pre-set.
5., according to described method arbitrary in Claims 1-4, it is characterized in that, each signal wire of the described CPU of reflection low frequency fault comprises:
One or more signal wire in reflection cpu frequency, CPU power supply signal, internal memory power supply signal and south bridge alarm signal.
6. the locating device based on the CPU low frequency fault of BMC, it is characterized in that, can reflect that each signal wire of CPU low frequency fault is connected with complex programmable logic device (CPLD), CPLD is connected with baseboard management controller BMC, the abnormality of the signal that each signal wire exports is set in CPLD, also comprises:
Whether monitoring unit, detect the signal of abnormality for monitoring CPLD;
Determining unit, for monitor at monitoring unit CPLD detect the signal of abnormality time, determine the target signal line corresponding to signal of described abnormality;
Control module, for controlling target signal line fault described in display prompts.
7. device according to claim 6, is characterized in that,
Described determining unit is 0 for monitoring CPLD at monitoring unit by the value of dbjective state register by 1 set, then determine that CPLD detects the signal of abnormality, wherein, CPLD comprises the status register corresponding with each signal wire; Arrange signal that each signal wire exports when being high level, then CPLD detects the signal that each signal wire exports is normal condition, is 1 by the value set of corresponding state register; Arrange signal that each signal wire exports when being low level, then CPLD detects the signal that each signal wire exports is abnormality, is 0 by the value set of corresponding state register.
8. device according to claim 6, it is characterized in that, described determining unit, for receiving the first notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described first notification message, wherein, described first notification message is for notifying BMC, and CPLD detects the signal of abnormality.
9. device according to claim 6, it is characterized in that, described determining unit, for receiving the second notification message that CPLD sends, determine to monitor the signal that CPLD detects abnormality according to described second notification message, wherein, described second notification message is for notifying BMC, and CPLD does not get the signal that target signal line exports within the time period pre-set.
10. according to described device arbitrary in claim 6 to 9, it is characterized in that, each signal wire of the described CPU of reflection low frequency fault comprises: one or more the signal wire in reflection cpu frequency, CPU power supply signal, internal memory power supply signal and south bridge alarm signal.
CN201510212851.7A 2015-04-29 2015-04-29 CPU low-frequency fault positioning method and device based on BMC Pending CN104794033A (en)

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CN110825204A (en) * 2019-11-06 2020-02-21 深圳宝龙达信创科技股份有限公司 Mainboard of electronic equipment and power supply information management method
CN111367392A (en) * 2020-02-29 2020-07-03 苏州浪潮智能科技有限公司 Dynamic power supply management system
CN111367392B (en) * 2020-02-29 2021-08-24 苏州浪潮智能科技有限公司 Dynamic power supply management system

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Application publication date: 20150722