CN104717484B - Carry out method, video processing circuits and the video display system of video display control - Google Patents
Carry out method, video processing circuits and the video display system of video display control Download PDFInfo
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Abstract
The present invention provides a kind of method for carrying out video display control, related video processing circuits and video display system.Especially, the method is carried out in the video display system, and the video processing circuits is located in the video display system, and the video processing circuits is operated according to the method.The method is included：Dynamically by the use of multiple buffers both as the multiple in ping buffer device of multiple three-dimensional pictures, wherein the plurality of buffer is in the video display system；And in by the use of the plurality of buffer the rwo any one of as one during ping buffer device, dynamically by the use of at least one other buffers in the plurality of buffer as at least off screen buffer for an at least three-dimensional picture.The method of video display control of the invention, related video processing circuits and video display system constant can maintain optimal overall efficiency.
Description
This case is the divisional application of Application No. 201080018388.8, and the original bill applying date is on November 26th, 2010, hair
It is bright entitled《Perform method, video processing circuits and the video display system of video display control》.
Technical field
The present invention is that on three-dimensional (Three-Dimensional, hereinafter referred to as 3D) display control, espespecially one kind is carried out
The video display system of the method for video display control, related video processing circuits and correlation.
Background technology
Display control is an important subject under discussion for traditional 3D display systems.According to correlation technique, it is being used for
Temporarily storage is expected under the situation that the buffer module of the 3D pictures (Frame) of display is not controlled properly, can produce certain
A little problems.For example：During when the traditional video processing circuits in traditional 3D display systems and without appropriate design, can
So-called tear phenomenon (Tearing Artifact) can occur, what this can bring user's extreme difference views and admires experience.Especially,
For occupation rate of expanding market, in need some inexpensive products may be produced, such as its associated hardware resource is with cheap
Or the element of low order is come the product implemented.However, some side effects would generally be brought using the element of these cheap or low orders.In
It is that traditional 3D display systems generally please oneself without decree user, accordingly, it would be desirable to a kind of novel method is regarded
The efficiency of the display control of frequency display system.
The content of the invention
An object of the present invention is to provide a kind of method for carrying out video display control, related video processing circuits
And the video display system of correlation, to solve the problems, such as that it is poor that user views and admires experience.
Another object of the present invention is to provide a kind of method for carrying out video display control, related video processing circuits
And the video display system of correlation, to reach optimal overall efficiency.
Another object of the present invention is to provide a kind of method for carrying out video display control, related video processing circuits
And the video display system of correlation, even if to be the situation implemented with cheap or low order element in associated hardware resource
Under, it still is able to maintain overall efficiency.
A kind of method for carrying out video display control is provided in presently preferred embodiments of the present invention, wherein the method is intended to be
Video display control is carried out in one video display system.The method includes：Dynamically by the use of multiple buffers both as
For the multiple in screen (On-Screen) buffering of multiple three-dimensional pictures (Three-Dimensional Frame, 3D Frame)
Device, wherein the plurality of buffer is located in the video display system, wherein, the plurality of the rwo in ping buffer device is used respectively
One of it is expected to be shown for user's left eye left three-dimensional picture and is expected to be shown for user's right eye stores
One of right three-dimensional picture；And in by the use of the plurality of buffer the rwo any one of as one during ping buffer device,
Dynamically by the use of at least one other buffers in the plurality of buffer as at least off screen for an at least three-dimensional picture
(Off-Screen) buffer, wherein, alternately storage should be respectively intended to storage to the off screen buffer in the rwo of ping buffer device
One of it is expected to be shown for user's left eye left three-dimensional picture and one of is expected to be shown for user's right eye the right side
Three-dimensional picture.
A kind of video processing circuits of correlation is provided in presently preferred embodiments of the present invention, the wherein video processing circuits is located at
In one video display system.The video processing circuits includes a de-multiplexer (Demultiplexer), two Video Decoders, one
Buffer module and a controller, the wherein controller is the running for controlling the video processing circuits.The de-multiplexer is to use
By three-dimensional video stream solution multiplexing (Demultiplex) as a left video stream and a right video flowing, and the two videos solution
Code device is for decoding the left video stream respectively with the right video flowing to produce multiple three-dimensional pictures.In addition, the buffer module is
For temporarily storing these three-dimensional pictures, wherein the buffer module includes multiple buffers.Under the control of the controller, should
Buffer module dynamically by the use of the plurality of buffer both as be directed to these three-dimensional pictures at least a portion three-dimensional picture
The multiple in face in ping buffer device, wherein, the plurality of the rwo in ping buffer device is respectively intended to storage and is expected to for user
Left eye one of shows left three-dimensional picture and one of is expected to be shown for user's right eye right three-dimensional picture.Additionally,
Under the control of the controller, in by the use of the plurality of buffer the rwo any one of as one during ping buffer device, should
Buffer module dynamically by the use of at least one other buffers in the plurality of buffer as an at least three-dimensional picture extremely
A few off screen buffer, wherein, alternately storage should be respectively intended to store estimated the off screen buffer in the rwo of ping buffer device
Left three-dimensional picture one of is shown for user's left eye and one of is expected to be shown for user's right eye right three-dimensional
Picture.
A kind of video display system of correlation is provided in presently preferred embodiments of the present invention, the wherein video display system is included
One video processing circuits, and the video processing circuits includes a de-multiplexer, two Video Decoders, a buffer module and a control
Device, and the controller is the running for controlling the video processing circuits.The de-multiplexer is for by a three-dimensional video stream
Solution multiplexing turns into a left video stream and a right video flowing, and two Video Decoder is for decoding the left video stream respectively and being somebody's turn to do
Right video flowing is producing multiple three-dimensional pictures.In addition, the buffer module is for temporarily storing these three-dimensional pictures, wherein should
Buffer module includes multiple buffers.Under the control of the controller, the buffer module is dynamically using the plurality of buffer
Both as the multiple in ping buffer device of at least a portion three-dimensional picture in these three-dimensional pictures, wherein, it is the plurality of
The rwo of ping buffer device is respectively intended to storage and one of is expected to be shown for user's left eye left three-dimensional picture and estimated
Right three-dimensional picture one of is shown for user's right eye.Additionally, under the control of the controller, in using the plurality of buffering
As one during ping buffer device, the buffer module is dynamically using in the plurality of buffer for any one of the rwo of device
At least one other buffers are used as at least off screen buffer for an at least three-dimensional picture；Wherein, the off screen buffer is handed over
Storage should be respectively intended to for storage in the rwo of ping buffer device one of be expected to be shown for user's left eye left three-dimensional picture
Face and being expected to one of shows right three-dimensional picture for user's right eye.
Compared to prior art, the video display system of the method for the present invention, related video processing circuits and correlation,
Even if still being able to maintain overall efficiency in the case where associated hardware resource is the situation implemented with cheap or low order element.
Brief description of the drawings
Figure 1A and Figure 1B is illustrated according to a kind of video display system and the video of a first embodiment of the invention respectively
The combination of display system and related Three-dimensional Display module.
Fig. 2A and Fig. 2 B are illustrated according to a kind of video display system of a second embodiment of the invention and related respectively
TV station.
Fig. 3 A and Fig. 3 B are illustrated according to two 3D pictures of one embodiment of the invention respectively.
Fig. 3 C illustrate the mistake display result of the traditional video display system in correlation technique.
Fig. 4 is the flow chart according to a kind of method for carrying out video display control of one embodiment of the invention.
Fig. 5 is the exemplary cushioning control of the involved multiple buffers in an embodiment of the method shown in Fig. 4.
Fig. 6 A to Fig. 6 D are the exemplary buffering of the involved multiple buffers in another embodiment of the method shown in Fig. 4
Control.
Fig. 7 A to Fig. 7 D are the exemplary buffering of the involved multiple buffers in another embodiment of the method shown in Fig. 4
Control.
Fig. 8 A to Fig. 8 C are the involved implementation detail in another embodiment of the method shown in Fig. 4.
Specific embodiment
Some vocabulary have been used to censure specific element in the middle of patent specification and appended claim.It is affiliated
The those skilled in the art in field, hardware manufacturer may call same element with different nouns.This specification and after
Continuous claim is made not in the way of the difference of title is used as distinguishing element with element difference functionally
It is the criterion distinguished.In the whole text, the "comprising" of specification and follow-up claim mentioned in is an open term,
Therefore " include but be not limited to " should be construed to.In addition, " coupling " one word directly and is indirectly electrically connected comprising any
Means.Therefore, if a first device is coupled to a second device described in text, representing the first device can directly be electrically connected
In the second device, or it is electrically connected indirectly to the second device by other devices or connection means.
Figure 1A is refer to, Figure 1A is a kind of video display system 100 according to a first embodiment of the invention.Such as Figure 1A institutes
Show, video display system 100 includes a video processing circuits, and the video processing circuits includes a de-multiplexer
(Demultiplexer) 110, two Video Decoder 120L and 120R, a controller 130, a buffer module 140 and a multiplexer
(Multiplexer) 150, wherein controller 130 is the running for controlling above-mentioned video processing circuits.In the present embodiment
In, buffer module 140 includes a buffering switch unit 142 and multiple buffers 144 (being not depicted in Figure 1A).For example：Buffering is cut
Changing unit 142 can be by using according to an at least switch-over control signal SSWAnd some switching circuits for operating are implemented.Again for example：
Buffering switch unit 142 can be implemented by using an interface circuit, and wherein the interface circuit is for according to switching control letter
Number SSWControl the access to buffer 144.
According to the present embodiment, de-multiplexer 110 be for by a three-dimensional (Three-Dimensional, hereinafter referred to as
" 3D ") video flowing 108 solves multiplexing (Demultiplex) turns into an a left video stream 118L and right video flowing 118R, and two videos
Decoder 120L and 120R are to be expected to many of display producing for decoding left video stream 118L and right video flowing 118R respectively
Individual 3D pictures (Frame).For example：These 3D pictures can be produced based on decoded material 128L and 128R.Again for example：These 3D draw
Face can be obtained by decoded material 128L and 128R.Again for example：These 3D pictures can be produced based on decoded material 128L and 128R
And or can be obtained by decoded material 128L and 128R.In addition, buffer module 140 is for temporarily storing these 3D pictures.
Under the control of controller 130, especially in switch-over control signal SSWControl under, buffer module 140 is dynamically using this is more
Both of individual buffer 144 are shielding (On-Screen) as the multiple of at least a portion 3D pictures in these 3D pictures
Buffer.Additionally, under the control of controller 130, especially in switch-over control signal SSWControl under, in using the plurality of slow
Rush device 144 the rwo any one of as one during ping buffer device, buffer module 140 is dynamically using the plurality of slow
At least one other buffers rushed in device 144 are buffered as at least off screen (Off-Screen) for an at least 3D pictures
Device.
By means of multiplexer 150, buffer module 140 can be utilized respectively the plurality of buffer 144 the rwo as in not
With cycle in ping buffer device, especially as in different vertical sync periods (for example：One vertical synchronizing signal
The different cycle of VSYNC) in ping buffer device.Specifically, according to the selection signal S from controller 130SEL,
Multiplexer 150 can be used to the output of one of multiplexing selection (Multiplex) these buffers 144, especially buffer 144
The rwo in a buffer output.For example：The rwo in buffer 144 includes one first buffer Buf (1) and
Under the situation of the second buffer Buf (2), multiplexer 150 can multiplexing select the output of the first buffer Buf (1) as being expected to
One the oneth 3D pictures of preferential display, then multiplexing select the output of the second buffer Buf (2) as being expected to what is shown after a while
One the 2nd 3D pictures, wherein the whole picture being expected in these 3D pictures of display is by exporting picture signal 158
It is output.Controller 130 can control selection signal SSELIn multiple states in these buffers 144 are corresponded respectively to one
State, to notify multiplexer 150 on being expected to the output of a specific buffers of selection that time.
In the present embodiment, an optical disk player is by for the example for video display system 100, the wherein optical disk player
A CD-RW discsCD-RW 8 can be accessed, and CD-RW discsCD-RW 8 stores 3D programs or content；Therefore, video display system 100 can be marked in Figure 1B
It is shown as " optical disk player ".Video display system 100 may be coupled to a 3D display devices 58, and display device 58 includes a display
The such as 3D display module of module 60, the wherein such as 3D display module of display module 60 can be used to show that these above-mentioned 3D draw
Face.This for illustrative purposes only, not limitation of the present invention.According to a change case of the present embodiment, such as scheme
A second embodiment shown in 2A and Fig. 2 B, the 3D display module for showing these above-mentioned 3D pictures may be implemented in above-mentioned
In the middle of video display system；In response to the change on framework, above-mentioned video display system changes with label 100 ' to indicate.For example：
The 3D display module being implemented in video display system 100 ' can be the 3D display module 160 shown in Fig. 2A.In this change case,
By for the example for video display system 100 ', the wherein TV can receive the broadcast singal from a TV station 4 to one TV, and
TV station 4 can broadcast 3D programs or content；Therefore, it is " TV " that video display system 100 ' is signable in Fig. 2 B.
Fig. 3 A and Fig. 3 B are illustrated according to two 3D pictures 12 and 14 of one embodiment of the invention respectively.For example：Two 3D draw
Face 12 and 14 represents the above-mentioned 3D pictures and above-mentioned the 2nd 3D for being expected to show after a while for being expected to preferential display respectively
Picture.Especially, 3D pictures 12 are the left 3D pictures for being expected to be shown for user's left eye, and 3D pictures 14 are estimated
The right 3D pictures to be shown for user's right eye.Based on the first embodiment (or its change case such as this second implement
Example) framework, such as so-called tear phenomenon (Tearing Artifact) of the problem of correlation technique will disturb people
Subject under discussion.Specifically, all mistake display results 24 as shown in Figure 3 C of the inappropriate display result of correlation technique will be eternal
Will not occur in any video display system implemented according to the present invention, wherein mistake display result 24 is by 3D pictures 14
Below in two parts 12A and 12B above in central two parts 14A and 14B in the middle of part 14A and 3D pictures 12
12B is divided to be constituted.Based on the framework of the first embodiment (or its change case such as second embodiment), even if in related hardware
Under resource is the situation implemented with cheap or low order element, it still is able to maintain overall efficiency.
Fig. 4 is the flow chart according to a kind of method 910 for carrying out video display control of one embodiment of the invention, wherein should
Method is to carry out video display control in all video display systems described above of a video display system.Method shown in Fig. 4
910 can be applied to the video display system 100 (or the video display system 100 ' shown in Fig. 2A) shown in Figure 1A, especially apply
In the central video processing circuits of any one of the first embodiment and the second embodiment (and its respective change case).Should
Method is described as follows：
In 912 steps, the video processing circuits (the especially buffer module 140 under the control of controller 130) is moved
State ground using multiple buffers both, all multiple buffers 144 described above the rwo, as in these 3D pictures
At least a portion 3D pictures multiple in ping buffer device.For example：In the switch-over control signal S from controller 130SWControl
Under, buffer module 140 is dynamically by the use of the rwo at least one as in for these 3D pictures of the plurality of buffer 144
Divide the multiple of 3D pictures in ping buffer device.
In 914 steps, in by the use of the plurality of buffer 144 the rwo any one of as one in the ping buffer device phase
Between, the video processing circuits (the especially buffer module 140 under the control of controller 130) dynamically utilizes the plurality of buffering
At least one other buffers in device 144 are used as at least off screen buffer for an at least 3D pictures.For example：Carrying out automatic control
The switch-over control signal S of device processed 130SWControl under, in by the use of the plurality of buffer 144 the rwo any one of as one
During ping buffer device, buffer module 140 is dynamically by the use of at least one other buffers in the plurality of buffer 144 as pin
To an at least off screen buffer of an at least 3D pictures.
According to some change case of the present embodiment, repeatably carried out with the workflow of step 914 comprising step 912.
According to the present embodiment some change case, step 912 a part running and or step 914 a part running can be arranged in
In the middle of at least one independent step.According to some change case of the present embodiment, a part for step 912 is operated and or step 914
Part running can be arranged in one it is central the step of both deposit.
In general, the quantity of the multiple buffers 144 involved by method 910 shown in Fig. 4 can be odd number or even number.Example
Such as：In the middle of certain embodiments of the present invention such as embodiment illustrated in fig. 5 and its some change case, the plurality of buffer 144
Quantity can be even number.Again for example：Each shown in some other embodiments such as Fig. 6 A to Fig. 6 D and Fig. 7 A to Fig. 7 D of the invention
In the middle of individual embodiment and its some change case, the quantity of the plurality of buffer 144 can be odd number.
As shown in figure 5, the quantity of the plurality of buffer 144 can be equal to four, wherein buffer 144 includes one first group of buffering
Device 1441L and 1441R and one second group of buffer 1442L and 1442R.Especially, buffer 1441L and 1442L is for temporary
When ground storage be expected to the multiple left 3D pictures that are shown for user's left eye, and buffer 1441R and 1442R is for temporary
When ground storage be expected to the multiple right 3D pictures that are shown for user's right eye.
Under the control of controller 130, especially in switch-over control signal SSWControl under, when buffer module 140 is utilized
One of buffer 1441L and 1442L as one in ping buffer device, buffer module 140 using buffer 1441L with
The other of 1442L is used as an off screen buffer.For example：When buffer module 140 is slow in screen as one by the use of buffer 1441L
When rushing device, buffer module 140 is by the use of buffer 1442L as an off screen buffer.Again for example：When buffer module 140 is using slow
Device 1442L is rushed as one in ping buffer device, buffer module 140 is by the use of buffer 1441L as an off screen buffer.
Similarly, under the control of controller 130, especially in switch-over control signal SSWControl under, work as buffer module
140 by the use of one of buffer 1441R and 1442R as one in ping buffer device, buffer module 140 utilizes buffer
The other of 1441R and 1442R is used as an off screen buffer.For example：When buffer module 140 by the use of buffer 1441R as
One in ping buffer device, and buffer module 140 is by the use of buffer 1442R as an off screen buffer.Again for example：Work as buffer module
140 by the use of buffer 1442R as one in ping buffer device, buffer module 140 is buffered by the use of buffer 1441R as an off screen
Device.
Then, once there was only a buffer in the middle of buffer 1441L and 1442L can be used as one in ping buffer device,
And once an only buffer can be used as one in ping buffer device, wherein step 912 in the middle of buffer 1441R and 1442R
The rwo of described multiple buffers 144 is comprising one of buffer 1441L and 1442L and additionally comprises buffer 1441R
One of with 1442R, for for exporting the one group of 3D picture (that is, for being expected to be shown for user two respectively
Left 3D pictures and a right 3D pictures).Label 144-1 is for representing：In a particular moment, the multiple bufferings described in step 912
The rwo of device 144；And label 144-2 is for representing：In this particular moment, the multiple buffers 144 described in step 914
At least one other buffers.
Refer to Fig. 6 A, the quantity of the plurality of buffer 144 can be equal to three, wherein buffer 144 comprising buffer 1441,
1442 and 1443.Especially, as shown in part 144-1 above in Fig. 6 A, in buffer 1441,1442 and 1443 both
One particular moment was chosen as the rwo of the multiple buffers 144 described in step 912.In addition, part below in such as Fig. 6 A
Shown in 144-2, the other of buffer 1441,1442 and 1443 is chosen as the multiple described in step 914 in this particular moment
At least one other buffers in buffer 144.In order to make it easy to understand, Fig. 6 A illustrate the demonstration proterties in this particular moment
Condition：Buffer 1441 is chosen as the rwo of the multiple buffers 144 described in step 912 with 1442 and buffer 1443 is chosen as
At least one other buffers in multiple buffers 144 described in step 914.
In under the control of controller 130, especially in switch-over control signal SSWControl under, " buffer module 140 is utilized
Buffer 1441,1442 and 1443 both as two in ping buffer device " and " the two ping buffer device be respectively intended to storage
It is expected to the left 3D pictures that are shown for user's left eye and is expected to the right 3D shown for user's right eye
Under the situation of picture ", buffer module 140 is slow as an off screen by the use of other buffers in buffer 1441,1442 and 1443
Rush device.For example：Buffer module 140 by the use of buffer 1441 and 1442 as the two under the situation of ping buffer device, buffering
Module 140 is by the use of other buffers 1443 as an off screen buffer.Then, buffer 1441 can be used to export estimated with 1442
The one group of 3D picture to be shown for user two respectively is (for example：The left 3D pictures and the right 3D pictures).
Refer to Fig. 6 B, it is assumed that symbol Buf (1), Buf (2) and Buf (3) be respectively intended to represent buffer 1441,1442 with
1443.In addition, symbol L (i) is respectively intended to represent left 3D pictures and right 3D pictures with R (i), wherein i can be integer, especially right and wrong
The integer of negative.When buffer Buf (1) and Buf (2) store a left 3D pictures L (0) and a right 3D pictures R (0), buffering respectively
Device Buf (3) can be used to draw next left 3D pictures L (1), and it is hatched block in order to understand therefore to be shown.
Buffer Buf (1), the content of Buf (2) and Buf (3) each transition (Transition) correspond to a vertical synchronizing signal it is all
Vertical synchronizing signal VSYNC (being not depicted in Fig. 6 B) described above.Due to the method 910 shown in application drawing 4, buffer Buf (1)
Content in the different cycles of vertical synchronizing signal VSYNC can be respectively sequence { L (0), R (1), R (1), R (1), L
(3) related 3D pictures in ... }.In addition, contents of the buffer Buf (2) in the different cycles of vertical synchronizing signal VSYNC
Related 3D pictures in sequence { R (0), R (0), L (2), L (2), L (2) ... } can be respectively.Additionally, buffer Buf (3) is in vertical
Content in the different cycles of straight synchronizing signal VSYNC can be respectively in sequence { L (1), L (1), L (1), R (2), R (2) ... }
Related 3D pictures.
Fig. 6 C are refer to, vertical synchronizing signal VSYNC is illustrated in this for reference, wherein buffer Buf (1), Buf (2)
Each transition with the content of Buf (3) corresponds to the pulse in vertical synchronizing signal VSYNC.Some drawing for orders are such as painted
Figure instruction DRAW (L (0)), DRAW (R (0)), DRAW (L (1)), DRAW (R (1)), DRAW (L (2)), DRAW (R (2)) ... etc.
Be respectively intended to draw these 3D pictures L (0), R (0), L (1), R (1), L (2), R (2) ... etc., wherein in the middle of these 3D pictures
Some pictures can be schematically shown as hatched block in order to understand.In addition, some upset (Flip) instruction such as upset instructions
Flip (1), Flip (2) and Flip (3) are respectively intended to each pulse then arrived in vertical synchronizing signal VSYNC each
Time point by buffer Buf (1), Buf (2) and Buf (3) upset be ping buffer device (its be depicted as with thick line describe
Block).Additionally, symbol X shown in Fig. 6 C representative in the present embodiment meaning is " undefined or determined "
(Undefined/Undetermined), wherein the content of buffer for being denoted as symbol X is typically undefined or determined.
Note that in the present embodiment, be one when one of buffer Buf (1), Buf (2) and Buf (3) are just reversed
In ping buffer device, the buffer for storing the content for just being removed from screen is reformed into an off screen state.This is intended merely to
Descriptive purpose, not limitation of the present invention.It is big in the quantity of buffer 144 according to a change case of the present embodiment
In under three situation, multiple buffers 144 described in step 912 the rwo (for example：Part 144-1 above in Fig. 6 A)
Above-mentioned particular moment can simultaneously in one in screen state, and in multiple buffers 144 described in step 914 this at least one its
Its buffer can be at an off screen state in this particular moment.In addition, in the end in current cycle, such as vertical synchronizing signal
At the time point that a certain pulse then arrived in VSYNC occurs, those are considered as " multiple buffers 144 described in step 912
The rwo " two buffers of script enter an off screen state, wherein some of buffer 144 other both simultaneously immediately
Instead of two buffers of script and while become in one in screen state.
In addition, some drawing for orders such as drawing for order DRAW (L (0)), DRAW (R (0)), DRAW (L (1)), DRAW (R
(1)), DRAW (L (2)), DRAW (R (2)) ... wait that to be lifted be the newest 3D in producing or obtaining Fig. 6 C illustrated embodiments
The example of the instruction of picture.This for illustrative purposes only, not limitation of the present invention.According to the one of the present embodiment
Change case, the instruction of other species can be used to produce or obtain newest 3D pictures.
Fig. 6 D are refer to, workflow 920 is the involved reality in the special case of the present embodiment of the method 910 shown in Fig. 4
Details is applied, at least a portion available virtual source code (Pseudo Code) wherein in these implementation details is illustrated, in order to
Understand the buffer control shown in Fig. 6 C.Especially, workflow 920 can be applied to above-mentioned video processing circuits.Note that
Workflow 920 (especially its step) shown in Fig. 6 D for illustrative purposes only, not limitation of the present invention.
Workflow 920 is described as follows：
In 922 steps, controller 130 execute instruction i=0 and j=1 set the initial value for indexing i and j respectively
It is 0 and 1.
In 924-1 steps, under the control of controller 130, especially in switch-over control signal SSWControl under, buffering
Module 140 (or the buffering switch unit 142 in it) selects buffer Buf (j mod 3) for left 3D pictures L (i), wherein according with
Number " mod " represents the operator of mould running (Modulo Operation).
In 924-2 steps, above-mentioned video processing circuits (especially controller 130 and or decoder 120L) is performed paints
Figure instruction Draw (L (i)), to draw left 3D pictures L (i).Drawing for order Draw (L (i)) can be a program, and the program bag contains
For the multiple instruction of left 3D pictures L (i), therefore drawing for order Draw (L (i)) can include many sub-steps.
In 924-3 steps, controller 130 performs upset instruction Flip (j mod 3), by buffer Buf (j mod
3) upset is for one in ping buffer device.For example：Under the control of controller 130, especially in switch-over control signal SSWControl under,
Buffer module 140 (or the buffering switch unit 142 in it) overturns as one in ping buffer device buffer Buf (j mod 3), its
Middle multiplexer 150 be for from be expected to respectively for user two come show one group of 3D picture (that is, one left 3D pictures with
One right 3D pictures) select or multiplexing selection (Select/Multiplex) 3D pictures.This for illustrative purposes only,
Not limitation of the present invention.According to a change case of the present embodiment, under the control of controller 130, especially believe in selection
Number SSELControl under, multiplexer 150 is by buffer Buf (j mod 3) upsets for one in ping buffer device.
In 924-4 steps, the execute instruction j++ of controller 130, to increase the numerical values recited of index j.
In 926-1 steps, under the control of controller 130, especially in switch-over control signal SSWControl under, buffering
Module 140 (or the buffering switch unit 142 in it) selects buffer Buf (j mod 3) for right 3D pictures R (i).
In 926-2 steps, above-mentioned video processing circuits (especially controller 130 and or decoder 120R) is performed paints
Figure instruction Draw (R (i)), to draw right 3D pictures R (i).Drawing for order Draw (R (i)) can be a program, and the program bag contains
For the multiple instruction of right 3D pictures R (i), therefore drawing for order Draw (R (i)) can include many sub-steps.
In 926-3 steps, controller 130 performs upset instruction Flip (j mod 3), by buffer Buf (j mod
3) upset is for one in ping buffer device.For example：Under the control of controller 130, especially in switch-over control signal SSWControl under,
Buffer module 140 (or the buffering switch unit 142 in it) overturns as one in ping buffer device buffer Buf (j mod 3), its
Middle multiplexer 150 be for from be expected to respectively for user two come show one group of 3D picture (that is, one left 3D pictures with
One right 3D pictures) select or multiplexing one 3D pictures of selection.This for illustrative purposes only, not to limit of the invention
System.According to a change case of the present embodiment, under the control of controller 130, especially in selection signal SSELControl under, it is many
Work device 150 is by buffer Buf (j mod 3) upsets for one in ping buffer device.
In 926-4 steps, the execute instruction j++ of controller 130, to increase the numerical values recited of index j.
In 928 steps, controller 130 checks the need for the flow 920 that is stopped.It is stopped when needs are detected
Flow 920, then power cut-off flow 920；Otherwise, into step 929.
In 929 steps, the execute instruction i++ of controller 130, to increase the numerical values recited of index i.In execution step 929
Afterwards, step 924-1 is reentered.
Refer to Fig. 7 A, the quantity of the plurality of buffer 144 can be equal to five, wherein buffer 144 comprising buffer 1441,
1442nd, 1443,1444 and 1445.Especially, as shown in part 144-1 above in Fig. 7 A, buffer 1441,1442,1443,
Both of 1444 and 1445 are chosen as the rwo of the multiple buffers 144 described in step 912 in a particular moment.In addition, such as
Below in Fig. 7 A shown in the 144-2 of part, other buffers in buffer 1441,1442,1443,1444 and 1445 are special herein
At least one other buffers being chosen as in the multiple buffers 144 described in step 914 are carved in timing.In order to make it easy to understand, figure
7A illustrates the exemplary situation in this particular moment：Buffer 1441 and 1442 is chosen as the multiple buffers described in step 912
144 the rwo and buffer 1443,1444 and 1445 be chosen as in the multiple buffers 144 described in step 914 this at least
One other buffers.
In under the control of controller 130, especially in switch-over control signal SSWControl under, " buffer module 140 is utilized
Buffer 1441,1442,1443,1444 and 1445 both as two in ping buffer device " and " the two are in ping buffer device point
The left 3D pictures of be expected to show for user's left eye one Yong Lai not stored and be expected to show for user's right eye
Under the situation of the right 3D pictures for showing ", buffer module 140 is using its in buffer 1441,1442,1443,1444 and 1445
Its buffer is used as off screen buffer.For example：Buffer module 140 by the use of buffer 1441 and 1442 as it is above-mentioned the two
Under the situation of ping buffer device, buffer module 140 is by the use of other buffers 1443,1444 and 1445 as off screen buffer.Then,
Buffer 1441 and 1442 can be used to export and be expected to the one group of 3D picture for being shown for user two respectively (for example：Should
Left 3D pictures and the right 3D pictures).
Refer to Fig. 7 B, it is assumed that symbol Buf (1), Buf (2), Buf (3), Buf (4) are respectively intended to represent and delay with Buf (5)
Rush device 1441,1442,1443,1444 and 1445.When buffer Buf (1) and Buf (2) store respectively a left 3D pictures L (0) and
One right 3D pictures R (0), buffer Buf (1), Buf (2), Buf (3), Buf (4) such as delay with another buffer in Buf (5)
Device Buf (3) is rushed to can be used to draw next left 3D pictures L (1), and it is hatched block in order to manage therefore to be shown
Solution.Buffer Buf (1), Buf (2), Buf (3), Buf (4) correspond to a vertical synchronization with each transition of the content of Buf (5)
The all vertical synchronizing signal VSYNC (being not depicted in Fig. 7 B) described above of signal.Due to the method 910 shown in application drawing 4, buffer
Contents of the Buf (1) in the different cycles of vertical synchronizing signal VSYNC can be respectively sequence { L (0), L (0), L (0), R (2), R
(2) related 3D pictures in ... }.In addition, contents of the buffer Buf (2) in the different cycles of vertical synchronizing signal VSYNC
Related 3D pictures in sequence { R (0), R (0), R (0), R (0), L (3) ... } can be respectively.Additionally, buffer Buf (3) is in vertical
Content in the different cycles of straight synchronizing signal VSYNC can be respectively in sequence { L (1), L (1), L (1), L (1), L (1) ... }
Related 3D pictures.For buffer Buf (4) and Buf (5), symbol X shown in Fig. 7 B representative in the present embodiment meaning
It is " undefined or determined ", wherein the content of buffer for being denoted as symbol X is typically undefined or determined.In this way, buffering
Contents of the device Buf (4) in the different cycles of vertical synchronizing signal VSYNC can be respectively sequence { X, R (1), R (1), R (1), R
(1) related element or 3D pictures in ... }.In addition, buffer Buf (5) is in the different cycles of vertical synchronizing signal VSYNC
Content can be respectively related element or 3D pictures in sequence { X, X, L (2), L (2), L (2) ... }.
Refer to Fig. 7 C, vertical synchronizing signal VSYNC is illustrated in that this is for reference, wherein buffer Buf (1), Buf (2),
Buf (3), Buf (4) correspond to the pulse in vertical synchronizing signal VSYNC with each transition of the content of Buf (5).Some are painted
Figure instruction such as drawing for order DRAW (L (0)), DRAW (R (0)), DRAW (L (1)), DRAW (R (1)), DRAW (L (2)), DRAW
(R (2)) ... wait be respectively intended to draw these 3D pictures L (0), R (0), L (1), R (1), L (2), R (2) ... etc., wherein these
3D pictures some of work as picture can be schematically shown as hatched block in order to understand.In addition, some upset instructions are such as turned over
Turn instruction Flip (1), Flip (2), Flip (3), Flip (4) and Flip (5) to be respectively intended in vertical synchronizing signal VSYNC
The pulse respective time point that each then arrives overturns buffer Buf (1), Buf (2), Buf (3), Buf (4) and Buf (5)
It is ping buffer device (it is with the block of thick line description).Similarly, the symbol X shown in Fig. 7 C is representative in the present embodiment
Meaning is " undefined or determined ", wherein the content of buffer for being denoted as symbol X is typically undefined or determined.
Note that in the present embodiment, in buffer Buf (1), Buf (2), Buf (3), Buf (4) and Buf (5) one
Person has just been reversed as one in ping buffer device, and the buffer for storing the content for just being removed from screen is reformed into an off screen shape
State.This for illustrative purposes only, not limitation of the present invention.According to a change case of the present embodiment, in buffering
Under situation of the quantity of device 144 not less than four, multiple buffers 144 described in step 912 the rwo (for example：In Fig. 7 A
Upper part 144-1) can be simultaneously in one in screen state, and the multiple buffers described in step 914 in above-mentioned particular moment
At least one other buffers in 144 can be at an off screen state in this particular moment.In addition, in the end in current cycle,
At the time point that a certain pulse then arrived in such as vertical synchronizing signal VSYNC occurs, those are considered as " described in step 912
Multiple buffers 144 the rwo " two buffers of script enter an off screen state, wherein buffer simultaneously immediately
Some of 144 other both instead of two buffers of script and while become in one in screen state.
In addition, some drawing for orders such as drawing for order DRAW (L (0)), DRAW (R (0)), DRAW (L (1)), DRAW (R
(1)), DRAW (L (2)), DRAW (R (2)) ... wait that to be lifted be the newest 3D in producing or obtaining Fig. 7 C illustrated embodiments
The example of the instruction of picture.This for illustrative purposes only, not limitation of the present invention.According to the one of the present embodiment
Change case, the instruction of other species can be used to produce or obtain newest 3D pictures.
Fig. 7 D are refer to, workflow 930 is the involved reality in the special case of the present embodiment of the method 910 shown in Fig. 4
Apply details, the wherein at least a portion available virtual source code in these implementation details is illustrated, to understand shown in Fig. 7 C
Buffer control.Especially, workflow 930 can be applied to above-mentioned video processing circuits.Note that the work shown in Fig. 7 D
Flow 930 (especially its step) for illustrative purposes only, not limitation of the present invention.Workflow 930 is said
It is bright as follows：
In 932 steps, controller 130 execute instruction i=0 and j=1 set the initial value for indexing i and j respectively
It is 0 and 1.
In 934-1 steps, under the control of controller 130, especially in switch-over control signal SSWControl under, buffering
Module 140 (or the buffering switch unit 142 in it) selects buffer Buf (j mod K), wherein K for left 3D pictures L (i)
It is a positive integer, and in the present embodiment, K is especially equal to five.
In 934-2 steps, above-mentioned video processing circuits (especially controller 130 and or decoder 120L) is performed paints
Figure instruction Draw (L (i)), to draw left 3D pictures L (i).Drawing for order Draw (L (i)) can be a program, and the program bag contains
For the multiple instruction of left 3D pictures L (i), therefore drawing for order Draw (L (i)) can include many sub-steps.
In 934-3 steps, controller 130 performs upset instruction Flip (j mod K), by buffer Buf (j mod
K) upset is for one in ping buffer device.For example：Under the control of controller 130, especially in switch-over control signal SSWControl under,
Buffer module 140 (or the buffering switch unit 142 in it) overturns as one in ping buffer device buffer Buf (j mod K), its
Middle multiplexer 150 be for from be expected to respectively for user two come show one group of 3D picture (that is, one left 3D pictures with
One right 3D pictures) select or multiplexing one 3D pictures of selection.This for illustrative purposes only, not to limit of the invention
System.According to a change case of the present embodiment, under the control of controller 130, especially in selection signal SSELControl under, it is many
Work device 150 is by buffer Buf (j mod K) upsets for one in ping buffer device.
In 934-4 steps, the execute instruction j++ of controller 130, to increase the numerical values recited of index j.
In 936-1 steps, under the control of controller 130, especially in switch-over control signal SSWControl under, buffering
Module 140 (or the buffering switch unit 142 in it) selects buffer Buf (j mod K) for right 3D pictures R (i).
In 936-2 steps, above-mentioned video processing circuits (especially controller 130 and or decoder 120R) is performed paints
Figure instruction Draw (R (i)), to draw right 3D pictures R (i).Drawing for order Draw (R (i)) can be a program, and the program bag contains
For the multiple instruction of right 3D pictures R (i), therefore drawing for order Draw (R (i)) can include many sub-steps.
In 936-3 steps, controller 130 performs upset instruction Flip (j mod K), by buffer Buf (j mod
K) upset is for one in ping buffer device.For example：Under the control of controller 130, especially in switch-over control signal SSWControl under,
Buffer module 140 (or the buffering switch unit 142 in it) overturns as one in ping buffer device buffer Buf (j mod K), its
Middle multiplexer 150 be for from be expected to respectively for user two come show one group of 3D picture (that is, one left 3D pictures with
One right 3D pictures) select or multiplexing one 3D pictures of selection.This for illustrative purposes only, not to limit of the invention
System.According to a change case of the present embodiment, under the control of controller 130, especially in selection signal SSELControl under, it is many
Work device 150 is by buffer Buf (j mod K) upsets for one in ping buffer device.
In 936-4 steps, the execute instruction j++ of controller 130, to increase the numerical values recited of index j.
In 938 steps, controller 130 checks the need for the flow 930 that is stopped.It is stopped when needs are detected
Flow 930, then power cut-off flow 930；Otherwise, into step 939.
In 939 steps, the execute instruction i++ of controller 130, to increase the numerical values recited of index i.In execution step 939
Afterwards, step 934-1 is reentered.
Fig. 8 A to Fig. 8 C are the involved implementation detail in another embodiment of the method 910 shown in Fig. 4.According to this implementation
Example, in addition to the element shown in Figure 1A, above-mentioned video processing circuits additionally comprises a display device detector 170, and shows
Device detector 170 is for detecting the type of the display device for being coupled to above-mentioned video display system (for example：One 3D types or
One non-3D (Non-3D) type), wherein in response to the change on framework, above-mentioned video display system is in fig. 8 a with label 100 "
To represent.For example：Video display system 100 " be coupled to video display system 100 " display device between connection 58F can
For a high-resolution multimedia interface (High-Definition Multimedia Interface, HDMI) is connected.
According to the present embodiment, display device detector 170 is to be coupled to video display system 100 for detecting " display
Whether device is a 3D display devices.Fig. 8 B are refer to, workflow 940 is the correlation running for type detection, and can be said
It is bright as follows：
In 942 steps, under the control of controller 130, display device detector 170 detects the display device, especially
Be detection be coupled to video display system 100 " display device type.
In 944 steps, based on the detection that display device detector 170 is carried out, controller 130 is checked and is coupled to video
Whether the display device of display system 100 " is a 3D display devices.When detecting a 3D display devices (for example：Shown in Figure 1B
3D display devices 58 be coupled to video display system 100 " situation under), into step 946-1；Otherwise (for example：In Fig. 8 A
Shown non-3D display devices 58N is coupled to video display system 100 " situation under), into step 946-2.
In 946-1 steps, controller 130 shows configuration using a 3D, such as Fig. 6 A to Fig. 6 D and Fig. 7 A to figure
7D is respectively shown in the 3D of disclosed implementation detail in any embodiment in the middle of embodiment and its some change case or change case
Display configuration.Then, buffer module 140 is operated in corresponding to a 3D patterns of 3D display configurations.
In 946-2 steps, controller 130 is using a non-3D displays configuration, the general configuration for such as being shown for 2D.In
It is that buffer module 140 is operated in corresponding to a non-3D patterns of the non-3D displays configuration.
Note that workflow 940 can be used when needing multiple.Based on workflow 940, video display system 100 "
Dynamically switch between the 3D patterns and the non-3D patterns.For example：When connection 58F is established, video display system
100 " can dynamically be switched between the 3D patterns and the non-3D patterns by performing the one or many of workflow 940.Again
For example：Be coupled to video display system 100 above-mentioned " display device type (for example：The 3D types or the non-3D types)
Under changeable situation, when the type changes, video display system 100 " can be by performing the one or many of workflow 940
Dynamically to switch between the 3D patterns and the non-3D patterns.
Fig. 8 C are the implementation detail involved in the special case of the present embodiment of method 910 shown in Fig. 4, wherein above-mentioned the
One group of buffer 1441L and 1441R by for the example for buffer 144, in order to illustrate the 3D patterns and the non-3D patterns it
Between difference.Assuming that the central only first group buffer 1441L and 1441R of buffer 144 in this special case can use.In the 3D moulds
In formula, buffer 1441L and 1441R is respectively intended to temporarily store a left 3D pictures and a right 3D pictures.When controller 130 is determined
Determine during by the 3D pattern switchings to the non-3D patterns, one of buffer 1441L and 1441R can be used to make in a particular moment
For one in ping buffer device, and the other of buffer 1441L and 1441R can be used as off screen buffering in this particular moment
Device.Under being the situation implemented with cheap or low order element in associated hardware resource, the quantity of buffer may be extremely
Be limited, therefore the quantity of the buffer in the quantity of buffer in above-mentioned part 144-1 and above-mentioned part 144-2 is in some shapes
Can be reduced under condition.For example：Under the situation shown in Fig. 8 C, the number of the buffer in left part 144-1 in Fig. 8 C lower half
Amount is equal to one equal to the quantity of the buffer in the right part 144-2 in, and Fig. 8 C lower half.
According to a change case of Fig. 8 C illustrated embodiments, based on some default settings (Default Setting) and or make
User sets (User Setting), and above-mentioned video processing circuits (especially its controller 130) allows user manually
Control the switching between the 3D patterns and the non-3D patterns.
One of benefit of the invention is, based on the framework in each embodiment disclosed above or change case, remains optimal
The target of overall efficiency can be reached easily.Especially, in associated hardware resource implemented with cheap or low order element
Situation under, the video display system of the method for the present invention, related video processing circuits and correlation still is able to remain overall
Efficiency.Therefore, the problem of correlation technique no longer there occurs.
The foregoing is only presently preferred embodiments of the present invention, all impartial changes done according to the claims in the present invention with repair
Decorations, should all belong to covering scope of the invention.
Claims (18)
1. a kind of method for carrying out video display control, the method is that video display control is carried out in a video display system,
Characterized in that, the method includes：
Dynamically by the use of multiple buffers both as the multiple for multiple three-dimensional pictures in ping buffer device, wherein the plurality of
Buffer is located in the video display system, wherein, the plurality of the rwo in ping buffer device is respectively intended to storage and is expected to
Left three-dimensional picture one of is shown for user's left eye and one of is expected to be shown for user's right eye right three-dimensional picture
Face；And
In by the use of any one in the rwo of the plurality of buffer as one during ping buffer device, dynamically using the plurality of
At least one other buffers in buffer as at least off screen buffer for an at least three-dimensional picture, wherein, should be from
Ping buffer device replaces storage and one of is expected to be shown for user's left eye left three-dimensional picture and is expected to be directed to user
Right eye one of shows right three-dimensional picture, and the plurality of buffer is according to upset instruction alternately as this in ping buffer device and the off screen
Buffer.
2. the method for claim 1, it is characterised in that dynamically by the use of the plurality of buffer the rwo as being directed to
Those of those three-dimensional pictures are additionally comprised in the step of ping buffer device：
Be utilized respectively the plurality of buffer the rwo as in the different cycles in ping buffer device.
3. method as claimed in claim 2, it is characterised in that dynamically by the use of the plurality of buffer the rwo as being directed to
Those of those three-dimensional pictures are additionally comprised in the step of ping buffer device：
By means of one of video display system multiplexer, be utilized respectively the plurality of buffer the rwo as in different
In cycle in ping buffer device, the wherein multiplexer is the output that one of those buffers person is selected for multiplexing.
4. method as claimed in claim 2, it is characterised in that it is the difference of a vertical synchronizing signal that those different cycles are
Cycle.
5. the method for claim 1, it is characterised in that the quantity of the plurality of buffer is odd number.
6. the method for claim 1, it is characterised in that additionally comprise：
Detecting is coupled to whether one of video display system display device is three-dimensional display apparatus.
7. a kind of video processing circuits, the video processing circuits is located in a video display system, it is characterised in that the video
Process circuit includes：
One controller, for controlling the running of the video processing circuits；
One de-multiplexer, for a three-dimensional video stream solution multiplexing is turned into a left video stream and a right video flowing；
Two Video Decoders, for decoding the left video stream respectively with the right video flowing to produce multiple three-dimensional pictures；And
One buffer module, for temporarily storing those three-dimensional pictures, the buffer module includes multiple buffers, wherein in the control
Under the control of device processed, the buffer module dynamically by the use of the plurality of buffer both as be directed to those three-dimensional pictures in extremely
Multiple of few a part of three-dimensional picture in ping buffer device, wherein, the plurality of the rwo in ping buffer device is respectively intended to storage in advance
Meter one of will show left three-dimensional picture for user's left eye and one of be expected to be shown for user's right eye the right side three
Dimension picture；And under the control of the controller, shielding as one in by the use of any one in the rwo of the plurality of buffer
During buffer, the buffer module is dynamically by the use of at least one other buffers in the plurality of buffer as at least one
An at least off screen buffer of three-dimensional picture；Wherein, the off screen buffer replaces storage and is expected to show for user's left eye
One of show left three-dimensional picture and one of be expected to be shown for user's right eye right three-dimensional picture, the plurality of buffer according to
Upset instruction is alternately as this in ping buffer device and the off screen buffer.
8. video processing circuits as claimed in claim 7, it is characterised in that the buffer module is utilized respectively the plurality of buffer
The rwo as in the different cycles in ping buffer device.
9. video processing circuits as claimed in claim 8, it is characterised in that additionally comprise：
One multiplexer, the output of one of those buffers person is selected for multiplexing；
Wherein by means of the multiplexer, the buffer module be utilized respectively the plurality of buffer the rwo as in the different cycles
It is interior in ping buffer device.
10. video processing circuits as claimed in claim 8, it is characterised in that it is a vertical synchronization that those different cycles are
The different cycle of signal.
11. video processing circuits as claimed in claim 7, it is characterised in that the quantity of the plurality of buffer is odd number.
12. video processing circuits as claimed in claim 7, it is characterised in that additionally comprise：
One display device detector, is coupled to whether one of video display system display device is Three-dimensional Display dress for detecting
Put.
13. 1 video display systems, it is characterised in that it includes：
One video processing circuits, the video processing circuits is included：
One controller, for controlling the running of the video processing circuits；
One de-multiplexer, for a three-dimensional video stream solution multiplexing is turned into a left video stream and a right video flowing；
Two Video Decoders, for decoding the left video stream respectively with the right video flowing to produce multiple three-dimensional pictures；And
One buffer module, for temporarily storing those three-dimensional pictures, the buffer module includes multiple buffers, wherein in the control
Under the control of device processed, the buffer module dynamically by the use of the plurality of buffer both as be directed to those three-dimensional pictures in extremely
Multiple of few a part of three-dimensional picture in ping buffer device, wherein, the plurality of the rwo in ping buffer device is respectively intended to storage in advance
Meter one of will show left three-dimensional picture for user's left eye and one of be expected to be shown for user's right eye the right side three
Dimension picture；And under the control of the controller, shielding as one in by the use of any one in the rwo of the plurality of buffer
During buffer, the buffer module is dynamically by the use of at least one other buffers in the plurality of buffer as at least one
An at least off screen buffer of three-dimensional picture；Wherein, the off screen buffer replaces storage and is expected to show for user's left eye
One of show left three-dimensional picture and one of be expected to be shown for user's right eye right three-dimensional picture, the plurality of buffer according to
Upset instruction is alternately as this in ping buffer device and the off screen buffer.
14. video display systems as claimed in claim 13, it is characterised in that the buffer module is utilized respectively the plurality of buffering
The rwo of device as in the different cycles in ping buffer device.
15. video display systems as claimed in claim 14, it is characterised in that the video processing circuits is additionally comprised：
One multiplexer, the output of one of those buffers person is selected for multiplexing；
Wherein by means of the multiplexer, the buffer module be utilized respectively the plurality of buffer the rwo as in the different cycles
It is interior in ping buffer device.
16. video display systems as claimed in claim 14, it is characterised in that those different cycles are vertical synchronization news
Number the different cycles.
17. video display systems as claimed in claim 13, it is characterised in that the quantity of the plurality of buffer is odd number.
18. video display systems as claimed in claim 13, it is characterised in that the video processing circuits is additionally comprised：
One display device detector, is coupled to whether one of video display system display device is Three-dimensional Display dress for detecting
Put.
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| CN201510125038.6A CN104717484B (en) | 2010-11-26 | 2010-11-26 | Carry out method, video processing circuits and the video display system of video display control |
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| CN201080018388.8A CN102741917B (en) | 2010-11-26 | 2010-11-26 | Method for performing video display control within a video display system, and associated video processing circuit and video display system |
| CN201510125038.6A CN104717484B (en) | 2010-11-26 | 2010-11-26 | Carry out method, video processing circuits and the video display system of video display control |
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| CN201080018388.8A Division CN102741917B (en) | 2010-11-26 | 2010-11-26 | Method for performing video display control within a video display system, and associated video processing circuit and video display system |
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Citations (4)
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|---|---|---|---|---|
| CN1414794A (en) * | 2001-10-22 | 2003-04-30 | 矽统科技股份有限公司 | Equipment and method of displaying stereo cartoon in viewing window |
| CN1450816A (en) * | 2003-04-22 | 2003-10-22 | 上海大学 | Stereo video stream coder/decoder and stereo video coding/decoding system |
| CN101394510A (en) * | 2007-09-17 | 2009-03-25 | 映佳科技股份有限公司 | Video input and output apparatus having screen display generation and method thereof |
| CN101778272A (en) * | 2009-01-12 | 2010-07-14 | 联发科技股份有限公司 | Display apparatus, video generation apparatus, and method thereof |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2003291772A1 (en) * | 2003-12-19 | 2005-07-05 | Tdvision Corporation S.A. De C.V. | 3d videogame system |
| TWI245560B (en) * | 2004-08-19 | 2005-12-11 | Realtek Semiconductor Corp | Video data processing method and apparatus capable of saving bandwidth |
| US8786674B2 (en) * | 2010-11-26 | 2014-07-22 | Mediatek Singapore Pte. Ltd. | Method for performing video display control within a video display system, and associated video processing circuit and video display system |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1414794A (en) * | 2001-10-22 | 2003-04-30 | 矽统科技股份有限公司 | Equipment and method of displaying stereo cartoon in viewing window |
| CN1450816A (en) * | 2003-04-22 | 2003-10-22 | 上海大学 | Stereo video stream coder/decoder and stereo video coding/decoding system |
| CN101394510A (en) * | 2007-09-17 | 2009-03-25 | 映佳科技股份有限公司 | Video input and output apparatus having screen display generation and method thereof |
| CN101778272A (en) * | 2009-01-12 | 2010-07-14 | 联发科技股份有限公司 | Display apparatus, video generation apparatus, and method thereof |
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