CN104617777A - High-gain low-switching-voltage stress interleaved BOOST converter and working method - Google Patents

Abstract

The invention discloses a high-gain low switching voltage stress interleaved parallel BOOST converter and a working method. One end of a first inductance is connected to the drain of a first MOS transistor, the other end of the first inductance is connected to one end of a second inductance, and the first inductance is connected to a second inductance. The source of the MOS transistor is connected to the source of the second MOS transistor, the source of the second MOS transistor is connected to the source of the third MOS transistor, the drain of the second MOS transistor is connected to the other end of the second inductor, and one end of the second inductor is also One end of the leakage inductance of the transformer is connected, the other end of the leakage inductance of the transformer is connected to the input end of the primary side of the transformer, and the drain of the third MOS transistor is connected to the output end of the primary side of the transformer and the anode of the fourth diode, which makes the diode of a lower voltage level And MOS transistors with lower on-resistance can be selected to further reduce switching loss and conduction loss.

Description

High-gain low switch voltage stress crisscross parallel BOOST converter and method of work

Technical field

The present invention relates to electronic circuit automation control area, particularly relate to a kind of high-gain low switch voltage stress crisscross parallel BOOST converter and method of work.

Background technology

Along with the environmental problem that global energy is in short supply and serious, new forms of energy resource is as photovoltaic, and fuel cell, wind energy, geothermal energy etc. are paid close attention to widely in the whole world.But the output voltage of most of new forms of energy resources as photovoltaic, fuel cell is lower, needs a kind of converter of high-gain in actual applications.In theory, boost, buck-boost and flyback converter can provide higher voltage gain when extreme duty ratio.In fact, the voltage gain of these converters is but limited to switching tube, diode, the equivalent series resistance of inductance and electric capacity, the impact of leakage inductance.And, not only can introduce very large current ripples when extreme duty ratio and increase conduction loss, also can introduce very serious diode reverse recovery problem.

Therefore, for improving converter conversion efficiency and the extreme duty ratio situation avoiding work, the 2 stage converter of many quadratic transformation devices and tandem structure is suggested.Then, because the converter topology of two-layer configuration is complicated, efficiency reduces.And the stability of converter is the reverse-recovery problems of a problem and more serious output diode.As a result, final efficiency comparison is low, and corresponding electromagnetic interference (EMI) noise ratio is more serious.Isolated converter can obtain higher voltage gain easily when there being transformer.But the leakage inductance of transformer not only can cause voltage and current spike, introduce higher switch tube voltage stress, but also can increase loss and noise, result causes efficiency lower.RCD clamp circuit and active clamping circuir can reduce voltage stress and switching loss, but be cost with converter topology complex structure and relevant clamp circuit loss.

In order to obtain higher conversion efficiency, a large amount of non-isolated converters based on coupling inductance is widely studied because its circuit structure is simple and conduction loss is little.But they but need buffer to limit the switch tube voltage spike caused by the leakage inductance of coupling inductance.Therefore, voltage clamping circuit, active clamping circuir, passive regeneration buffer circuit has been suggested and has addressed this is that.But all these methods are all by increasing switching tube and electric capacity, which results in transformer configuration and complicate.Based on the non-isolated high-gain converter of the integrated isolated converter of boost, as integrated boost-flyback converter and integrated boost-SEPIC converter are suggested in the literature.Coupling inductance, as transformer, improves voltage gain by regulating winding turns ratio.In addition, leakage inductance energy is directly recycled in output, and like this, the due to voltage spikes of switching tube can be limited.And the cut-off current of output diode can be coupled the leakage inductance restriction of inductance, and the reverse-recovery problems of diode alleviates, and relevant loss also reduces.But the voltage stress of output diode but adds along with the increase of the turn ratio of coupling inductance.Therefore, the reverse-recovery problems of diode still exists.Although avoid extreme duty ratio, input current ripple controls to become very large due to the Single switch of circuit, and this makes these converters all be unsuitable for application scenario that is high-power, big current.Traditional crisscross parallel boost converter, due to the simple and less input and output ripple of its result, is reasonable selection in the application of high-power and power factor correction.But voltage gain is lower, switching capacity, transformer or coupling inductance in order to address these problems, are integrated in traditional crisscross parallel boost converter close to output voltage by the voltage stress of switching tube and diode.Therefore, the converter being applicable to powerful high-gain, high efficiency, low voltage stress is obtained.

Interleaving and Transformer Paralleling boost converter becomes the better selection of new energy resources system because of its structure is simple and input and output ripple is little feature.But the voltage gain of traditional crisscross parallel boost converter is lower.Therefore, forward converter and code converter is integrated in traditional crisscross parallel boost converter and is suggested.Higher voltage gain can not only be obtained and the voltage stress of switching tube and diode can also be reduced.But, integrated forward converter and code converter circuit is quite complicated and expensive.General, with normal shock type and code converter is compared, and flyback converter can obtain higher voltage gain, and circuit structure is simpler.Therefore, flyback converter is integrated in traditional interleaved parallel converter is also that another one is selected preferably.

Summary of the invention

The present invention is intended at least solve the technical problem existed in prior art, especially innovatively proposes a kind of high-gain low switch voltage stress crisscross parallel BOOST converter and method of work.

In order to realize above-mentioned purpose of the present invention, the invention provides a kind of high-gain low switch voltage stress crisscross parallel BOOST converter, its key is, comprise: the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor, the first inductance, the second inductance, transformer leakage inductance, the first diode, the second diode, the 3rd diode, the 4th diode, load, output capacitance, first electric capacity, the second electric capacity, transformer

First inductance one end connects the first metal-oxide-semiconductor drain electrode, the described first inductance other end connects second inductance one end, described first metal-oxide-semiconductor source electrode connects the second metal-oxide-semiconductor source electrode, described second metal-oxide-semiconductor source electrode connects the 3rd metal-oxide-semiconductor source electrode, the described second metal-oxide-semiconductor drain electrode connection second inductance other end, also connection transformer leakage inductance one end, described second inductance one end, described transformer leakage inductance other end connection transformer primary side input, described 3rd metal-oxide-semiconductor drain electrode connection transformer primary side output and the 4th diode cathode, described 4th diode cathode connects second metal-oxide-semiconductor drain electrode and second electric capacity one end, the described first inductance other end is connection transformer secondary side input and first electric capacity one end also, the described first electric capacity other end connects the first diode cathode and the 3rd diode cathode, described 3rd diode cathode connection transformer secondary side output, described first diode cathode connects the second electric capacity other end and the second diode cathode, described second diode cathode connects output capacitance one end and load one end respectively, the described output capacitance other end connects the 3rd metal-oxide-semiconductor source electrode, the described load other end connects the 3rd metal-oxide-semiconductor source electrode.

The present invention also discloses a kind of method of work of high-gain low switch voltage stress crisscross parallel BOOST converter, and its key is, arranges three metal-oxide-semiconductor work schedules, and a time cycle of metal-oxide-semiconductor conducting, shutoff is divided into t ₀, t ₁, t ₂, t ₃, t ₄, t ₅six time points, described method of work comprises:

Step 1, at t ₀to t ₁in the stage, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor conducting, the first diode, the second diode, the 3rd diode, the 4th diode all turns off, the first inductance, the current i in the second inductance and transformer leakage inductance _l1, i _l2and i _llklinear increase, load energy is provided by output capacitance, and the voltage at the 4th diode two ends is close to zero;

Step 2, at t ₁to t ₂stage, second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor conducting, first metal-oxide-semiconductor turns off, second diode, the 3rd diode, the 4th diode turn off, first diode current flow, the energy be stored in the first inductance and the first electric capacity is delivered to the second electric capacity by the first diode, and output capacitance provides energy to load;

Step 3, at t ₂to t ₃in the stage, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor conducting, the first diode, the second diode, the 3rd diode, the 4th diode all turns off, the first inductance, the current i in the second inductance and transformer leakage inductance _l1, i _l2and i _llklinear increase, load energy is provided by output capacitance, and the voltage at the 4th diode two ends is close to zero;

Step 4, at t ₃to t ₄stage, first metal-oxide-semiconductor conducting, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor turn off, and the first diode turns off, second diode, the 3rd diode, the 4th diode current flow, electric current in first inductance linearly increases, and the energy be stored in the second inductance and the second electric capacity is discharged into output capacitance and load by the second diode, simultaneously, be stored in energy in transformer leakage inductance by the 4th diode, second electric capacity, the second diode is discharged into output capacitance and load, at t ₄in the moment, the electric current of the 4th diode and transformer leakage inductance is reduced to zero, and the energy be stored in transformer discharges to make up the energy that previous stage first, electric capacity discharged by the 3rd diode to the first electric capacity;

Step 5, at t ₄to t ₅stage, first metal-oxide-semiconductor conducting, second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor turn off, second diode, the 3rd diode current flow, first diode, the 4th diode turn off, electric current in first inductance linearly increases, and is stored in fault offset in transformer to the first electric capacity, and exporting energy is provided by the second inductance and the second electric capacity.

The method of work of described high-gain low switch voltage stress crisscross parallel BOOST converter, preferably, described step 4 comprises:

The magnetizing inductance L of transformer is set _m, and hypothesis K=L _m/ (L _m+ L _lk), transformer leakage inductance L _lkin energy be discharged into output by the 4th diode, exergonic duty ratio D _d4for:

$D_{D4}=\frac{2(1-D)}{1+N}.$

The method of work of described high-gain low switch voltage stress crisscross parallel BOOST converter, preferably, also comprises the step arranging voltage gain:

Export V _oto input V _iNvoltage gain M, by the voltage-second balance principle of the first inductance and the second inductance, obtain:

V _IN+V _C1(1-D)-V _C2(1-D)＝0，

V _IN+V _C2(1-D)-V _O(1-D)＝0，

First electric capacity is the output capacitance of flyback converter, therefore, and the voltage V of the first electric capacity _c1for:

k is the ratio that transformer primary side magnetizing inductance and former limit magnetizing inductance add transformer leakage inductance, and N is the ratio of transformer secondary umber of turn and former limit umber of turn, and D is duty ratio;

Will substitute into V _iN+ V _c1(1-D)-V _c2(1-D)=0 and V _iN+ V _c2(1-D)-V _o(1-D)=0 voltage obtaining the second electric capacity and output capacitance is respectively:

$V_{C2}=\frac{1+\mathrm{KND}}{1-D}{V}_{\mathrm{IN}},$

$V_O=\frac{2+\mathrm{KND}}{1-D}{V}_{\mathrm{IN}},$

Therefore voltage gain is:

$M=\frac{V_O}{V_{\mathrm{IN}}}=\frac{2+\mathrm{KND}}{1-D},$

Because magnetizing inductance L _mmuch larger than transformer leakage inductance L _lk, therefore K is close to 1, and as K=1, ideal voltage gain is:

$M=\frac{2+\mathrm{ND}}{1-D}.$

The method of work of described high-gain low switch voltage stress crisscross parallel BOOST converter, preferably, also comprises the step arranging voltage stress:

According to Kirchhoff's second law, the voltage stress of the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor and the first diode, the second diode, the 3rd diode, the 4th diode must be:

$V_{S1,\max }=V_{S2,\max }=\frac{V_{\mathrm{IN}}}{1-D}=\frac{V_O}{2+\mathrm{KND}},$

$V_{S3,\max }=\frac{V_O}{2(2+\mathrm{KND})}(2+\mathrm{KD}-D+\mathrm{ND}-\mathrm{KND}),$

$V_{D1,\max }=\frac{2V_{\mathrm{IN}}}{1-D}=\frac{2V_O}{2+\mathrm{KND}},$

$V_{D2,\max }=\frac{V_{\mathrm{IN}}}{1-D}=\frac{V_O}{2+\mathrm{KND}},$

$V_{D3,\max }=\frac{N{V}_{\mathrm{IN}}}{1-D}=\frac{N{V}_O}{2+\mathrm{KND}},$

$V_{D4,\max }=\frac{V_O}{2(2+\mathrm{KND})}(D-\mathrm{KD}+\mathrm{KND}-\mathrm{ND}),$

Make K=1, the voltage stress distribution of the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor and the first diode, the second diode, the 3rd diode, the 4th diode is:

$V_{S1,\max }=V_{S2,\max }=V_{S3,\max }=V_{D2,\max }=\frac{V_{\mathrm{IN}}}{1-D}=\frac{V_O}{2+\mathrm{ND}},$

$V_{D1,\max }=\frac{2V_{\mathrm{IN}}}{1-D}=\frac{2V_O}{2+\mathrm{ND}},$

$V_{D3,\max }=\frac{N{V}_{\mathrm{IN}}}{1-D}=\frac{N{V}_O}{2+\mathrm{ND}},$

V _D4,max＝0。

In sum, owing to have employed technique scheme, the invention has the beneficial effects as follows:

Described converter adopts Interleaving and Transformer Paralleling to reduce input and output ripple.Flyback converter is integrated in traditional crisscross parallel Boost, and the transformer primary side winding of flyback converter is directly connected with output.Therefore, the leakage inductance energy of transformer can be recycled, thus improves transducer effciency.In addition, the switching capacity of increase reduces the voltage stress of switching tube and diode as voltage divider, and this makes the diode of more low-voltage-grade can be selected to reduce switching loss and conduction loss further with the switching tube with more low on-resistance.

Additional aspect of the present invention and advantage will part provide in the following description, and part will become obvious from the following description, or be recognized by practice of the present invention.

Accompanying drawing explanation

Above-mentioned and/or additional aspect of the present invention and advantage will become obvious and easy understand from accompanying drawing below combining to the description of embodiment, wherein:

Fig. 1 is high-gain switching voltage stress crisscross parallel BOOST variator circuit diagram of the present invention;

Fig. 2 is high-gain switching voltage stress crisscross parallel BOOST variator oscillogram of the present invention;

Fig. 3 is high-gain switching voltage stress crisscross parallel BOOST variator equivalent circuit diagram of the present invention;

Fig. 4 is high-gain switching voltage stress crisscross parallel BOOST variator equivalent circuit diagram of the present invention;

Fig. 5 is high-gain switching voltage stress crisscross parallel BOOST variator equivalent circuit diagram of the present invention;

Fig. 6 is high-gain switching voltage stress crisscross parallel BOOST variator equivalent circuit diagram of the present invention.

Embodiment

Be described below in detail embodiments of the invention, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Being exemplary below by the embodiment be described with reference to the drawings, only for explaining the present invention, and can not limitation of the present invention being interpreted as.

In describing the invention, it will be appreciated that, term " longitudinal direction ", " transverse direction ", " on ", D score, "front", "rear", "left", "right", " vertically ", " level ", " top ", " end " " interior ", the orientation of the instruction such as " outward " or position relationship be based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, instead of indicate or imply that the device of indication or element must have specific orientation, with specific azimuth configuration and operation, therefore can not be interpreted as limitation of the present invention.

In describing the invention, unless otherwise prescribed and limit, it should be noted that, term " installation ", " being connected ", " connection " should be interpreted broadly, such as, can be mechanical connection or electrical connection, also can be the connection of two element internals, can be directly be connected, also indirectly can be connected by intermediary, for the ordinary skill in the art, the concrete meaning of above-mentioned term can be understood as the case may be.

As shown in Figure 1, the invention provides a kind of high-gain low switch voltage stress crisscross parallel BOOST converter, its key is, comprise: the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor, the first inductance, the second inductance, transformer leakage inductance, the first diode, the second diode, the 3rd diode, the 4th diode, load, output capacitance, first electric capacity, the second electric capacity, transformer

First inductance one end connects the first metal-oxide-semiconductor drain electrode, the described first inductance other end connects second inductance one end, described first metal-oxide-semiconductor source electrode connects the second metal-oxide-semiconductor source electrode, described second metal-oxide-semiconductor source electrode connects the 3rd metal-oxide-semiconductor source electrode, the described second metal-oxide-semiconductor drain electrode connection second inductance other end, also connection transformer leakage inductance one end, described second inductance one end, described transformer leakage inductance other end connection transformer primary side input, described 3rd metal-oxide-semiconductor drain electrode connection transformer primary side output and the 4th diode cathode, described 4th diode cathode connects second metal-oxide-semiconductor drain electrode and second electric capacity one end, the described first inductance other end is connection transformer secondary side input and first electric capacity one end also, the described first electric capacity other end connects the first diode cathode and the 3rd diode cathode, described 3rd diode cathode connection transformer secondary side output, described first diode cathode connects the second electric capacity other end and the second diode cathode, described second diode cathode connects output capacitance one end and load one end respectively, the described output capacitance other end connects the 3rd metal-oxide-semiconductor source electrode, the described load other end connects the 3rd metal-oxide-semiconductor source electrode.

In the circuit proposed in Fig. 1.Switching tube S ₃for the electric current in static exciter inductance provides a path flowing into output, because this reducing switching tube S ₂current stress and conduction loss, reduce input current ripple.Work as S ₂during shutoff, diode D ₄stop and be stored in inductance L ₂in energy transferring in transformer primary side winding, but allow it be delivered to output.Meanwhile, D is passed through ₄the leakage inductance energy of converter can be used in output.Diode D ₄voltage stress close to zero, this reduces D greatly ₄reverse-recovery problems, thus improve efficiency.Switching tube S ₃use reduce S ₂current stress, thus can select the MOSFET of more low current level for these two switching tubes.Although add a switching tube in circuit, loss is not corresponding to be increased.Described S ₁, S ₂, S ₃grid is connection control device respectively.

The operation principle of the converter proposed can be able to be set forth from the key job waveform Fig. 2.In order to simplify, suppose that elements all in Fig. 2 is all desirable except transformer, and all to work in the steady state.In order to describe S ₃and D ₄effect, consider the leakage inductance L of transformer _lk.In circuit analysis, the converter of proposition is operated in continuous mode (CCM), and under stable state, duty ratio is greater than 0.5, switching tube S ₁and S ₂there are 180 ° of phase places, S during work ₂and S ₃there is during work 0 ° of phase place.The corresponding 5 kinds of circuit working mode of the stable state waveform of the converter proposed in a switch periods.Operation mode is described below.

(1) mode 1 [t0<t≤t1]: switching tube S ₁, S ₂, S ₃conducting, diode D ₁, D ₂, D ₃, D ₄whole shutoff, corresponding current path is as Fig. 3.As can be seen from the figure, inductance L ₁, L ₂with transformer leakage inductance L _lkin current i _l1, i _l2and i _llklinear increase, load energy is provided by output capacitance.In addition, due to S ₂, S ₃conducting, diode D ₄the voltage at two ends close to zero, therefore, D ₄reverse-recovery problems reduce greatly, corresponding efficiency improves.

(2) mode 2 [t1<t≤t2]: switching tube S ₂, S ₃still conducting, S ₁turn off, diode D ₂, D ₃, D ₄turn off, D ₁conducting, corresponding current path is as Fig. 4.Be stored in inductance L ₁with electric capacity C ₁in energy pass through D ₁be delivered to C ₂, output capacitance C _othere is provided energy still to load R.

(3) mode 3 [t2<t≤t3]: as can be seen from Figure 3, S ₁, S ₂, S ₃conducting, corresponding current path is identical with Fig. 3.

(4) mode 4 [t3<t≤t4]: S ₁conducting, S ₂, S ₃turn off, D ₁turn off, D ₂, D ₃, D ₄conducting, corresponding current path is as Fig. 5.Inductance L ₁in electric current linearly increase, be stored in inductance L ₂with electric capacity C ₂in energy pass through D ₂be discharged into output capacitance C _owith load R.Meanwhile, leakage inductance L is stored in _lkin energy pass through D ₄, C ₂, D ₂be discharged into C _owith load R.At t ₄moment, D ₄and L _lkelectric current be reduced to zero.In addition, the energy be stored in transformer passes through D ₃to electric capacity C ₁release is to make up C previous stage ₁the energy of release.

(5) mode 4 [t4<t≤t5]: switching tube S ₁still conducting, S ₂, S ₃turn off, diode D ₂, D ₃conducting, D ₁, D ₄turn off, corresponding current path is as Fig. 6.Inductance L ₁in electric current still linearly increase, the energy be stored in transformer still discharges to C ₁, export energy by inductance L ₂with electric capacity C ₂there is provided.So far, the operating state of a switch periods is completed.

The magnetizing inductance L of transformer will be considered _m, and hypothesis K=L _m/ (L _m+ L _lk).In mode 4, leakage inductance L _lkin energy pass through D ₄be discharged into output, exergonic duty ratio D _d4for:

$D_{D4}=\frac{2(1-D)}{1+N}---\left(1\right)$

In addition, can find out easily from Fig. 3-6, other mode (1,2,3,5) duty ratio under is respectively (D-0.5), (1-D), (D-0.5), (1-D) (N-1)/(1+N).

Voltage gain

First V is exported _oto input V _iNvoltage gain M (or voltage transitions rate).Pass through inductance L ₁and L ₂voltage-second balance principle, can obtain:

V _IN+V _C1(1-D)-V _C2(1-D)＝0 (2)

V _IN+V _C2(1-D)-V _O(1-D)＝0 (3)

Switching capacity C ₁the output capacitance of flyback converter can be regarded as, therefore, C ₁voltage V _c1for:

k is the ratio that transformer primary side magnetizing inductance and former limit magnetizing inductance add transformer leakage inductance, the i.e. coupling coefficient of transformer primary side inductance, and N is the ratio of transformer secondary umber of turn and former limit umber of turn.D is duty ratio.

(4) are substituted into (2) and (3) electric capacity C can be obtained ₂and C _ovoltage be respectively:

$V_{C2}=\frac{1+\mathrm{KND}}{1-D}{V}_{\mathrm{IN}}---\left(5\right)$

$V_O=\frac{2+\mathrm{KND}}{1-D}{V}_{\mathrm{IN}}---\left(6\right)$

Therefore voltage gain is:

$M=\frac{V_O}{V_{\mathrm{IN}}}=\frac{2+\mathrm{KND}}{1-D}---\left(7\right)$

Because magnetizing inductance L _mmuch larger than leakage inductance L _lk, therefore K is close to 1.As K=1, ideal voltage gain is:

$M=\frac{2+\mathrm{ND}}{1-D}---\left(8\right)$

The converter proposed and ideal voltage gain are when K=1, N=3 and the function relation curve of duty ratio.The converter proposed easilier can obtain high voltage gain than other two converters.When identical voltage gain, the converter of proposition has less duty ratio, and therefore, extreme duty ratio can be avoided, and conduction loss also can reduce.

Each element voltage stress

For ease of the voltage stress analysis of each element of the converter of proposition, ignore the ripple voltage of electric capacity, according to Kirchhoff's second law, each switching tube S ₁-S ₃with diode D ₁-D ₄voltage stress can be:

$V_{S1,\max }=V_{S2,\max }=\frac{V_{\mathrm{IN}}}{1-D}=\frac{V_O}{2+\mathrm{KND}}---\left(9\right)$

$V_{S3,\max }=\frac{V_O}{2(2+\mathrm{KND})}(2+\mathrm{KD}-D+\mathrm{ND}-\mathrm{KND})---\left(10\right)$

$V_{D1,\max }=\frac{2V_{\mathrm{IN}}}{1-D}=\frac{2V_O}{2+\mathrm{KND}}---\left(11\right)$

$V_{D2,\max }=\frac{V_{\mathrm{IN}}}{1-D}=\frac{V_O}{2+\mathrm{KND}}---\left(12\right)$

$V_{D3,\max }=\frac{N{V}_{\mathrm{IN}}}{1-D}=\frac{N{V}_O}{2+\mathrm{KND}}---\left(13\right)$

$V_{D4,\max }=\frac{V_O}{2(2+\mathrm{KND})}(D-\mathrm{KD}+\mathrm{KND}-\mathrm{ND})---\left(14\right)$

Compare for convenience, ignore transformer leakage inductance L _lk, namely make K=1, the voltage stress distribution of each switching tube and diode is:

$V_{S1,\max }=V_{S2,\max }=V_{S3,\max }=V_{D2,\max }=\frac{V_{\mathrm{IN}}}{1-D}=\frac{V_O}{2+\mathrm{ND}}---\left(15\right)$

$V_{D1,\max }=\frac{2V_{\mathrm{IN}}}{1-D}=\frac{2V_O}{2+\mathrm{ND}}---\left(16\right)$

$V_{D3,\max }=\frac{N{V}_{\mathrm{IN}}}{1-D}=\frac{N{V}_O}{2+\mathrm{ND}}---\left(17\right)$

V _D4,max＝0 (18)

Can find out that from (15) formula the voltage stress of each switching tube is much smaller than V _o/ 2, therefore, switching loss and conduction loss can reduce.As can be seen from (18) formula, diode D ₄voltage stress close to zero, its reverse-recovery problems reduces greatly, and the diode of more low-voltage-grade thus can be selected to reduce switch and conduction loss further.

The consideration of the mode of operation of the converter proposed

For the application of new forms of energy resource as photovoltaic, fuel cell, need the DC converter that a kind of voltage gain is high, input current ripple is little.Thus, the converter of proposition is a selection preferably.Due to cross structure, the converter of proposition not only provides higher voltage gain, and the useful life by suppressing input current ripple to extend fuel cell and battery block.The converter proposed is operated in continuous mode (CCM) than being operated in discrete mode (DCM) and is more suitable for.When DCM pattern, although can produce large output voltage and have little duty ratio, output voltage is more responsive to duty ratio.Therefore, the design of closed-loop feedback circuit is more complicated.And during DCM pattern, input current ripple is comparatively large, to such an extent as to can shorten the useful life of fuel cell, and corresponding system effectiveness also can reduce.Therefore, the converter of proposition is unsuitable for the application of new energy resources system when DCM pattern, the present invention only considers the situation of CCM pattern.When duty ratio is less than 0.5, the converter of proposition still can work, but now the voltage on transformer time limit is lower, and result makes output voltage lower.Therefore, the present invention only considers the situation that duty ratio is greater than 0.5.

For the practicality of the converter that checking proposes, build an input 24V, exported 200V, 200W, the experimental prototype of switching frequency 50KHZ.

In the design of this paper experimental prototype parameter, crucial design procedure is the design of the transformer turns ratio that can ensure area of safety operaton and select more low-voltage-grade element.After transformer turns ratio is determined, duty ratio can rationally be determined.Then, switching tube, diode, the electric pressure of electric capacity can be selected easily.In fact, switching tube, diode, duty ratio, the selection of the turn ratio needs compromise process.

The staggered pulse-width modulation MOSFET gate signal voltage V measured _gS1, V _gS2and V _gS3.Can find out, duty ratio D is greater than 0.5, and is 0.56, switching tube S ₁, S ₂driving gate signal phase be 180 °, S ₂, S ₃driving gate signal phase be 0 °.

Model machine component parameter

Just can obtain the output voltage of 200V easily when low-down duty ratio 0.56, each switching capacity is that the voltage stress reducing each switching tube and diode assume responsibility for most of voltage.Experiment proves, its voltage is approximately 54V, much smaller than output voltage, and close to 1/4 of output voltage.Therefore, the switching tube of more low-voltage-grade can be selected to reduce conduction loss and switching loss further.Experiment proves, D ₂voltage be about 54V, equal the voltage of switching tube, conform to (15) formula of steady-state analysis, D ₁voltage much smaller than output voltage.The same with (18) formula, the voltage of the D4 recorded is close to zero.Therefore, the diode of more low-voltage-grade can be selected, and the reverse-recovery problems of diode can be reduced accordingly.By measuring i _d2, i _c2, i _llkcurrent waveform.By measuring input current i _iN, inductive current i _l1and i _l2waveform, can find out, due to cross structure, input current has less ripple.

Finally, as input voltage VIN=27V, peak efficiency is about 97.1%, and full load is about 91.8%.When input voltage is reduced to 20V, peak efficiency is 96%.The efficiency of converter improves along with the increase of input voltage.When input voltage increases, input current and duty ratio reduce, and therefore, relevant loss reduces.Converter at the same terms VIN=24V, VO=200V, efficiency curve during load variations.

Converter of the present invention is that flyback and switching capacity are integrated in a traditional crisscross parallel boost converter, and this transformer configuration is for reducing input and output ripple.Flyback converter is designed to improve voltage gain, avoids being operated in extreme duty ratio situation.In addition, switching capacity reduces the voltage stress of switching tube and diode as voltage divider.So, the diode of low voltage grade and the switching tube of less conducting resistance can be selected to reduce switch and conduction loss further.And because the former limit winding of transformer is directly connected with output point, leakage inductance energy can be recovered utilization, also can be reduced by the due to voltage spikes of main switch.Thus, corresponding efficiency has been enhanced.

In the description of this specification, specific features, structure, material or feature that the description of reference term " embodiment ", " some embodiments ", " example ", " concrete example " or " some examples " etc. means to describe in conjunction with this embodiment or example are contained at least one embodiment of the present invention or example.In this manual, identical embodiment or example are not necessarily referred to the schematic representation of above-mentioned term.And the specific features of description, structure, material or feature can combine in an appropriate manner in any one or more embodiment or example.

Although illustrate and describe embodiments of the invention, those having ordinary skill in the art will appreciate that: can carry out multiple change, amendment, replacement and modification to these embodiments when not departing from principle of the present invention and aim, scope of the present invention is by claim and equivalents thereof.

Claims (5)

1. A high-gain low switching voltage stress interleaved parallel BOOST converter, characterized in that it comprises: a first MOS tube, a second MOS tube, a third MOS tube, a first inductance, a second inductance, a transformer leakage inductance, a A diode, a second diode, a third diode, a fourth diode, a load, an output capacitor, a first capacitor, a second capacitor, a transformer, One end of the first inductor is connected to the drain of the first MOS transistor, the other end of the first inductor is connected to one end of the second inductor, the source of the first MOS transistor is connected to the source of the second MOS transistor, and the source of the second MOS transistor is connected to The source of the third MOS transistor, the drain of the second MOS transistor is connected to the other end of the second inductance, one end of the second inductance is also connected to one end of the leakage inductance of the transformer, and the other end of the leakage inductance of the transformer is connected to the input end of the primary side of the transformer, so The drain of the third MOS transistor is connected to the output terminal of the primary side of the transformer and the anode of the fourth diode, the cathode of the fourth diode is connected to the drain of the second MOS transistor and one end of the second capacitor, and the other end of the first inductor is connected to Connect the input end of the secondary side of the transformer to one end of the first capacitor, the other end of the first capacitor is connected to the anode of the first diode and the cathode of the third diode, and the anode of the third diode is connected to the output end of the secondary side of the transformer , the cathode of the first diode is connected to the other end of the second capacitor and the anode of the second diode, the cathode of the second diode is respectively connected to one end of the output capacitor and one end of the load, and the other end of the output capacitor is connected to the third MOS The source of the tube, and the other end of the load is connected to the source of the third MOS tube. 2. A working method of a high-gain low switching voltage stress interleaved parallel BOOST converter, which is characterized in that three MOS tubes are set to work in sequence, and a time period for the MOS tubes to be turned on and off is divided into t ₀ , t ₁ , t ₂ , t ₃ , t ₄ , and t ₅ six time points, the working methods include: Step 1, in the period from t ₀ to t ₁ , the first MOS transistor, the second MOS transistor, and the third MOS transistor are turned on, the first diode, the second diode, the third diode, and the fourth diode The tubes are all turned off, the currents i _L1 , i _L2 and i _Llk in the first inductance, the second inductance and the leakage inductance of the transformer increase linearly, the load energy is provided by the output capacitor, and the voltage across the fourth diode is close to zero; Step 2, during the period from _t1 to _t2 , the second MOS transistor and the third MOS transistor are turned on, the first MOS transistor is turned off, and the second diode, the third diode, and the fourth diode are turned off, The first diode is turned on, the energy stored in the first inductor and the first capacitor is transferred to the second capacitor through the first diode, and the output capacitor provides energy to the load; Step 3, in the period _{from t2} to _t3 , the first MOS transistor, the second MOS transistor, and the third MOS transistor are turned on, the first diode, the second diode, the third diode, and the fourth diode The tubes are all turned off, the currents i _L1 , i _L2 and i _Llk in the first inductance, the second inductance and the leakage inductance of the transformer increase linearly, the load energy is provided by the output capacitor, and the voltage across the fourth diode is close to zero; Step 4, in the period _{from t3} to _t4 , the first MOS transistor is turned on, the second MOS transistor and the third MOS transistor are turned off, the first diode is turned off, the second diode, the third diode, The fourth diode is turned on, the current in the first inductor increases linearly, the energy stored in the second inductor and the second capacitor is released to the output capacitor and the load through the second diode, and at the same time, stored in the leakage inductance of the transformer The energy of the second diode is released to the output capacitor and load through the fourth diode, the second capacitor, and the second diode is released to the output capacitor and the load. At time _t4 , the current of the fourth diode and the leakage inductance of the transformer is reduced to zero and stored in the transformer The energy released to the first capacitor through the third diode to make up for the energy released by the first capacitor in the previous stage; Step 5, in the period from _t4 to _t5 , the first MOS transistor is turned on, the second MOS transistor and the third MOS transistor are turned off, the second diode and the third diode are turned on, and the first diode, The fourth diode is turned off, the current in the first inductor increases linearly, the energy stored in the transformer is released to the first capacitor, and the output energy is provided by the second inductor and the second capacitor. 3. The working method of the interleaved parallel BOOST converter with high gain and low switching voltage stress according to claim 2, wherein said step 4 comprises: Set the excitation inductance L _m of the transformer, and assume K=L _m /(L _m +L _lk ), the energy in the leakage inductance L _lk of the transformer is released to the output terminal through the fourth diode, and the duty cycle of energy release D _D4 for: ${\mathrm{<span\; class="notranslate">\; D.</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; N</span>}}<span\; class="notranslate">\; .</span>$ 4. The working method of the interleaved parallel BOOST converter with high gain and low switching voltage stress according to claim 2, further comprising the step of setting the voltage gain: The voltage gain M from the output V _o to the input V _IN , through the volt-second balance principle of the first inductor and the second inductor, is obtained: V _IN +V _C1 (1-D)-V _C2 (1-D)=0, V _IN + V _C2 (1-D) - V _O (1-D) = 0, The first capacitor is the output capacitor of the flyback converter, therefore, the voltage V _C1 of the first capacitor is: K is the ratio of transformer primary excitation inductance to primary excitation inductance plus transformer leakage inductance, N is the ratio of transformer secondary winding turns to primary winding turns, and D is duty cycle; Will Substitute V _IN +V _C1 (1-D)-V _C2 (1-D)=0 and V _IN +V _C2 (1-D)-V _O (1-D)=0 to get the second capacitor and the output capacitor The voltages are: ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}<span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}<span\; class="notranslate">\; ,</span>$ So the voltage gain is: $\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; ,</span>$ Because the excitation inductance L _m is much larger than the transformer leakage inductance L _lk , so K is close to 1. When K=1, the ideal voltage gain is: $\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; ND</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; .</span>$ 5. The working method of the interleaved parallel BOOST converter with high gain and low switching voltage stress according to claim 2, further comprising the step of setting voltage stress: According to Kirchhoff's voltage law, the voltage stress of the first MOS transistor, the second MOS transistor, the third MOS transistor and the first diode, the second diode, the third diode, and the fourth diode is obtained for: ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; nax</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}}<span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KD</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; ND</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; KND</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}}<span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}}<span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; NV</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; NV</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}}<span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; KD</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; KND</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; ND</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>$ Let K=1, the voltage stress distribution of the first MOS transistor, the second MOS transistor, the third MOS transistor and the first diode, the second diode, the third diode, and the fourth diode is: ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; S</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; ND</span>}}<span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; ND</span>}}<span\; class="notranslate">\; ,</span>$ ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; NV</span>}}_{\mathrm{<span\; class="notranslate">\; IN</span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; NV</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; ND</span>}}<span\; class="notranslate">\; ,</span>$ V _D4,max =0.