CN104572373A - Memory voltage bias test method based on SVID - Google Patents
Memory voltage bias test method based on SVID Download PDFInfo
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- CN104572373A CN104572373A CN201510002552.0A CN201510002552A CN104572373A CN 104572373 A CN104572373 A CN 104572373A CN 201510002552 A CN201510002552 A CN 201510002552A CN 104572373 A CN104572373 A CN 104572373A
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Abstract
The invention discloses a memory voltage bias test method based on SVID, which is characterized in that in the initialization stage of a memory, after a system reads the memory voltage value of memory information when an MRC is operated, a PCU (Power control Unit) in a CPU (Central processing Unit) sends an SVID command 'SetVIDFastXX' to a corresponding VR address through an SVID bus, so that the output voltage adjustment corresponding to VR is realized. The method realizes the bias voltage regulation of the memory VR through the SVIDCommand under the condition of not changing the hardware of the main board and the VR design, the same system can perform self-adaptive voltage regulation on the memory voltage type (1.5V memory or 1.35V memory) inserted into the DIMM groove, the voltage bias test value is regulated to the voltage bias test value expected by a user, and the user can update the BIOS version according to the test condition of the actual voltage bias test. The method is simple and effectively meets the requirement of the server manufacturer on the bias test of the memory voltage in the memory selection and compatibility test cases.
Description
Technical field
The present invention relates to server system internal memory type selecting and compatibility test field, be specifically related to a kind of memory voltage high low bias test method based on SVID.
Background technology
Along with the rise of the new industry such as cloud computing and large data, Internet enterprises shoots up and develops, and the core business of corresponding Internet enterprises is also constantly expanding scale, and it proposes quite strict requirement to the stability of server system operation.In addition, in key areas such as some finance, telecommunications, energy, harsher to the stability requirement of server system.One of more crucial parts of influential system stability: internal memory, because the electrical stability that supplies of internal memory can cause system to occur many problems such as deadlock, autoboot not.Therefore, in server system R&D process, memory compatibility test is most important.Wherein, in internal memory type selecting and compatibility test, very important one is exactly memory voltage high low bias test.Its object is to: memory voltage is adjusted to the most severe condition that internal memory can run, by analyzing internal memory under severe conditions, running situation, judging tested internal memory this server system whether compatible.Comprise Baidu, Ali, Internet enterprises that the domestic contrast of Tengxun is large be proposed this testing requirement to its ODM or OEM vendor, the universally recognized testing requirement of Ye Shi internal memory manufacturer.Therefore, how effectively realizing memory voltage, to meet upper drop-down inclined test condition most important.
Manufacturer server, when doing internal memory type selecting and memory compatibility test, needs memory voltage high low bias test ± 5% to carry out testing results under system.The VR of traditional analogue loop needs the Feedback resistance recalculating, adjust VR chip periphery to realize, and bothers very much, and needs to do heavy industry to mainboard; The digital loop VR of current main-stream can regulate VR chip internal offset register, but range of adjustment is limited, 1.05 times and 0.95 times that output voltage bound cannot be adjusted to nominal voltage, can only increase on nominal voltage basis or reduce about 40mv.Such as: memory voltage representative value is 1.35V, its ± bound of 5% is 1.4175V and 1.2825V respectively, but regulate register to adjust to 1.39V and 1.31V, cannot testing requirement be realized.And, above-mentioned two kinds of methods are all that output voltage is fixed as certain particular value, such as: voltage is fixed as 1.4175V partially, this block mainboard can only test the high low bias test of 1.35V memory bar like this, the high low bias test of 1.5V memory bar cannot be realized, because 1.5V pull-up inclined 5% is 1.575V, therefore, when the internal memory for 1.5V does the test of voltage high low bias test, must heavy industry again.
Summary of the invention
The technical problem to be solved in the present invention is: when neither adjusting motherboard hardware and internal memory VR relevant design, by A B two version BIOS Code realize mainboard memory voltage automatically drawing partially.And the self-adapting estimation and the voltage high low bias test that realize 1.35V internal memory and 1.5V internal memory regulate.
The technical solution adopted in the present invention is:
A kind of memory voltage high low bias test method based on SVID, in the internal memory initialization stage, when running MRC, after system reads the memory voltage value of memory information, by the PCU unit of CPU inside, through SVID bus to corresponding VR address, send SVID order " SetVID Fast XX ", realize the output voltage adjustment of corresponding VR, XX represents the output voltage of internal memory VR.
In the internal memory initialization stage, corresponding BIOS code is called MRC(Memory Reference Code), when running MRC, first system reads memory information, memory information comprises memory voltage value, CPU sends to internal memory VR chip the magnitude of voltage of correspondence by PCU after acquisition memory voltage, normal condition acquiescence is as follows: internal memory initial voltage is 1.5V, if what insert DIMM is 1.35V internal memory, output voltage is adjusted to 1.35V by PCU, if what insert is 1.5V internal memory, PCU can send once " SetVID_ Fast XX " order again, output voltage is adjusted to 1.5V.
When default value corresponding in BIOS code is that 1.35V, PCU unit sends SVID order " SetVID Fast 1.4175 ", changed into inclined value 1.4175V; As default value 1.5V, PCU unit sends SVID order " SetVID Fast 1.575 ", and change inclined value 1.575V into, corresponding BIOS code definition is A version.Realize voltage pull-up inclined+5%.
As default value 1.35V corresponding in BIOS code, PCU unit sends SVID order " SetVID Fast 1.2825 ", is changed into lower inclined value 1.2825V; When default value is 1.5V, PCU unit sends SVID order " SetVID Fast 1.425 ", and change lower inclined value 1.425V into, corresponding BIOS code definition is B version.Realize voltage drop-down partially-5%.
Beneficial effect of the present invention: the inventive method is not when changing motherboard hardware and VR design, realize regulating the bias-voltage that draws of internal memory VR by SVID Command, same system can do adaptive voltage adjustment to the memory voltage type (1.5V internal memory or 1.35V internal memory) inserting DIMM groove, be adjusted to the voltage high low bias test value that user wishes, user can upgrade bios version according to the test condition of the voltage high low bias test of reality.The method simply, effectively solves manufacturer server in internal memory type selecting and compatibility test use-case, memory voltage high low bias test demand.
Accompanying drawing explanation
Fig. 1 is normal MRC internal memory initialization schematic diagram;
Fig. 2 is the MRC internal memory initialization schematic diagram that internal memory draws+5% magnitude of voltage partially;
Fig. 3 is the MRC internal memory initialization schematic diagram that internal memory draws-5% magnitude of voltage partially.
Embodiment
Below according to Figure of description, in conjunction with specific embodiments, the present invention is further described:
A kind of memory voltage high low bias test method based on SVID, in the internal memory initialization stage, when running MRC, after system reads the memory voltage value of memory information, by the PCU unit of CPU inside, through SVID bus to corresponding VR address, send SVID order " SetVID Fast XX ", realize the output voltage adjustment of corresponding VR, XX represents the output voltage of internal memory VR.
In the internal memory initialization stage, corresponding BIOS code is called MRC(Memory Reference Code), when running MRC, first system reads memory information, memory information comprises memory voltage value, CPU sends to internal memory VR chip the magnitude of voltage of correspondence by PCU after acquisition memory voltage, normal condition acquiescence is as follows: internal memory initial voltage is 1.5V, if what insert DIMM is 1.35V internal memory, output voltage is adjusted to 1.35V by PCU, if what insert is 1.5V internal memory, PCU can send once " SetVID_ Fast XX " order again, output voltage is adjusted to 1.5V.As shown in Figure 1, for the internal memory initialization flow process in the normal Boot process of system, Installed System Memory initial voltage is 1.5V, in internal memory initialization process when to get internal memory model be 1.5V to PCU, the BIOS Code that PCU performs can be adjusted to 1.5V the output voltage of internal memory VR, when to get internal memory model be 1.35V to PCU, the BIOS Code that PCU performs can be adjusted to 1.35V the output voltage of internal memory VR.
As shown in Figure 2, when default value corresponding in BIOS code is that 1.35V, PCU unit sends SVID order " SetVID Fast 1.4175 ", changed into inclined value 1.4175V; As default value 1.5V, PCU unit sends SVID order " SetVID Fast 1.575 ", and change inclined value 1.575V into, corresponding BIOS code definition is A version.Realize voltage pull-up inclined+5%.
As shown in Figure 3, as default value 1.35V corresponding in BIOS code, PCU unit sends SVID order " SetVID Fast 1.2825 ", is changed into lower inclined value 1.2825V; When default value is 1.5V, PCU unit sends SVID order " SetVID Fast 1.425 ", and change lower inclined value 1.425V into, corresponding BIOS code definition is B version.Realize voltage drop-down partially-5%.
Above embodiment is only for illustration of the present invention; and be not limitation of the present invention; the those of ordinary skill of relevant technical field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all equivalent technical schemes also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (3)
1. the memory voltage high low bias test method based on SVID, it is characterized in that: in the internal memory initialization stage, when running MRC, after system reads the memory voltage value of memory information, by the PCU unit of CPU inside, through SVID bus to corresponding VR address, send SVID order " SetVID Fast XX ", realize the output voltage adjustment of corresponding VR.
2. a kind of memory voltage high low bias test method based on SVID according to claim 1, it is characterized in that: when default value corresponding in BIOS code is 1.35V, PCU unit sends SVID order " SetVID Fast 1.4175 ", is changed into inclined value 1.4175V; As default value 1.5V, PCU unit sends SVID order " SetVID Fast 1.575 ", and change inclined value 1.575V into, corresponding BIOS code definition is A version.
3. a kind of memory voltage high low bias test method based on SVID according to claim 1, it is characterized in that: as default value 1.35V corresponding in BIOS code, PCU unit sends SVID order " SetVID Fast 1.2825 ", is changed into lower inclined value 1.2825V; When default value is 1.5V, PCU unit sends SVID order " SetVID Fast 1.425 ", and change lower inclined value 1.425V into, corresponding BIOS code definition is B version.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107066363A (en) * | 2017-04-19 | 2017-08-18 | 济南浪潮高新科技投资发展有限公司 | A kind of VR power supplys commissioning device and method |
| CN107239359A (en) * | 2017-06-07 | 2017-10-10 | 济南浪潮高新科技投资发展有限公司 | A kind of method that server master board internal memory signal quality is checked by BMC |
| CN107436827A (en) * | 2016-05-27 | 2017-12-05 | 纬创资通股份有限公司 | Detection method of electronic device |
| CN109189623A (en) * | 2018-08-24 | 2019-01-11 | 郑州云海信息技术有限公司 | A kind of test method of CPU, device and electronic equipment |
| CN115309223A (en) * | 2022-08-29 | 2022-11-08 | 苏州浪潮智能科技有限公司 | Method and device for setting bias of direct current voltage, computer equipment and storage medium |
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| CN115309223A (en) * | 2022-08-29 | 2022-11-08 | 苏州浪潮智能科技有限公司 | Method and device for setting bias of direct current voltage, computer equipment and storage medium |
| CN115309223B (en) * | 2022-08-29 | 2023-08-04 | 苏州浪潮智能科技有限公司 | DC voltage bias setting method, device, computer equipment and storage medium |
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