CN104410573B - A kind of bag matching process based on TCAM - Google Patents
A kind of bag matching process based on TCAM Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The present invention provides a kind of bag matching process based on TCAM, and this method includes：Space compression grade n is calculated according to the clock cycle t of bag forwarding rate r and TCAM chip；Space compression grade n be original TCAM chips in can be compressed to the former list item quantity of 1 list item；The TCAM chips of suitable type are selected according to the hierarchy compression n；According to hierarchy compression n, former TCAM chips are compressed；When getting matching keyword, the rule base of the matching keyword and the TCAM chips after compression is contrasted, the matching operation of n clock cycle is performed, obtains matching result.The program requires dynamic select TCAM entry hierarchy compression according to the bag forwarding rate of the network equipment, it is ensured that on the premise of the good Consumer's Experience of high speed, improves the space availability ratio of TCAM chips, and reduces energy consumption；And the dynamic select of TCAM chips is realized, reduce TCAM chips chooses time and expense.
Description
Technical field
The present invention relates to internet data bag sorting technique field, and in particular to a kind of bag matching process based on TCAM.
Background technology
As internet increasingly gos deep into daily life, network traffics constantly increase, the number of various network applications
Amount is also skyrocketed through, meanwhile, thing followed new network malicious attack also continuously emerges, so as to result in increasing net
There is network congestion phenomenon in network core routing device, seriously reduces the forwarding performance of network core routing device.In consideration of it, being
Discharge pattern in identification network to provide more excellent service quality and network security level, packet classifier technique meet the tendency of and
It is raw, and turned into the core component of existing Internet architecture.Wherein, the height based on three-state content addressing memory (TCAM)
Fast packet classification mechanism is because with high bag rate matched, it has also become the fact that bag sorting technique industrial standard.
Every rule in TCAM chip rule bases is expressed as each in strict tri-state (0,1 and *) form, i.e. TCAM
Bit can only take three kinds of values：0,1 and * (represents outlier).If a character string is identical with 0 and 1 all in certain rule,
Then show that the character string meets the rule.For example, character string " 110110 " and " 110010 " all meet regular " 11**10 ".TCAM
It is located at by concurrently being contrasted, and being returned within the fixed clock cycle with the strictly all rules in rule base by search keyword
The matching result of the relatively low address locations of TCAM, to realize the matching operation of high speed.To reduce energy consumption, existing TCAM chips are branched greatly
Hold global mask register (GMR) and local mask register (BMR).As shown in Figure 1, GMR is determined in bag rule match
Participation matching operation longitudinal bit position scope (such as GMR 0 and GMR 2), and determine in matching operation should be by by BMR
The TCAM memory blocks (such as Block0) enabled or disabled.GMR and BMR cooperatings can realize the work(of reduction TCAM chip energy consumptions
Energy.
The inherent feature of TCAM chip rule bases tri-state statement, determining can not keep away in the matching process of range field
Exempt to produce scope expansion problem.In typical IPv4 rules judge, protocol number and source IP address, purpose IP address can be stated
For prefix format, i.e., all outlier * are distributed in the end position (such as 11010***) of tri-state character string, and this makes total
It can be directly stored in TCAM as a list item according to above three field information in bag.However, the source port in packet
Number and destination slogan information rule judge in be characterized as real number scope, for example, [1,65535] range field need 30
The tri-state character string of prefix format is characterized, and characterizes source port number and destination slogan belongs to the rule of [1,65535] and sentenced
Rule needs up to 30 × 30=900 TCAM list item, and this has clearly resulted in serious scope expansion problem.Meanwhile, scope expands
List item caused by, which increases severely, also increases the power consumption of TCAM chips, influences the practical application effect of TCAM chips.
Therefore, how to improve the space availability ratio of TCAM chips, to mitigate the negative effect that scope expansion is brought, to based on
The development of TCAM packet classifier technique has vital impetus.
To solve the above problems, prior art proposes a kind of C-TCAM (Compressed-TCAM：The TCAM of compression)：
Using two-stage compression mechanism, each two range field (such as transport layer port number field) for originally occupying two TCAM list items is pressed
Contracting storage is into a TCAM list item, to improve the space availability ratio of TCAM chips.
But, C-TCAM does not possess TCAM chip type selection functions, it is impossible to according to the difference of network equipment forwarding rate
Demand and dynamic adaptation TCAM chip types and space compression grade, cause chip space utilization rate not high, and energy consumption is higher.Example
Such as, for IPv4 packet classification, if TCAM chips bit wide is 144 bit, because non-range field includes source address, mesh
Address and protocol fields total length totally 72 bit, range field includes source port and destination interface total length totally 32 bit, because
This, after C-TCAM, the remaining bits width of every TCAM list item is 8 bits (144-72-32 × 2=8)；If however, adopting
During with the TCAM chips of 576 bit bit wides, C-TCAM methods cause the remaining bits width up to 440 of every TCAM list item to compare
Spy, wall scroll TCAM list item space utilization rates are only 23.6%.The reason for producing this imagination be：C-TCAM algorithms do not possess dynamic
TCAM chip type selection functions, can only regularly use range field two-stage compression mechanism, and can not be turned according to the network equipment
Hair rate requirement is adaptively adjusted range field hierarchy compression.
The content of the invention
The purpose of the present invention is to propose to a kind of bag matching process based on TCAM, completed based on network equipment forwarding rate
TCAM chip types dynamic select and range field hierarchy compression are intelligently appraised and decided, and are ensureing the base of the normal forwarding rate of the network equipment
On plinth, the space availability ratio of TCAM chips is improved.
For up to above-mentioned purpose, the invention provides a kind of bag matching process based on TCAM, including：
Space compression grade n is calculated according to the clock cycle t of bag forwarding rate r and TCAM chip；Space compression grade n
For the former list item quantity of 1 list item can be compressed in former TCAM chips；
The TCAM chips of suitable type are selected according to the hierarchy compression n；
According to hierarchy compression n, former TCAM chips are compressed；The compression includes：N bars will be occupied in former TCAM chips
N in list item is held successively to 1 list item of source port number and destination slogan boil down to according to the top-down order in list item position
OK；
When getting matching keyword, by the rule base progress pair of the matching keyword and the TCAM chips after compression
Than performing the matching operation of n clock cycle, obtaining matching result.
Wherein, it is described to be included according to the clock cycle t of bag forwarding rate r and TCAM chip calculating space compression grade n：
Bag forwarding rate is calculated according to below equation：It is x bit to define network most parcel size, if certain network equipment connects
Port band width is y bit/s, then TCAM-PC bag forwarding rate needs the numerical value reached to be calculated as follows：
R=y/x；
Wherein, x is network most parcel size, and unit is bit；Y is network device interface bandwidth, and unit is bit/s；
Calculate the processing delay of the network most parcel：
D=1/r
TCAM chip hierarchy compressions n is calculated according to below equation：
I.e.：
Wherein, t is the clock cycle of TCAM chips, and unit is the second.
Further, such as a width of M of dominant bit of TCAM chips, then to obtain space compression rate as big as possible, n should be：
S is that the length of source IP address, d are that the length of purpose IP address, p are that the length of protocol number, s ' are source port number
Length, d ' are the length of purpose port numbers.
Further, the TCAM chips according to hierarchy compression n selection suitable types, including：
The bit wide z of the TCAM chips of the suitable type takes the smallest positive integral value for meeting following condition：
(s+d+p)+(s'+d') n≤z≤M, and z ∈ C；
Wherein, C is the set of TCAM types, C={ c | c ∈ N } (N=1,2,3 ...).
Wherein, it is described according to hierarchy compression n, former TCAM chips are compressed including：
In the list item of every compression, the rule of high priority is stored in the position of side to the left, the rule storage of low priority
In side position to the right.
The rule base by the matching keyword and the TCAM chips after compression is contrasted, and performs n clock cycle
Matching operation, obtain matching result, including：
I-th of clock cycle, global mask register GMR activation GMR0+GMRi, i ∈ [1, n] are disabled other all
Bit is to reduce energy consumption；
If it was found that a matched rule is stored in TCAM memory block Block m, within next clock cycle, activation is compiled
Number it is less than or equal to m all address blocks, other all address blocks is disabled, further to reduce energy consumption；
When the matching operation of all n clock cycle is fully completed, selection address is minimum from the rule matched
Rule is used as final matching result.
Above-mentioned technical proposal has the advantages that：
Above-mentioned technical proposal requires dynamic select TCAM entry hierarchy compression according to the bag forwarding rate of the network equipment, i.e.
(TCAM with Packet-forwarding-rate Constraints, meet the base of network equipment forwarding rate to TCAM-PC
In TCAM bag matching process) rational space pressure can be realized on the premise of network equipment high speed packet forwarding rate is ensured
Shrinkage, it is ensured that on the premise of the good Consumer's Experience of high speed, reduces the space hold degree of TCAM chips, improves
The space availability ratio of TCAM chips, and reduce energy consumption；And the dynamic select of TCAM chips is realized, can be according to network application
Different performance demand selects rational chip type, while network application function is realized, reduces when choosing of TCAM chips
Between and expense.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is prior art TCAM structural representations；
Fig. 2 is the particular flow sheet of the bag matching process based on TCAM of the embodiment of the present invention one；
Fig. 3 is TCAM-PC of the present invention architectural schematic；
Fig. 4 is TCAM-PC of the present invention workflow diagram.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
Scope expansion problem is characterized in caused by TCAM commensurate in scope processes：The every new TCAM table formed after expansion
Xiang Zhong, the non-range field information such as source data packet address, destination address and protocol fields is identical, and only range field is such as
Source port number and destination slogan are different.Based on features described above, the present invention proposes a kind of raising TCAM space availability ratios
TCAM chip selecting methods --- TCAM-PC.TCAM-PC by by n (n=1,2 ...) bar comprising different range field information (but
Simultaneously comprising the non-range field information of identical) TCAM list items boil down to one, and only retain in new list item upon compression
The information of a non-range field, to reach the purpose saved TCAM chip-storeds space, improve space availability ratio.Above-mentioned n is
Determined by the packet forwarding rate for the network equipment for configuring TCAM chips, packet forwarding rate is defined as r in the present invention
Packet/s (r packet of forwarding per second).
Embodiment one
As shown in Fig. 2 being a kind of flow chart of the bag matching process based on TCAM of the present embodiment, comprise the following steps：
Step 201, space compression grade n is calculated according to the clock cycle t of bag forwarding rate r and TCAM chip；The space
Hierarchy compression n be original TCAM chips in can be compressed to the former list item quantity of 1 list item；
Step 202, the TCAM chips of suitable type are selected according to the hierarchy compression n；
Step 203, according to hierarchy compression n, former TCAM chips are compressed；The compression includes：By former TCAM chips
In occupy n in n bar list items to 1 list item of source port number and destination slogan boil down to, it is top-down according to list item position
Order is performed successively；
Step 204, when getting matching keyword, by the rule base of the matching keyword and the TCAM chips after compression
Contrasted, perform the matching operation of n clock cycle, obtain matching result.
Wherein, it is described to be included according to the clock cycle t of bag forwarding rate r and TCAM chip calculating space compression grade n：
Bag forwarding rate is calculated according to below equation：It is x bit to define network most parcel size, if certain network equipment connects
Port band width is y bit/s, then TCAM-PC bag forwarding rate needs the numerical value reached to be calculated as follows：
R=y/x；
Wherein, x is network most parcel size, and unit is bit；Y is network device interface bandwidth, and unit is bit/s；
Calculate the processing delay of the network most parcel：
D=1/r
TCAM chip hierarchy compressions n is calculated according to below equation：
I.e.：
Wherein, t is the clock cycle of TCAM chips, and unit is the second.
Further, such as a width of M of dominant bit of TCAM chips, then to obtain space compression rate as big as possible, n should be：
S is that the length of source IP address, d are that the length of purpose IP address, p are that the length of protocol number, s ' are source port number
Length, d ' are the length of purpose port numbers.
Further, the TCAM chips of suitable type are selected according to the hierarchy compression n, including：
The bit wide z of the TCAM chips of the suitable type takes the smallest positive integral value for meeting following condition：
(s+d+p)+(s'+d') n≤z≤M, and z ∈ C；
Wherein, C is the set of TCAM types, C={ c | c ∈ N } (N=1,2,3 ...).
Wherein, it is described according to hierarchy compression n, former TCAM chips are compressed including：
In the list item of every compression, the rule of high priority is stored in the position of side to the left, the rule storage of low priority
In side position to the right.
It is preferred that, the rule base by the matching keyword and the TCAM chips after compression is contrasted, when performing n
The matching operation in clock cycle, obtains matching result, including：
I-th of clock cycle, global mask register GMR activation GMR0+GMRi, i ∈ [1, n] are disabled other all
Bit is to reduce energy consumption；
If it was found that a matched rule is stored in TCAM memory block Block m, within next clock cycle, activation is compiled
Number it is less than or equal to m all address blocks, other all address blocks is disabled, further to reduce energy consumption；
When the matching operation of all n clock cycle is fully completed, selection address is minimum from the rule matched
Rule is used as final matching result.
The present embodiment has the advantages that：
The present embodiment requires dynamic select TCAM entry hierarchy compression according to the bag forwarding rate of the network equipment, i.e. TCAM-
PC can realize rational space compression rate on the premise of network equipment high speed packet forwarding rate is ensured, it is ensured that at a high speed
On the premise of good Consumer's Experience, the space hold degree of TCAM chips is reduced, the space utilization of TCAM chips is improved
Rate, and reduce energy consumption；And the dynamic select of TCAM chips is realized, it can be selected to close according to the different performance demand of network application
The chip type of reason, while network application function is realized, reduce TCAM chips chooses time and expense.
Embodiment two
TCAM-PC includes at least three funtion parts, is described below：
1st, TCAM chip spaces hierarchy compression computational methods：
It is x bit to define network most parcel size, if a width of y bit/s of certain network device interface band, TCAM-PC's
Bag forwarding rate needs the numerical value reached to be calculated as follows：
R=y/x (1)
The bag processing delay of each packet is in TCAM-PC：
D=1/r (2)
The clock cycle for defining TCAM chips is t seconds, and the former GREV quantity of a rule can be compressed in TCAM-PC
(it is defined as hierarchy compression n) deducibilitys as follows：
Based on formula (1) to formula (3), it can draw：
For typical IPv4 networks, in each packet header, the length of source IP address and purpose IP address
It is 32bits, the length of protocol number is 8bits, the length of source port number and destination slogan is 16bits.If TCAM cores
The a width of M of dominant bit of piece, then to obtain space compression rate as big as possible, n should be：
2nd, TCAM chip selecting methods：
TCAM types are defined for the species with different TCAM bit wides (such as bit wide is 72 bits or 144 bits), and it is existing
The collection of TCAM types is combined into C={ c | c ∈ N } (N=1,2,3 ...), then the TCAM chip types z that TCAM-PC mechanism should be selected
(bit wide for representing TCAM chips), can be calculated according to such as lower inequality：
(32 × 2+8)+(16 × 2) n=72+32n≤z≤M and z ∈ C (6)
Note, to obtain TCAM chip power-consumptions as far as possible, z should take the smallest positive integral value for meeting conditional inquality (6).
3rd, TCAM-PC workflows：
Fig. 3 is TCAM-PC architectural schematic, wherein, S_IP is that source address, D_IP are that purpose address, Prot are
Protocol number, S_Port are that source port, D_Port are purpose port.
As shown in figure 4, the TCAM-PC course of work is as follows：
Step 401：TCAM-PC is calculated based on TCAM chip space hierarchy compressions computational methods (formula (1) to formula (5))
Go out the hierarchy compression n of TCAM memory spaces；It is then based on TCAM chip selecting methods (formula (6)) and selects suitable TCAM chips
Type；
Step 402：TCAM-PC is according to every n by n bar TCAM list items were originally occupied to source port number and destination slogan pressure
It is condensed to 1 list item, and perform successively according to the top-down order in list item position (for example compress since Block 0 list item,
Until being compressed to Block m)；And in the list item after every compression, the rule of high priority is stored in side position to the left, low preferential
The rule of level is stored in side position to the right；
Step 403：When one, which matches keyword, arrives, TCAM-PC is contrasted keyword with rule base, performs n
The matching operation of individual clock cycle：In i-th of clock cycle, GMR activation GMR0+GMRi, i ∈ [1, n], remaining all bit
Disable to reduce energy consumption；If in addition, finding that a matched rule is stored in Block m, within next clock cycle, only
Only activation numbering is less than or equal to m all address blocks (such as Block l, l≤m), and remaining address block is disabled, to enter one
Step reduction energy consumption；When the matching operation of all n clock cycle is fully completed, TCAM-PC chooses from the rule matched
The minimum rule in address is used as final matching result.
The present embodiment requires dynamic select TCAM entry hierarchy compression, i.e. TCAM- according to the bag forwarding rate of the network equipment
PC can realize rational space compression rate on the premise of network equipment high speed packet forwarding rate is ensured, both ensure that at a high speed
Good Consumer's Experience, reduces the space hold degree of TCAM chips, improves the space availability ratio of TCAM chips, and drop again
Low energy consumption.The dynamic select of TCAM chips can be realized simultaneously, can select reasonable according to the different performance demand of network application
Chip type, while network application function is realized, reduce TCAM chips chooses time and expense.
Those skilled in the art will also be appreciated that the various illustrative components, blocks that the embodiment of the present invention is listed
(illustrative logical block), unit, and step can be by the knots of electronic hardware, computer software, or both
Conjunction is realized.To clearly show that the replaceability (interchangeability) of hardware and software, above-mentioned various explanations
Property part (illustrative components), unit and step universally describe their function.Such work(
Can be that the design requirement depending on specific application and whole system is realized by hardware or software.Those skilled in the art
For every kind of specific application various methods can be used to realize described function, but this realization is understood not to
The scope protected beyond the embodiment of the present invention.
Above-described embodiment, has been carried out further to the purpose of the present invention, technical scheme and beneficial effect
Describe in detail, should be understood that the embodiment that the foregoing is only the present invention, be not intended to limit the present invention
Protection domain, within the spirit and principles of the invention, any modification, equivalent substitution and improvements done etc. all should be included
Within protection scope of the present invention.
Claims (4)
1. a kind of bag matching process based on TCAM, it is characterised in that including：
Space compression grade n is calculated according to the clock cycle t of bag forwarding rate r and TCAM chip；Space compression grade n is original
The former list item quantity of 1 list item can be compressed in TCAM chips；
The TCAM chips of suitable type are selected according to the hierarchy compression n；
According to hierarchy compression n, former TCAM chips are compressed；The compression includes：N bar list items will be occupied in former TCAM chips
In n to 1 list item of source port number and destination slogan boil down to, performed successively according to the top-down order in list item position；
When getting matching keyword, the rule base of the matching keyword and the TCAM chips after compression is contrasted, held
The matching operation of n clock cycle of row, obtains matching result；
It is described to be included according to the clock cycle t of bag forwarding rate r and TCAM chip calculating space compression grade n：
The numerical value that bag forwarding rate needs to reach is calculated according to below equation：
R=y/x；
Wherein, x is the size of network most parcel, and unit is bit；Y is network device interface bandwidth, and unit is bit/s；
Calculate the processing delay of the network most parcel：
D=1/r
TCAM chip hierarchy compressions n is calculated according to below equation：
I.e.：
Wherein, t is the clock cycle of TCAM chips, and unit is the second；
Such as a width of M of dominant bit of TCAM chips, then to obtain space compression rate as big as possible, n should be：
S be the length of source IP address, d be the length of purpose IP address, p be the length of protocol number, s ' for source port number length,
D ' is the length of purpose port numbers.
2. according to the method described in claim 1, it is characterised in that described that suitable type is selected according to the hierarchy compression n
TCAM chips, including：
The bit wide z of the TCAM chips of the suitable type takes the smallest positive integral value for meeting following condition：
(s+d+p)+(s'+d') n≤z≤M, and z ∈ C；
Wherein, C is the set of TCAM types, C={ c | c ∈ N } (N=1,2,3 ...).
3. according to the method described in claim 1, it is characterised in that described according to hierarchy compression n, former TCAM chips are pressed
Contracting includes：
In the list item of every compression, the rule of high priority is stored in the position of side to the left, and the rule of low priority is stored in partially
Right positions.
4. according to the method described in claim 1, it is characterised in that described by the matching keyword and the TCAM chips after compression
Rule base contrasted, perform n clock cycle matching operation, obtain matching result, including：
I-th of clock cycle, global mask register GMR activation GMR0+GMRi, i ∈ [1, n] disable other all bits
Position is to reduce energy consumption；
If it was found that a matched rule is stored in TCAM memory block Block m, within next clock cycle, activation numbering is small
In or equal to m all address blocks, the other address blocks of disabling, further to reduce energy consumption；
When the matching operation of all n clock cycle is fully completed, the minimum rule in address is chosen from the rule matched
It is used as final matching result.
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