CN104407482A - 一种阵列基板及显示装置 - Google Patents

一种阵列基板及显示装置 Download PDF

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CN104407482A
CN104407482A CN201410753408.6A CN201410753408A CN104407482A CN 104407482 A CN104407482 A CN 104407482A CN 201410753408 A CN201410753408 A CN 201410753408A CN 104407482 A CN104407482 A CN 104407482A
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electrode
potential drop
dividing potential
pixel
base palte
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CN104407482B (zh
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陈政鸿
王醉
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
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    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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Abstract

本发明公开了一种阵列基板及显示装置,属于显示技术领域,以解决现有技术无法有效地检测出分压端电极和次像素电极短路的问题技术问题。该阵列基板包括多个阵列排布的子像素单元,各子像素单元包括主像素区域、次像素区域和分压电容;所述次像素区域包括次像素电极,所述分压电容包括分压端电极和公共端电极,所述次像素电极和所述分压端电极之间设置有透明导电结构,所述透明导电结构电连接所述公共端电极,所述次像素电极、所述分压端电极和所述透明导电结构位于同一图层且相互绝缘。本发明可用于液晶电视、液晶显示器、手机、平板电脑等显示装置。

Description

一种阵列基板及显示装置
技术领域
本发明涉及显示技术领域,具体地说,涉及一种阵列基板及显示装置。
背景技术
传统的液晶显示面板在大视角观看时,往往会出现色偏的现象,即用户在大视角观看到的图像与正视角观看到的图像的颜色有偏差。这是因为传统的液晶显示面板的各子像素单元为一整个区域,不同的视角只能看到液晶分子的长轴,或者短轴。而液晶分子具有各向异性,不同的方向折射率不同,因此会出现大视角观看到的图像与正视的图像具有色偏的现象。
为了改善垂直取向型(Vertical Alignment,简称VA)液晶显示面板在大视角出现的色偏现象,可将每一子像素单元分为主像素区域和次像素区域两个区域,再增设分压电容。在显示时,首先将主像素电极1和次像素电极2充电到相同电位,之后利用分压电容3降低次像素电极2的电位。不同的电位使得两个区域的液晶分子转向分布不同,从而实现改善VA液晶显示面板大视角色偏的目的。
如图1所示,分压电容3具体包括与主像素电极1和次像素电极2同层的透明电极形成的分压端电极31、公共端电极32以及位于两者之间的绝缘层。为了保证分压电容3能够正常工作,分压端电极31与次像素电极2不接触以实现两者的绝缘。但发明人发现,实际的液晶显示面板的生产中可能会出现透明电极残留的问题,导致分压端电极31和次像素电极2短路。这将使得存在短路问题的子像素单元的次像素区域的亮度与主像素区域一致,在液晶显示面板上呈现微亮点现象。而通常采用的检测方法是向所有的扫描线同时输送栅极驱动信号,令所有子像素单元同时充电,使得主像素区域和次像素区域的亮度都相等。显然,无法有效地检测出分压端电极31和次像素电极2短路的问题,导致液晶显示面板的良率下降,成本增加。
发明内容
本发明的目的在于提供一种阵列基板及显示装置,以解决现有技术无法有效地检测出分压端电极和次像素电极短路的问题技术问题。
本发明第一方面提供了一种阵列基板,该阵列基板包括多个阵列排布的子像素单元,各子像素单元包括主像素区域、次像素区域和分压电容;
所述次像素区域包括次像素电极,所述分压电容包括分压端电极和公共端电极,所述次像素电极和所述分压端电极之间设置有透明导电结构,所述透明导电结构电连接所述公共端电极,所述次像素电极、所述分压端电极和所述透明导电结构位于同一图层且相互绝缘。
其中,所述透明导电结构与所述公共端电极之间设置有绝缘层,所述透明导电结构通过所述绝缘层上的过孔电连接所述公共端电极。
其中,各子像素单元设置有驱动扫描线、分压扫描线和数据线。
其中,各子像素单元中还设置有第一开关管,第二开关管和第三开关管;
所述第一开关管的栅极连接所述驱动扫描线,源极连接所述数据线,漏极连接所述主像素电极;
所述第二开关管的栅极连接所述驱动扫描线,源极连接所述数据线,漏极连接所述次像素电极;
所述第三开关管的栅极连接所述分压扫描线,源极连接所述次像素电极,漏极连接所述分压端电极。
其中,所述第一开关管、所述第二开关管和所述第三开关管为薄膜晶体管。
其中,所述次像素区域和所述分压端电极之间的距离至少为4微米。
其中,所述次像素电极、所述分压端电极和所述透明导电结构在同一次构图工艺中形成。
其中,所述次像素区域和所述主像素区域的面积比为6:4、5:5或4:6。
本发明带来了以下有益效果:在本发明实施例的技术方案中,提供了一种阵列基板,该阵列基板包括多个阵列排布的子像素单元,各子像素单元包括主像素区域、次像素区域和分压电容。次像素电极和分压端电极之间设置有与公共端电极电连接的透明导电结构,次像素电极、分压端电极和透明导电结构位于同一图层且相互绝缘。若是透明导电材料残留,可能会将分压端电极和透明导电结构短路,或将透明导电结构和次像素电极短路,或将分压端电极、透明导电结构以及次像素电极三者短路,令次像素电极的电位与公共端电极的电位相等。利用现有的检测方法进行检测时,具有短路问题的子像素单元的亮度将低于其余子像素单元的亮度,呈现出暗点情况,易于检测出来。
本发明第二方面提供了一种显示装置,该显示装置包括彩膜基板和上述的阵列基板。
其中,所述显示装置为垂直排列型显示装置。
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要的附图做简单的介绍:
图1是现有技术的阵列基板的子像素单元的结构示意图;
图2是本发明实施例提供的阵列基板的子像素单元的结构示意图;
图3是本发明实施例提供的阵列基板的子像素单元的等效电路图。
附图标记说明:
1—主像素电极;       2—次像素电极;       3—分压电容;
31—分压端电极;      32—公共端电极;      4—透明导电结构;
5—过孔。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式,借此对本发明如何应用技术手段来解决技术问题,并达成技术效果的实现过程能充分理解并据以实施。需要说明的是,只要不构成冲突,本发明中的各个实施例以及各实施例中的各个特征可以相互结合,所形成的技术方案均在本发明的保护范围之内。
本发明实施例提供的一种阵列基板,该阵列基板包括多个阵列排布的子像素单元。各子像素单元包括主像素区域、次像素区域和分压电容3。
具体的,如图2所示,主像素区域包括主像素电极1,次像素区域包括次像素电极2,分压电容3包括分压端电极31和公共端电极32。次像素电极2和分压端电极31之间设置有透明导电结构4,透明导电结构4连接公共端电极32,次像素电极2、分压端电极31和透明导电结构4位于同一图层且相互绝缘。
在本发明实施例中,如图3所示,子像素单元设置有第一开关管T1和第二开关管T2,第一开关管T1对应主像素区域设置,第二开关管T2对应次像素区域设置。并且,各子像素单元对应设置有驱动扫描线(Gate1)、分压扫描线(Gate2)、公共端电极(Com)和数据线(Data)。其中,驱动扫描线(Gate1)、分压扫描线(Gate2)、公共端电极(Com)位于同一图层,可以在同一次构图工艺中同步形成。
驱动扫描线和分压扫描线并排设置在主像素区域和次像素区域之间,驱动扫描线驱动对应主像素区域的第一开关管T1,分压扫描线驱动对应次像素区域的第二开关管T2。其中,T1和T2均优选为薄膜晶体管(Thin Film Transistor,简称TFT)。T1的栅极连接驱动扫描线,源极连接数据线,漏极连接主像素电极1;T2的栅极连接分压扫描线,源极连接数据线,漏极连接次像素电极2。
其中,主像素电极1可与彩膜基板上的公共电极形成液晶电容Clc1,主像素电极1与公共端电极11的重叠部分形成存储电容Cst1;次像素电极2可与彩膜基板上的公共电极形成液晶电容Clc2,次像素电极2与公共端电极32的重叠部分形成存储电容Cst2。
进一步的,除了第一开关管T1和第二开关管T2外,每一子像素单元中还可设置有第三开关管T3,如图3所示。该第三开关管T3也优选为薄膜晶体管。每个子像素单元中还设置有分压电容Cst3,分压电容Cst3包括分压端电极31和公共端电极32。
对于图3所示的结构,在显示过程中,驱动扫描线先接收到栅极驱动信号,导通了其对应的T1和T2。此时T1和T2从源极接入来自数据线的数据信号,并将该数据信号经由T1和T2传输至主像素电极1和次像素电极2,使Clc1、Cst1、Clc2和Cst2具有相等的电压。然后驱动扫描线的栅极驱动信号消失,分压扫描线接收栅极驱动信号。使得T1和T2关闭,T3导通,Cst3就会通过导通的T3分掉次像素电极2上的一部分数据信号,降低了次像素电极2上的电位,使Clc2和Cst2的电压降低,而Clc1和Cst1的电压保持不变。此时,Clc2的电压明显低于Clc1的电压,使得主像素区域与次像素区域中液晶分子的偏转角度不同,从而改善了VA型显示装置的大视角色偏现象。
在本发明实施例中,除了上述结构,在还包括设置于分压端电极31和次像素电极2之间的透明导电结构4,且该透明导电结构4电连接公共端电极32。
由于分压端电极31、透明导电结构4以及次像素电极2为同一图层,均采用透明导电材料,例如氧化铟锡(Indium Tin Oxide,简称ITO)、氧化铟镓锌(IndiumGallium Zinc Oxide,简称IGZO)等透明导电材料。因此,分压端电极31、透明导电结构4以及次像素电极2通常在同一次构图工艺中形成。若是制作过程中,发生了透明导电材料的残留,可能会将分压端电极31和透明导电结构4短路,或将透明导电结构4和次像素电极2短路,或将分压端电极31、透明导电结构4以及次像素电极2三者短路。无论是哪一种短路情况,与公共端电极32电连接的透明导电结构4都将令次像素电极2的电位与公共端电极32的电位相等。由前文可知,次像素电极2与彩膜基板上的公共电极形成液晶电容Clc2,此时该液晶电容Clc2两侧电极的电位相等,无法驱动位于次像素区域对应区域的液晶分子偏转,使得该次像素区域不出光,导致该子像素单元呈现出暗点情况。
由于现有的检测方法需要令所有子像素单元同时充电。利用现有的检测方法进行检测时,具有短路问题的子像素单元的亮度将低于其余子像素单元的亮度,呈现出暗点情况。该呈现出暗点情况的子像素单元很容易被检测出来,工程人员可以及时对该暗点的子像素单元进行修复,从而提高了液晶显示面板的良率,降低了液晶显示面板的成本。
在本发明实施例中,透明导电结构4与公共端电极32之间设置有绝缘层。因此,如图2所示,为了实现透明导电结构4与公共端电极32的电连接,绝缘层开设有过孔5,透明导电结构4通过该过孔5电连接公共端电极32。
一般的,由于透明导电结构4位于次像素电极2和分压端电极31之间,因此为了保证次像素电极2、透明导电结构4和分压端电极31三者之间的绝缘,次像素电极2和分压端电极31之间的距离应至少为4微米。
优选的,次像素电极2的面积占子像素单元开口区面积的60%,主像素电极1的面积占子像素单元开口区面积的40%,即次像素电极2与主像素电极1的面积比为6:4。根据不同的显示要求,也有可能出现次像素电极2与主像素电极1的面积比为5:5、4:6等情况,本发明实施例对此不进行限制。
综上,在本发明实施例的技术方案中,提供了一种阵列基板,该阵列基板包括多个阵列排布的子像素单元,各子像素单元包括主像素区域、次像素区域和分压电容。次像素电极和分压端电极之间设置有与公共端电极电连接的透明导电结构,次像素电极、分压端电极和透明导电结构位于同一图层且相互绝缘。若是透明导电材料残留,可能会将分压端电极和透明导电结构短路,或将透明导电结构和次像素电极短路,或将分压端电极、透明导电结构以及次像素电极三者短路,令次像素电极的电位与公共端电极的电位相等。利用现有的检测方法进行检测时,具有短路问题的子像素单元的亮度将低于其余子像素单元的亮度,呈现出暗点情况,易于检测出来。
进一步的,本发明还提供了一种显示装置,优选为VA型显示装置,具体可以是液晶电视、液晶显示器、手机、平板电脑等。该显示装置包括彩膜基板和上述本发明实施例提供的阵列基板。
虽然本发明所公开的实施方式如上,但所述的内容只是为了便于理解本发明而采用的实施方式,并非用以限定本发明。任何本发明所属技术领域内的技术人员,在不脱离本发明所公开的精神和范围的前提下,可以在实施的形式上及细节上作任何的修改与变化,但本发明的专利保护范围,仍须以所附的权利要求书所界定的范围为准。

Claims (10)

1.一种阵列基板,其特征在于,包括多个阵列排布的子像素单元,各子像素单元包括主像素区域、次像素区域和分压电容;
所述次像素区域包括次像素电极,所述分压电容包括分压端电极和公共端电极,所述次像素电极和所述分压端电极之间设置有透明导电结构,所述透明导电结构电连接所述公共端电极,所述次像素电极、所述分压端电极和所述透明导电结构位于同一图层且相互绝缘。
2.根据权利要求1所述的阵列基板,其特征在于,所述透明导电结构与所述公共端电极之间设置有绝缘层,所述透明导电结构通过所述绝缘层上的过孔电连接所述公共端电极。
3.根据权利要求1所述的阵列基板,其特征在于,各子像素单元设置有驱动扫描线、分压扫描线和数据线。
4.根据权利要求3所述的阵列基板,其特征在于,各子像素单元中还设置有第一开关管,第二开关管和第三开关管;
所述第一开关管的栅极连接所述驱动扫描线,源极连接所述数据线,漏极连接所述主像素电极;
所述第二开关管的栅极连接所述驱动扫描线,源极连接所述数据线,漏极连接所述次像素电极;
所述第三开关管的栅极连接所述分压扫描线,源极连接所述次像素电极,漏极连接所述分压端电极。
5.根据权利要求4所述的阵列基板,其特征在于,所述第一开关管、所述第二开关管和所述第三开关管为薄膜晶体管。
6.根据权利要求1所述的阵列基板,其特征在于,
所述次像素电极和所述分压端电极之间的距离至少为4微米。
7.根据权利要求1所述的阵列基板,其特征在于,
所述次像素电极、所述分压端电极和所述透明导电结构在同一次构图工艺中形成。
8.根据权利要求1所述的阵列基板,其特征在于,
所述次像素区域和所述主像素区域的面积比为6:4、5:5或4:6。
9.一种显示装置,其特征在于,包括彩膜基板和如权利要求1至8任一项所述的阵列基板。
10.根据权利要求9所述的显示装置,其特征在于,所述显示装置为垂直排列型显示装置。
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