CN104362090A - Method for removing silicon dioxide on edge of CCD type optical localization silicon wafer - Google Patents
Method for removing silicon dioxide on edge of CCD type optical localization silicon wafer Download PDFInfo
- Publication number
- CN104362090A CN104362090A CN201410660051.7A CN201410660051A CN104362090A CN 104362090 A CN104362090 A CN 104362090A CN 201410660051 A CN201410660051 A CN 201410660051A CN 104362090 A CN104362090 A CN 104362090A
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- China
- Prior art keywords
- silicon chip
- etched
- edge
- silicon
- positioning system
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
Abstract
The invention provides a method for removing silicon dioxide on the edge of a CCD type optical localization silicon wafer. Double location systems are adopted, the mode that a common centralized location system and a CCD optical location system are together used, and the optical location system is additionally arranged on the basis of reserving the original centralized location system. The efficiency of the entire back processing technology is improved, and the accuracy of removing an oxidation film on the edge of the silicon wafer is also improved. The entire process achieves mechanical fully-automatic operation, operation is easy, the production efficiency is high, and the practicability is high. Labor cost is saved while the defective percentage of the silicon wafer is reduced, and the method is a technology which is used for removing the SiO2 film on the back face of the silicon wafer and is suitable for large-scale industrial production.
Description
Technical field
The invention relates to the silicon polished edge silica-treated technology of semiconductor crystal wafer, particularly a kind of minimizing technology of CCD formula optical alignment silicon chip edge silicon dioxide.
Background technology
The processing of Silicon Wafer polished silicon wafer is generally main comprises the processing procedure such as section, chamfering, abrasive disc, the burn into back of the body process, polishing, cleaning, and wherein back of the body process processing procedure generally comprises injury of back process, the process of back of the body envelope and edge oxide-film Transformatin etc.Edge oxide-film Transformatin is the critical processes of Silicon Wafer polished silicon wafer processing, vital effect is played to the yield of polished silicon wafer and rear road extension and IGBT device, and mostly there is the problems such as location is inaccurate, location efficiency is low, easily break down in current existing back of the body treatment process, therefore want the production efficiency improving silicon chip back of the body treatment process, promoting centralized positioning speed is focus technology reforming direction.
Summary of the invention
The problem that the invention will solve is to provide that a kind of process is simple, efficient, the method for silicon chip edge silicon dioxide is removed in the CCD formula optical alignment of accurate positioning.
For solving the problems of the technologies described above, the technical scheme that the invention adopts is:
A minimizing technology for CCD optical alignment formula silicon chip edge silicon dioxide, described method comprises the steps:
(1) rotated by manipulator and be elevated just after the back of the body envelope technique silicon chip to be etched take out from sheet indigo plant, and the back of the body front cover of described silicon chip to be etched is contacted with the chassis with adsorption capacity on silicon slice rotating positioning table and fixes;
(2) silicon chip to be etched be fixed on described silicon slice rotating positioning table chassis to be etched is taken pictures by CCD optical positioning system carry out self-centering and analog computation goes out the phasor coordinate of described silicon chip to be etched, CCD optical positioning system the phasor coordinate of the silicon chip to be etched calculated and Original Photo sheet are carried out position comparison accurate after, the phasor coordinate information calculated is delivered to successively subsequent work stations feeding manipulator and follow-up trimming etch station;
(3) manipulator behind location will be positioned at the silicon chip extracting to be etched on rotary locating stand chassis, and transfer them on the absorption chassis of the described trimming etch station after step (2) location, described etch station rotates and etches the edge of described silicon chip to be etched, removes edge silicon dioxide;
(4) silicon chip after etching is passed to washing station by the manipulator behind location to clean, after cleaning, blanking dress is blue.
Preferably, described CCD optical positioning system is retaining the optical positioning system that the basis of original center location system increases, and can directly switch between described CCD optical positioning system and original center location system.
The advantage that the invention has and good effect are: the minimizing technology of a kind of CCD optical alignment formula silicon chip edge silicon dioxide of application claims protection, adopt double locating system, generic central navigation system and CCD optical positioning system is selected to share, the basis retaining original center location system adds optical system, both improve whole by the efficiency of back of the body treatment process, turn increase the accuracy that silicon chip edge oxide-film is removed, whole process mechanism full automatic working, simple to operate, production efficiency is high, practical, human cost has been saved while decreasing silicon chip defect rate, a kind of technology being applicable to the removal silicon chip back side SiO2 film of large-scale industrial production.
Embodiment
A minimizing technology for CCD optical alignment formula silicon chip edge silicon dioxide, described method comprises the steps:
(1) rotated by manipulator and be elevated just after the back of the body envelope technique silicon chip to be etched take out from sheet indigo plant, and the back of the body front cover of described silicon chip to be etched is contacted with the chassis with adsorption capacity on silicon slice rotating positioning table and fixes;
(2) silicon chip to be etched be fixed on described silicon slice rotating positioning table chassis to be etched is taken pictures by CCD optical positioning system carry out self-centering and analog computation goes out the phasor coordinate of described silicon chip to be etched, CCD optical positioning system the phasor coordinate of the silicon chip to be etched calculated and Original Photo sheet are carried out position comparison accurate after, the phasor coordinate information calculated is delivered to successively subsequent work stations feeding manipulator and follow-up trimming etch station;
(3) manipulator behind location will be positioned at the silicon chip extracting to be etched on rotary locating stand chassis, and transfer them on the absorption chassis of the described trimming etch station after step (2) location, described etch station rotates and etches the edge of described silicon chip to be etched, removes edge silicon dioxide;
(4) silicon chip after etching is passed to washing station by the manipulator behind location to clean, after cleaning, blanking dress is blue.
Preferably, described CCD optical positioning system is retaining the optical positioning system that the basis of original center location system increases, and can directly switch between described CCD optical positioning system and original center location system.
Above the embodiment of the invention has been described in detail, but described content being only the preferred embodiment of the invention, can not being considered to for limiting practical range of the present invention.All equalizations done according to the invention scope change and improve, and all should still belong within this patent covering scope.
Claims (2)
1. a minimizing technology for CCD optical alignment formula silicon chip edge silicon dioxide, is characterized in that, described method comprises the steps:
(1) rotated by manipulator and be elevated just after the back of the body envelope technique silicon chip to be etched take out from sheet indigo plant, and the back of the body front cover of described silicon chip to be etched is contacted with the chassis with adsorption capacity on silicon slice rotating positioning table and fixes;
(2) silicon chip to be etched be fixed on described silicon slice rotating positioning table chassis to be etched is taken pictures by CCD optical positioning system carry out self-centering and analog computation goes out the phasor coordinate of described silicon chip to be etched, CCD optical positioning system the phasor coordinate of the silicon chip to be etched calculated and Original Photo sheet are carried out position comparison accurate after, the phasor coordinate information calculated is delivered to successively subsequent work stations feeding manipulator and follow-up trimming etch station;
(3) manipulator behind location will be positioned at the silicon chip extracting to be etched on rotary locating stand chassis, and transfer them on the absorption chassis of the described trimming etch station after step (2) location, described etch station rotates and etches the edge of described silicon chip to be etched, removes edge silicon dioxide;
(4) silicon chip after etching is passed to washing station by the manipulator behind location to clean, after cleaning, blanking dress is blue.
2. the minimizing technology of silicon chip edge silicon dioxide according to claim 1, it is characterized in that: described CCD optical positioning system is retaining the optical positioning system that the basis of original center location system increases, and can directly switch between described CCD optical positioning system and original center location system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410660051.7A CN104362090A (en) | 2014-11-18 | 2014-11-18 | Method for removing silicon dioxide on edge of CCD type optical localization silicon wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410660051.7A CN104362090A (en) | 2014-11-18 | 2014-11-18 | Method for removing silicon dioxide on edge of CCD type optical localization silicon wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104362090A true CN104362090A (en) | 2015-02-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410660051.7A Pending CN104362090A (en) | 2014-11-18 | 2014-11-18 | Method for removing silicon dioxide on edge of CCD type optical localization silicon wafer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104362090A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436004A (en) * | 2008-12-01 | 2009-05-20 | 上海微电子装备有限公司 | Method for pre-aligning silicon chip |
| CN103021809A (en) * | 2012-12-03 | 2013-04-03 | 天津中环领先材料技术有限公司 | Drop type method for removing silicon dioxide on edge of silicon wafer |
| CN103199047A (en) * | 2012-01-05 | 2013-07-10 | 沈阳新松机器人自动化股份有限公司 | Wafer center prealignment method |
| CN103811387A (en) * | 2012-11-08 | 2014-05-21 | 沈阳新松机器人自动化股份有限公司 | Wafer pre-alignment method and apparatus |
-
2014
- 2014-11-18 CN CN201410660051.7A patent/CN104362090A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101436004A (en) * | 2008-12-01 | 2009-05-20 | 上海微电子装备有限公司 | Method for pre-aligning silicon chip |
| CN103199047A (en) * | 2012-01-05 | 2013-07-10 | 沈阳新松机器人自动化股份有限公司 | Wafer center prealignment method |
| CN103811387A (en) * | 2012-11-08 | 2014-05-21 | 沈阳新松机器人自动化股份有限公司 | Wafer pre-alignment method and apparatus |
| CN103021809A (en) * | 2012-12-03 | 2013-04-03 | 天津中环领先材料技术有限公司 | Drop type method for removing silicon dioxide on edge of silicon wafer |
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| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20150218 |
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| RJ01 | Rejection of invention patent application after publication |