CN104252882B

CN104252882B - Nonvolatile memory with power supply handoff functionality

Info

Publication number: CN104252882B
Application number: CN201310272467.7A
Authority: CN
Inventors: 柳弼相
Original assignee: Winbond Electronics Corp
Current assignee: Winbond Electronics Corp
Priority date: 2013-06-28
Filing date: 2013-06-28
Publication date: 2018-01-26
Anticipated expiration: 2033-06-28
Also published as: CN104252882A

Abstract

The invention discloses a kind of nonvolatile memory, including first switch, switch controller and power demands device.First switch includes first end, the second end, the 3rd end and the first control terminal.The nonvolatile memory may include second switch, and it has the 4th end, the 5th end, the 6th end and the second control terminal.Switch controller couples first control terminal of the first switch and the second control terminal of the second switch, to transmit the first control signal to first switch to control three-terminal link to first end or the second end, and the second control signal is transmitted to second switch to control the 4th end to be connected to the 5th end or the 6th end.Power demands device receives first voltage from the 3rd end of the first switch, and transmits second voltage to the 4th end of second switch.

Description

Nonvolatile memory with power supply handoff functionality

Technical field

The present invention is on a kind of nonvolatile memory with power supply handoff functionality.

Background technology

In existing technical field, flash memories need to be by independently of V_DDPower-supply wiring supply electricity to input and output Buffer (Input/Output Buffers) and driver.Because this independent current source can be below or above V_DD, it can be described as can Become input and output power supply.Then can be using this variable input and output power supply come in initialization system using the host computer system of flash memories Input and the acceptable voltage level of output port.However, due to V_DDExclusive control machine is had no with variable input and output power supply System, system designer may be limited to by power-supply wiring, boot program and latch-up.

The content of the invention

In view of this, can it is an object of the invention to provide a kind of nonvolatile memory with power supply handoff functionality The different power sources and design requirement met in system carry out Switching power.

The present invention proposes a kind of nonvolatile memory, including first switch, switch controller and power demands device. First switch includes first end, the second end, the 3rd end and the first control terminal.The nonvolatile memory may include that second opens Close, it has the 4th end, the 5th end, the 6th end and the second control terminal.Switch controller couple the first switch this first Control terminal and the second control terminal of the second switch, to transmit the first control signal to first switch to control three-terminal link To first end or the second end, and the second control signal of transmission to second switch to control the 4th end to be connected to the 5th end or the Six ends.Power demands device receives first voltage from the 3rd end of the first switch, and transmission second voltage is opened to second The 4th end closed.

Based on above-mentioned, of the invention to utilize switch element and switch controlling mechanism effectively to reduce power-supply wiring, optimization Boot program and avoid latch-up.Because the switch controlling mechanism of the nonvolatile memory of the present invention can be with Status register Device or instruction circuit realize that system designer will obtain more flexible selection.

For features described above of the invention and advantage can be become apparent, special embodiment below, and coordinate institute's accompanying drawings Elaborate.

Brief description of the drawings

Fig. 1 is the block diagram according to the nonvolatile memory depicted in one embodiment of the invention.

Fig. 2 is the block diagram according to the nonvolatile memory depicted in another embodiment of the present invention.

Fig. 3 is the block diagram according to the nonvolatile memory depicted in another embodiment of the present invention.

Wherein, description of reference numerals is as follows：

100、200、300：Nonvolatile memory

110、120、210、220、310、320：Switch

130：Power demands device

140：Switch controller

230、330：Inputoutput buffer

240：Status register

340：Instruction circuit

VDD：Drain voltage

VSS：Ground voltage

V1：First voltage

V2：Second voltage

C1：First control signal

C2：First control signal

IN：Input voltage

OUT：Output voltage

Embodiment

Fig. 1 is the block diagram according to the nonvolatile memory depicted in one embodiment of the invention.Fig. 1 is refer to, it is non- Volatile memory 100 may include first switch 110, second switch 120, switch controller 140 and power demands device 130.Nonvolatile memory 100 is, for example, flash memories.First switch includes first end, the second end, the 3rd end and the One control terminal.Second switch includes the 4th end, the 5th end, the 6th end and the second control terminal.Switch controller 140 couple this Second control terminal of first control terminal and the second switch 120 of one switch 110, to transmit the first control signal C1 to the One switch 110 is with control three-terminal link to first end or the second end, and transmits the second control signal C2 to second switch 120 To control the 4th end to be connected to the 5th end or the 6th end.In addition, power demands device 130 from the first switch 110 this Three ends receive first voltage V1, and transmit second voltage V2 to the 4th end of second switch 120.

Specifically, in the present embodiment, first end is coupled to a drain voltage VDD, and the second end be coupled to it is variable defeated Enter out-put supply.In addition, the 5th end is coupled to source voltage, and the 6th end is coupled to variable input and output ground connection.Say Bright, in other embodiments of the present invention, switch controller 140 can be status register, instruction circuit or other are suitable Control device, e.g. central processing unit（Central Processing Unit, CPU）Deng being not intended to limit its species herein.

Fig. 2 is the block diagram according to the nonvolatile memory depicted in another embodiment of the present invention.Refer to Fig. 1 with The difference of Fig. 2, Fig. 2 nonvolatile memory 200 and Fig. 1 nonvolatile memory 100 essentially consists in, and Fig. 2's is non- Volatile memory 200 substitutes Fig. 1 switch controller 140 with status register 240, and is taken with inputoutput buffer 230 For Fig. 1 power demands device 130.It is noted that Fig. 1 power demands device 130 can also be non-volatile memories The driver of device, such as the driver (not drawing) of word group line/bit line of driving nonvolatile memory 200, herein not Limit its species.Fig. 2 is refer to, when status register 240 does not transmit the first control signal C1 and second control signal C2 is to (that is, status register 240 and first switch 210 and second switch 220 when first switch 210 and second switch 220 For off-state), the three-terminal link of first switch 210 to second end（Such as to be connected to variable input and output electricity Source）.In addition, the 4th end of second switch 220 is connected to the 6th end（Such as it is grounded with being connected to variable input and output）.So And in one embodiment, when status register 240 transmits the first control signal C1 to first switch 210 to control the 3rd end When being connected to the first end（Such as to be connected to drain voltage VDD）, the variable input and output on the end of first switch 210 and second What power supply was galvanically isolated.More clearly, it is variable defeated on the second end when 210 and second end electrical isolation of first switch It is to belong to floating power supply (floating voltage source) to enter out-put supply.In the nonvolatile memory of application drawing 2 When 200, the variable input and output power supply of this quick condition can then allow circuit designers more preferably to utilize nonvolatile memory 200 To reach purpose of design.Further, since the adoption status register 240 of nonvolatile memory 200, first switch 210 and The switching command of two switches 220 can be stored in the memory born of the same parents of nonvolatile memory 200 and (not draw), thus reach non-easy The property lost simultaneously optimizes boot program and avoids latch-up.

Fig. 3 is the block diagram according to the nonvolatile memory depicted in another embodiment of the present invention.Refer to Fig. 2 with The difference of Fig. 3, Fig. 3 nonvolatile memory 300 and Fig. 2 nonvolatile memory 200 essentially consists in, and Fig. 3's is non- Volatile memory 300 substitutes Fig. 2 status register 240 with instruction circuit 340.Refer to Fig. 3, when instruction circuit 340 not (that is, refer to when transmitting the first control signal C1 and the second control signal C2 to first switch 310 and second switch 320 It is off-state to make circuit 340 and first switch 210 and second switch 220), the three-terminal link of first switch 310 is extremely Second end（Such as to be connected to variable input and output power supply）.In addition, the 4th end of second switch 320 is connected to the 6th End（Such as it is grounded with being connected to variable input and output）.However, in one embodiment, when the control of the transmission of instruction circuit 340 first Signal C1 to first switch 310 with control three-terminal link to the first end when（Such as to be connected to drain voltage VDD）, this What the variable input and output power supply on one switch 310 and the second end was galvanically isolated.Therefore, it is similar to Fig. 2, work as first switch 310 and during the second end electrical isolation, the variable input and output power supply on the second end is to belong to floating power supply.In the non-of application drawing 3 During volatile memory 300, the variable input and output power supply of this quick condition then also allows for circuit designers more preferably using non- Volatile memory 300 reaches purpose of design.Further, since the use instruction circuit 340 of nonvolatile memory 300, first The switching command of switch 310 and second switch 320 for example can input exclusive instruction group to realize in instruction circuit 340, because This is avoided latch-up.It should be noted that the nonvolatile memory of the present invention and non-limiting first must be set to open simultaneously Pass and second switch.System designer can set such as first switch or second switch according to demand, or set more switches To reach the controlling mechanism required by particular system.

In summary, the present invention is optimized using switch element and switch controlling mechanism effectively to reduce power-supply wiring Boot program and avoid latch-up.Because the switch controlling mechanism of the nonvolatile memory of the present invention can be with Status register Device or instruction circuit realize that system designer will obtain more flexible selection.

Although the present invention is disclosed as above with embodiment, so it is not limited to the present invention, any art Middle technical staff, without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore the protection of the present invention Scope is worked as to be defined depending on appended right claimed range institute defender of applying for a patent.

Claims

1. a kind of nonvolatile memory, including：

One first switch, the wherein first switch include a first end, one second end, one the 3rd end and one first control terminal；

One switch controller, couples first control terminal of the first switch, and the switch controller transmits one first control signal To the first switch to control the three-terminal link to the first end or second end；

One power demands device, a first voltage is received from the 3rd end of the first switch；And

One second switch, the wherein second switch include one the 4th end, one the 5th end, one the 6th end and one second control terminal, The switch controller couples the second control terminal of the second switch, the switch controller transmit one second control signal to this second Switch is to control the 4th end to be connected to the 5th end or the 6th end, and the power demands device transmits a second voltage to the 4th end of two switches,

Wherein when the switch controller do not transmit first control signal and second control signal to the first switch and During the second switch, the three-terminal link to second end, and the 4th end of the second switch of the first switch connects To the 6th end.

2. nonvolatile memory as claimed in claim 1, the wherein first end are coupled to a drain voltage, and this second End is coupled to a variable input and output power supply.

3. nonvolatile memory as claimed in claim 1, wherein the 5th end are coupled to source voltage, and the 6th End is coupled to a variable input and output ground connection.

4. nonvolatile memory as claimed in claim 1, the wherein switch controller are a status register.

5. nonvolatile memory as claimed in claim 1, the wherein switch controller are an instruction circuit.

6. nonvolatile memory as claimed in claim 4, wherein when the status register transmits first control signal extremely When the first switch is to control the three-terminal link to the first end, the first switch and the second end electrical isolation.

7. nonvolatile memory as claimed in claim 5, wherein extremely should when the instruction circuit transmits first control signal When first switch is to control the three-terminal link to the first end, the first switch and the second end electrical isolation.