CN104219867A - A circuit board and a manufacturing method thereof - Google Patents
A circuit board and a manufacturing method thereof Download PDFInfo
- Publication number
- CN104219867A CN104219867A CN201310209602.3A CN201310209602A CN104219867A CN 104219867 A CN104219867 A CN 104219867A CN 201310209602 A CN201310209602 A CN 201310209602A CN 104219867 A CN104219867 A CN 104219867A
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- layer
- conducting wire
- dielectric layer
- circuit board
- copper foil
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- Manufacturing Of Printed Wiring (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The invention provides a circuit board, which comprises a dielectric layer, a first conductive circuit layer and a second conductive circuit layer. The first conductive circuit layer and the second conductive circuit layer are formed on the two opposite sides of the dielectric layer. The first conductive circuit layer is in part embedded in the dielectric layer, and in part protrudes from the dielectric layer, while the second conductive circuit layer is formed on the surface of the dielectric layer. The invention also provides a manufacturing method of the circuit board.
Description
Technical field
The present invention relates to circuit board making technical field, relate in particular to a kind of circuit board and preparation method thereof.
Background technology
In prior art, in the manufacturing process of circuit board, conventionally adopt Layer increasing method or semi-additive process, thereby the conducting wire obtaining is made in the surface of dielectric layer.It is the surface that conducting wire all protrudes from dielectric layer.In order to protect conducting wire, conventionally need to form welding resisting layer on the surface of conducting wire.Described welding resisting layer forms by the mode of solder-mask printing ink conventionally, when printing formation welding resisting layer, needs the welding resisting layer covering forming to need the conducting wire of covering and the space between conducting wire.Because conducting wire layer itself has thickness, like this, the thickness of the welding resisting layer that need to form is greater than the thickness of conducting wire.When the thickness of wire line is larger, the thickness of the welding resisting layer of formation also needs to increase, thereby is unfavorable for the requirement of the slimming of circuit board.
And the manufacture method of conducting wire of the prior art is also unfavorable for the making on fine rule road.
Summary of the invention
Therefore, be necessary to provide a kind of manufacture method of circuit board, reduce the thickness of the welding resisting layer of circuit board, and then reduce the thickness of circuit board.
A circuit board manufacturing method, comprises step: metal support plate is provided, and described metal support plate has relative first surface and second surface; In described first surface one side, form the first photoresist graph layer; The part metals support plate etching will be not covered by the first photoresist graph layer will not be removed, thereby in described metal support plate, form and the first photoresist graph layer groove pattern of complementation mutually; In described groove pattern, plated metal forms the first conducting wire layer, and described groove pattern is filled and protruded to described the first conducting wire layer completely; Remove described the first photoresist graph layer; In the first conducting wire layer one side pressure, close dielectric layer, the first conducting wire layer that protrudes from metal support plate embeds in described dielectric layer; At dielectric layer, away from a side of the first conducting wire layer, form the second conducting wire layer; And remove described metal support plate.
A kind of circuit board, it comprises dielectric layer, the first conducting wire layer and the second conducting wire layer, described the first conducting wire layer and the second conducting wire layer are formed at the relative both sides of dielectric layer, described the first conducting wire layer segment embeds described dielectric layer, part protrudes from described dielectric layer, and described the second conducting wire layer is formed at the surface of dielectric layer.
Compared with prior art, in the technical program, because the first conducting wire layer segment is arranged in dielectric layer, part protrudes from dielectric layer, like this, and while forming welding resisting layer on the first surface, conducting wire, can adopt the welding resisting layer that thickness is less just the first conducting wire layer and the second conducting wire layer can be covered, thereby, can reduce the thickness of welding resisting layer, and then can reduce the thickness of circuit board.And because described the first conducting wire layer segment embeds in described dielectric layer, remainder is arranged in welding resisting layer, can increase the binding ability of the first conducting wire layer and dielectric layer.Than conducting wire layer in prior art, protrude from dielectric layer, in the time of can avoiding circuit board bending, stress concentrates on the intersection point place of dielectric layer, conducting wire layer and welding resisting layer and causes dielectric layer, conducting wire layer and welding resisting layer to be separated from each other, thereby improves the quality of circuit board.
Accompanying drawing explanation
Fig. 1 is the first Copper Foil of providing of the technical program embodiment and the generalized section of metal support plate.
Fig. 2 is that the first Copper Foil of Fig. 1 and the surface of metal support plate form the generalized section after the first photoresist figure and the second photoresist layer.
Fig. 3 forms groove pattern and electroplates the generalized section forming after the first conducting wire layer in the metal support plate of Fig. 2.
Fig. 4 is removal the first photoresist figure of Fig. 3 and the generalized section after the second photoresist layer.
Fig. 5 is that the generalized section after dielectric layer and the second Copper Foil is closed in the first conducting wire layer one side pressure of Fig. 4.
Fig. 6 is that a side of the dielectric layer of Fig. 5 forms the generalized section after plated metal figure.
Fig. 7 is that Fig. 6 removes the generalized section after metal support plate.
Fig. 8 is that Fig. 7 removes the generalized section after the first Copper Foil, the second Copper Foil and plating seed layer.
Fig. 9 is the generalized section of the circuit board that provides of the technical program.
Main element symbol description
| Circuit board | 100 |
| The first Copper Foil | 110 |
| Metal support plate | 120 |
| First surface | 121 |
| Second surface | 122 |
| The first photoresist graph layer | 131 |
| Photoresist layer | 132 |
| The first conducting wire layer | 140 |
| Groove pattern | 123 |
| Dielectric layer | 150 |
| Blind hole | 151 |
| The second Copper Foil | 160 |
| The second conducting wire layer | 170 |
| Plating seed layer | 171 |
| Plated metal figure | 173 |
| The first welding resisting layer | 181 |
| The first opening | 1811 |
| The first electric contact mat | 1401 |
| The first protective layer | 1402 |
| The second welding resisting layer | 182 |
| The second opening | 1821 |
| The second electric contact mat | 1701 |
| The second protective layer | 1702 |
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Below, with specific embodiment, illustrate that the technical program provides described circuit board manufacturing method.
The circuit board manufacturing method that the technical program embodiment provides comprises the steps:
The first step, refers to Fig. 1, and the first Copper Foil 110 and metal support plate 120 are provided.
Described the first Copper Foil 110 is thin copper foil, and the thickness of described the first Copper Foil 110 is 2 microns to 5 microns.Described metal support plate 120 is for adopting the metal material different from the first Copper Foil 110 materials to make.In the present embodiment, metal support plate 120 adopts metallic aluminium to make.Be understandable that, described metal support plate 120 also can adopt other metals to make.
The thickness of described metal support plate 120 is greater than the thickness of the first Copper Foil 110, and metal support plate 120 has enough mechanical strengths to support the first Copper Foil 110.
Described metal support plate 120 has relative first surface 121 and second surface 122.Described the first Copper Foil 110 is formed at the first surface 121 of metal support plate 120.
Second step, refers to Fig. 2, forms the first photoresist graph layer 131 on the surface of described the first Copper Foil 110, at the second surface 122 formation photoresist layers 132 of metal support plate 120.
This step can be specially: first, form the first photoresist layer on the surface of the first Copper Foil 110, and at second surface, form photoresist layer 132 simultaneously.The mode that described the first photoresist layer and photoresist layer 132 can adopt pressing dry film or print liquid photosensitive-ink forms.Then, described the first photoresist layer and photoresist layer 132 exposed and developed, the material of part the first photoresist layer is removed, thereby obtaining the first photoresist graph layer 131.Photoresist layer 132 is still stayed second surface 122 after exposure imaging.
The 3rd step, refer to Fig. 3, the first Copper Foil 110 and 120 etchings of part metals support plate that will be by the first photoresist graph layer 131, not be covered will not be removed, thereby at the interior formation of described metal support plate 120 and the first photoresist graph layer 131 groove pattern 123 of complementation mutually.
In this step, first adopt copper etchant solution that the first Copper Foil 110 etchings that do not covered by the first photoresist graph layer 131 are removed, thereby the first surface 121 of part metals support plate 120 is exposed.Then, adopt the etching solution of answering with the metal pair of metal support plate 120 the part metals support plate exposing 120 etchings to be removed from first surface 121 1 sides, thereby obtain groove pattern 123.In the present embodiment, metal support plate 120 is adopted and is formed from aluminium, and when metal support plate 120 is carried out to etching, the etching solution of employing is aluminium etching solution.
The 4th step, electroplates in described groove pattern 123 inside, forms the first conducting wire layer 140.
In the present embodiment, by the mode of electroplating, in the inside of groove pattern 123, fill metal.Can form by the mode of plated metal copper the first conducting wire layer 140.The time of electroplating by control, make the complete filling groove figure 123 of metal of plating, and protrude from groove pattern 123.The thickness of the first conducting wire layer 140 is greater than the degree of depth of groove pattern 123.
The 5th step, sees also Fig. 4, removes described the first photoresist graph layer 131 and photoresist layer 132.
In this step, can adopt the mode of stripping that the first photoresist graph layer 131 and photoresist layer 132 are removed.
The 6th step, sees also Fig. 5, in the first conducting wire layer 140 1 side pressure, closes dielectric layer 150.
By pressing, described the first conducting wire layer 140 protrudes from the described dielectric layer 150 of being partially submerged into of the first Copper Foil 110.In the present embodiment, when pressing dielectric layer 150, also pressing has the second Copper Foil 160.Described the second Copper Foil 160 is formed at dielectric layer 150 away from a side of the first conducting wire layer 140.
The 7th step, refers to Fig. 6, the side formation plated metal figure 173 at dielectric layer 150 away from the first conducting wire layer 140.
The formation of described plated metal figure 173 can adopt half addition method to form, and specifically can comprise the steps:
First, in the interior formation blind hole 151 of described dielectric layer 150.If the surface of dielectric layer 150 is formed with the second Copper Foil 160, before forming blind hole 151, need to carry out Darkening process to the surface of the second Copper Foil 160, so that the energy of absorbing laser, thereby make laser can run through the second Copper Foil 160 and dielectric layer 150, form blind hole 151.After forming blind hole, can further include the step of the slag that removes photoresist, with to blind hole 151 internal cleanings.
Then, at the inwall of blind hole 151 and the surface of dielectric layer 150, form plating seed layer 171.
In the present embodiment, because dielectric layer 150 surfaces are formed with the second Copper Foil 160, plating seed layer 171 is formed at the second Copper Foil 160 surfaces.Plating seed layer 171 can adopt electroless copper or spatter copper-plated mode and form.
Then, on the surface of plating seed layer 171, form the second photoresist figure.
Then, adopting the mode of electroplating is being that plating seed layer 171 surfaces form plated metal figure 173.Described plated metal figure 173 is filled blind hole 151 completely and is formed in the space between the second photoresist figure.
Finally, the second photoresist figure is removed.
The 8th step, refers to Fig. 7, removes metal support plate 120.
In this step, adopt etched mode that metal support plate 120 is removed.
The 9th step, refers to Fig. 8, removes the first Copper Foil 110, thereby and removes and be not plated the plating seed layer 171 that metallic pattern 173 covers and obtain the second conducting wire layer 170.
Due to the thickness of the first conducting wire layer 140 and plated metal figure 173 thickness much larger than the first Copper Foil 110 and plating seed layer 171.By controlling the etched time, make the first Copper Foil 110 and the etched removal of plating seed layer 171, and the first conducting wire layer 140 and plated metal figure 173 only thickness reduce.
Be understandable that, in the present embodiment, owing to also thering is the second Copper Foil 160 between plating seed layer 171 and dielectric layer 150, when carrying out etching, in the lump the second Copper Foil 160 etchings removed.
In the present embodiment, the effect of the first Copper Foil 110 and the second Copper Foil 160 can be for better conduction current in electroplating process, finer and close to guarantee the electro-coppering forming.Be understandable that, because metal support plate 120 has conductivity, therefore, in the present embodiment, also can be provided with the first Copper Foil 110, and directly the first photoresist graph layer 131 is formed to the first surface 121 of metal support plate 120.And, when forming groove pattern, also can be directly by 120 etchings of part metals support plate, to obtain groove pattern, and needn't etching the first Copper Foil 110.Equally, the surface of dielectric layer 150 also can not pressing the second Copper Foil 160, and on the surface of dielectric layer 150, directly forms plating seed layer 171, to electroplate.
When not having the first Copper Foil 110 and the second Copper Foil 160, the plating seed layer 171 that this step is only exposed the second photoresist figure 172 is removed.
Described the second conducting wire layer 170 consists of jointly the second Copper Foil 160, plating seed layer 171 and plated metal figure 173.Described the second Copper Foil 160 is formed at dielectric layer 150 surfaces.Described plating seed layer 171 is between plated metal figure 173 and the second Copper Foil 160.Be understandable that, when not having the second Copper Foil 160, the second conducting wire layer 170 consists of jointly plating seed layer 171 and plated metal figure 173.
The tenth step, refers to Fig. 9, in the first conducting wire layer 140 1 side, forms the first welding resisting layer 181, in the second conducting wire layer 170 1 side, forms the second welding resisting layer 182, obtains circuit board 100.
Described the first welding resisting layer 181 has a plurality of the first openings 1811, and part the first conducting wire layer 140 exposes from described the first opening 1811, thereby obtains a plurality of the first electric contact mats 1401.Described the second welding resisting layer 182 has a plurality of the second openings 1821, and part the second conducting wire layer 170 exposes from described the second opening 1821, thereby obtains a plurality of the second electric contact mats 1701.
The 11 step, forms the first protective layer 1402 on the surface of the first electric contact mat 1401, form the second protective layer 1702 on the surface of the second electric contact mat 1701.
Described the first protective layer 1402 and the second protective layer 1702 can weld film (OSP) for organic guarantor, can be also NiPdAu layer.
After this, can also be at the formation soldered ball of the first protective layer 1402 and the second protective layer 1702, so that potted element.
Further, the circuit board manufacturing method that the technical program provides also can, for the making of multilayer circuit board,, after the 9th step, be proceeded to increase layer and be made, thereby can obtain multilayer circuit board.
Refer to Fig. 9, the technical program also provides a kind of circuit board 100, and described circuit board 100 comprises dielectric layer 150, the first conducting wire layer 140 and the second conducting wire layer 170.
Described the first conducting wire layer 140 and the second conducting wire layer 170 form respectively the relative both sides with dielectric layer 150.Described the first conducting wire layer 140 is partially submerged in described dielectric layer 150, and remainder protrudes from dielectric layer 150.Described the second conducting wire layer 170 protrudes from described dielectric layer 150.Described the first conducting wire layer 140 and the second conducting wire layer 170 are by conductive blind hole mutual conduction.
In the present embodiment, described the second conducting wire layer 170 consists of jointly the second Copper Foil 160, plating seed layer 171 and plated metal figure 173.Described the second Copper Foil 160 is formed at dielectric layer 150 surfaces.Described plating seed layer 171 is between plated metal figure 173 and the second Copper Foil 160.
The circuit board manufacturing method that the technical program provides also can be applied to the making of rigid-flex combined board.
In the technical program, because the first conducting wire layer 140 part are arranged in dielectric layer, part protrudes from dielectric layer, like this, when the first surface, conducting wire forms welding resisting layer, can adopt the welding resisting layer that thickness is less just the first conducting wire layer and the second conducting wire layer can be covered, thereby, the thickness of welding resisting layer can be reduced, and then the thickness of circuit board can be reduced.
And because described the first conducting wire layer 140 is partially submerged in described dielectric layer 150, remainder is arranged in welding resisting layer, can increase the binding ability of the first conducting wire layer 140 and dielectric layer 150.Than conducting wire layer in prior art, protrude from dielectric layer 150, in the time of can avoiding circuit board bending, stress concentrates on the intersection point place of dielectric layer, conducting wire layer and welding resisting layer and causes dielectric layer, conducting wire layer and welding resisting layer to be separated from each other, thereby improves the quality of circuit board.
Further, in the circuit board making process that the technical program provides, in dielectric layer surface pressing, there are the second Copper Foil 160, the second Copper Foils 160 and the binding ability of dielectric layer 150 to be greater than the binding ability of plating seed layer 171 and dielectric layer 150.Therefore, in carrying out etching process, in prior art, directly on dielectric layer surface, form plating seed layer, the circuit board manufacturing method that the technical program provides can be because etching lateral erosion makes plating seed layer cause plated metal separated with dielectric layer separated with dielectric layer.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change and distortion all should belong to the protection range of the claims in the present invention.
Claims (10)
1. a circuit board manufacturing method, comprises step:
Metal support plate is provided, and described metal support plate has relative first surface and second surface;
In described first surface one side, form the first photoresist graph layer;
The part metals support plate etching will be not covered by the first photoresist graph layer will not be removed, thereby in described metal support plate, form and the first photoresist graph layer groove pattern of complementation mutually;
In described groove pattern, plated metal forms the first conducting wire layer, and described groove pattern is filled and protruded to described the first conducting wire layer completely;
Remove described the first photoresist graph layer;
In the first conducting wire layer one side pressure, close dielectric layer, the first conducting wire layer that protrudes from metal support plate embeds in described dielectric layer;
At dielectric layer, away from a side of the first conducting wire layer, form the second conducting wire layer; And
Remove described metal support plate.
2. circuit board manufacturing method as claimed in claim 1, is characterized in that, by metal support plate described in chemical etching, forms described groove pattern.
3. circuit board manufacturing method as claimed in claim 1, is characterized in that, makes described the second conducting wire layer and comprises step:
In described dielectric layer, form blind hole;
At the inwall of blind hole and the surface of dielectric layer, form plating seed layer;
On the surface of plating seed layer, form the second photoresist figure;
Adopting the mode of electroplating is being that plating seed layer surface forms plated metal figure; And
The second photoresist figure is removed.
4. circuit board manufacturing method as claimed in claim 1, is characterized in that, described in pressing, also on the surface of dielectric layer, is forming the second Copper Foil during dielectric layer, makes described the second conducting wire layer and comprises step:
In described dielectric layer and the second Copper Foil, form blind hole;
At the inwall of blind hole and the surface of the second Copper Foil, form plating seed layer;
On the surface of plating seed layer, form the second photoresist figure;
Adopting the mode of electroplating is being that plating seed layer surface forms plated metal figure; And
The second photoresist figure is removed.
5. circuit board manufacturing method as claimed in claim 1, is characterized in that, also comprises plating seed layer and the second Copper Foil that removal is not covered by described plated metal.
6. circuit board manufacturing method as claimed in claim 1, it is characterized in that, the first surface of described metal support plate is formed with the first Copper Foil, described the first photoresist graph layer is formed at the surface of described the first Copper Foil, when forming described groove pattern, first the first Copper Foil etching not covered by the first photoresist graph layer is removed.
7. circuit board manufacturing method as claimed in claim 1, is characterized in that, the material of metal support plate is aluminium.
8. a circuit board, it comprises dielectric layer, the first conducting wire layer and the second conducting wire layer, described the first conducting wire layer and the second conducting wire layer are formed at the relative both sides of dielectric layer, described the first conducting wire layer segment embeds described dielectric layer, part protrudes from described dielectric layer, and described the second conducting wire layer is formed at the surface of dielectric layer.
9. circuit board as claimed in claim 8, is characterized in that, described the second conducting wire layer has the second Copper Foil, plating seed layer and plated metal to form, and described the second Copper Foil is formed at the surface of dielectric layer.
10. circuit board as claimed in claim 8, is characterized in that, between described the first conducting wire layer and the second conducting wire layer, by conductive blind hole, mutually conducts.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310209602.3A CN104219867A (en) | 2013-05-31 | 2013-05-31 | A circuit board and a manufacturing method thereof |
| TW102119673A TWI492690B (en) | 2013-05-31 | 2013-06-03 | Method for manufacturing circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310209602.3A CN104219867A (en) | 2013-05-31 | 2013-05-31 | A circuit board and a manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104219867A true CN104219867A (en) | 2014-12-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310209602.3A Pending CN104219867A (en) | 2013-05-31 | 2013-05-31 | A circuit board and a manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN104219867A (en) |
| TW (1) | TWI492690B (en) |
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| CN110859022A (en) * | 2018-08-24 | 2020-03-03 | 三赢科技（深圳）有限公司 | Circuit board and electronic device using same |
| CN111194141A (en) * | 2018-11-15 | 2020-05-22 | 碁鼎科技秦皇岛有限公司 | Circuit board and manufacturing method thereof |
| CN112105174A (en) * | 2019-06-18 | 2020-12-18 | 宏启胜精密电子(秦皇岛)有限公司 | Circuit board and method for manufacturing the same |
| JP2021102806A (en) * | 2019-12-26 | 2021-07-15 | トヨタ自動車株式会社 | Method of producing wiring board, and wiring board |
| CN113163626A (en) * | 2020-01-22 | 2021-07-23 | 上海美维科技有限公司 | Manufacturing method of ultrathin printed circuit board |
| CN113973433A (en) * | 2020-07-24 | 2022-01-25 | 宏启胜精密电子(秦皇岛)有限公司 | Embedded circuit board and manufacturing method thereof |
| CN117769117A (en) * | 2024-01-29 | 2024-03-26 | 珠海精路电子有限公司 | Metal-based metal-clad foil plate for power semiconductor and circuit etching process thereof |
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| CN112312671B (en) * | 2019-07-30 | 2024-03-12 | 宏恒胜电子科技（淮安）有限公司 | Circuit board and preparation method thereof |
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| CN117769117A (en) * | 2024-01-29 | 2024-03-26 | 珠海精路电子有限公司 | Metal-based metal-clad foil plate for power semiconductor and circuit etching process thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201446103A (en) | 2014-12-01 |
| TWI492690B (en) | 2015-07-11 |
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