CN104201249A - Production method of inverted-growth InAlAsP/InGaAs/Ge triple-junction photovoltaic battery - Google Patents
Production method of inverted-growth InAlAsP/InGaAs/Ge triple-junction photovoltaic battery Download PDFInfo
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- CN104201249A CN104201249A CN201410466359.8A CN201410466359A CN104201249A CN 104201249 A CN104201249 A CN 104201249A CN 201410466359 A CN201410466359 A CN 201410466359A CN 104201249 A CN104201249 A CN 104201249A
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- 229910000530 Gallium indium arsenide Inorganic materials 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title abstract 5
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 238000000034 method Methods 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims abstract description 14
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 5
- 238000000151 deposition Methods 0.000 claims abstract description 4
- 238000002360 preparation method Methods 0.000 claims description 11
- 238000005516 engineering process Methods 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 abstract description 5
- 238000000206 photolithography Methods 0.000 abstract 1
- 210000004027 cell Anatomy 0.000 description 29
- 239000010410 layer Substances 0.000 description 29
- 150000001875 compounds Chemical class 0.000 description 17
- 230000000694 effects Effects 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005286 illumination Methods 0.000 description 3
- 238000001228 spectrum Methods 0.000 description 3
- 241001424688 Enceliopsis Species 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000011514 reflex Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
- H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/544—Solar cells from Group III-V materials
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention relates to a production method of an inverted-growth InAlAsP/InGaAs/Ge triple-junction photovoltaic battery. The production method specifically includes defining and etching a continuous two-step groove structure on the upper surface of a growth substrate by a photolithography technique; sequentially extending to obtain an InAlAsP sub-battery, an InGaAs sub-battery and a Ge sub-battery; quickly depositing a Ge bonding layer on the surface of the integral structure by a CVD (chemical vapor deposition) method and planarizing; providing another substrate and bonding the substrate to the planarized Ge bonding layer by a bonding the technique; etching the growth substrate and transferring the substrate. The production method is simple and high in efficiency, and the inverted-growth InAlAsP/InGaAs/Ge triple-junction photovoltaic battery produced by the production method has high photoelectric conversion efficiency and collection efficiency and has effective range limit function to natural light in particular.
Description
Technical field
The present invention relates to a kind of preparation method of compound photovoltaic cell, excellent its relates to a kind of preparation method's (having another name called the preparation method who is inverted growth three son knot III-V compounds of group photovoltaic cells) who is inverted growth InAlAsP/InGaAs/Ge tri-junction photovoltaic batteries.
Background technology
III-V compounds of group photovoltaic cell is used in space field at first, but along with the progress of Ji Intraoperative, III-V compounds of group photovoltaic cell also more and more applies to non-space field.Compared with Silicon photrouics, III-V compounds of group photovoltaic cell has larger energy conversion efficiency, and xx family its opto-electronic conversion of photovoltaic cell producing by advanced technologies becomes efficiency can exceed 25%, and Silicon photrouics can not exceed 20%.Than Silicon photrouics, III-V compounds of group photovoltaic cell can be by realizing the maximization conversion of many solar radiations with multiple sub-batteries with different band-gap energies;
For III-V compounds of group photovoltaic cell, GaInP/GaAs/Ge is a kind of the most ripe the most typical xx family photovoltaic cell, its density of photocurrent can reach 25mA/cm2, but existing III-V compounds of group photovoltaic cell is also insufficient to the spectral absorption of natural sunlight, and be mostly to be successively extended in Semiconductor substrate with formation vertical, many knots, often can not as Silicon photrouics, form flocked surface light to confinement effect, existing III-V compounds of group photovoltaic cell needs further to be promoted.
Summary of the invention
In order to make up the deficiency of existing III-ⅤZu family photovoltaic cell, further improve the utilance to light, the invention provides preparation method's (having another name called the preparation method who is inverted growth three son knot III-V compounds of group photovoltaic cells) that a kind of InAlAsP/IGaAs/Ge tri-ties compound photovoltaic cell, InAlAsP/InGaAs/Ge tri-junction structures prepared by the method can improve the conversion efficiency of photovoltaic cell effectively, these InAlAsP/InGaAs/Ge tri-son knot compound photovoltaic cells also have second order bulge-structure light to confinement effect simultaneously, the bulge-structure of this second order can improve light contact area effectively, and can produce confinement effect efficiently to light,
The method of inversion growth three son knot III-V compounds of group photovoltaic cells provided by the invention, comprises step:
Step (1), provide growth substrates, define and etch the first continuous rank groove structure by photoetching process at described growth substrates upper surface;
Step (2), utilize photoetching process to define and etch second-order groove structure in described the first rank groove structure, to form the growth substrates with continuous second order groove structure;
Step (3), in the described growth substrates with continuous second order groove structure, extension goes out the sub-battery of InAlAsP, the sub-battery of InGaAs, Ge battery successively;
Step (4) is utilized CVD method fast deposition Ge bonded layer on total surface, and planarization to be to make the Ge bonded layer after this planarization cover all epitaxial loayers of multi-junction photovoltaic battery completely, and has smooth upper surface;
Step (5) provides another substrate, and is bonded on told planarization Ge bonded layer by bonding technology; Etch away the transfer that growth substrates completes substrate;
Further, in step (3), between the sub-battery of InAlAsP, the sub-battery of InGaAs, Ge battery, be formed with n++/p++ tunnel diode, and n++/p++ tunnel diode between the sub-battery of InAlAsP and the sub-battery of InGaAs is n++ InGaP/p++ InGaAsP heterojunction tunnel diode;
Further, the degree of depth of described second-order groove is at least greater than the twice of the first rank depth of groove;
Further, the degree of depth of described the first rank groove is 50 ~ 80um; The degree of depth of described second-order groove is 150 ~ 200um; Interval between every two second order groove structures is less than the degree of depth of the first rank groove;
Further, step (3) is also included in described growth substrates and forms etching stop layer, extension Window layer, p++ contact layer successively on etching stop layer;
Further, step (3) is also included on described Ge battery extension back surface field layer, n++Ge contact layer, Ge resilient coating successively;
Further, step (5) is specially: described another substrate is bonded to by bonding technology on the planarization Ge bonded layer of photovoltaic cell; Etch away growth substrates to etching stop layer, finally utilize HCl solution to etch away etching stop layer to complete the transfer of substrate;
Further, described growth substrates is and the InP substrate of InAlAsP Lattice Matching;
Further, the base thickness of described Ge battery is greater than the base thickness of the sub-battery of InGaAs, and the base thickness of the sub-battery of InGaAs is greater than the base thickness of the sub-battery of InAlAsP;
Further, the base thickness of Ge battery is that 2.5 microns, the base thickness of the sub-battery of InGaAs are that approximately 2.2 microns, the base thickness of the sub-battery of InAlAsP are 1.8-2.0 micron; The emitter region thickness of Ge battery, the sub-battery of InGaAs and the sub-battery of InAlAsP is 80-100 nanometer.
Brief description of the drawings
Fig. 1-7 are according to the schematic diagram of the each preparatory phase of three son knot compound photovoltaic cell of the present invention;
Fig. 8 a is the schematic diagram after having prepared according to three son knot compound photovoltaic cells of the present invention;
Fig. 8 b is the enlarged drawing of a-quadrant in Fig. 8 a, i.e. the each son knot of photovoltaic cell of the present invention material layer schematic diagram.
Embodiment
Below with reference to preferred forms, the present invention is described further, and beneficial effect of the present invention will become clear in describing in detail;
Referring to Fig. 8 a and 8b, Fig. 8 a is the structural representation of the three sub-junction photovoltaic batteries that need to prepare of this method, the details of Fig. 8 b photovoltaic cell structure layer; Compound photovoltaic cell has the InAlAsP/InGaAs/Ge structure of three son knots, wherein the band gap of the sub-battery 300 of InAlAsP is in 1.9ev left and right, the band gap of the sub-battery 200 of InGaAs is in 1.40ev left and right, the band gap of Ge battery 100 is 0.66ev left and right, optimizing structure of the band gap that three junction photovoltaic batteries prepared by the present invention have can be mated the wavelength structure of nature solar spectrum, make full use of the photon energy of each wavelength period of photovoltaic, optimize on the whole the absorption to solar spectrum, improve battery efficiency.And, referring to Fig. 8 a, compound photovoltaic cell of the present invention top plane of illumination is shaped as continuous second order bulge-structure 002,003, each second order bulge-structure 002,003 has the first rank projection 002 and second-order projection 003, and wherein second-order projection 003 raises up from the upper surface of the first rank projection 002;
The process of explanation this method of first relatively summarizing, gets back to Fig. 1, growth substrates 001, be chosen as the material of lattice and InAlAsP Lattice Matching, the present embodiment is preferably InP substrate, and this substrate can obtain in several ways, the InP substrate of for example extension or eigen I nP substrate; Define out the figure of the first rank groove by photoetching process selectivity at InP growth substrates 001 upper surface, and etch the first continuous rank groove 0021, as shown in Figure 2; Then with reference to figure 3, utilize equally photoetching process to define second-order groove in the first rank groove 0021, and etch second-order groove 0031, remove photoetching process process layer (etch-resistant layer etc.) used and form the InP growth substrates 001 with continuous second order groove structure as shown in Figure 4; Please refer to Fig. 5 and Fig. 8 b, extension etching stop layer 010 in InP growth substrates 001, the n Ge base 101 of the p+ Ge emitter region 102 of the n InGaAs base 201 of the p+ InGaAs emitter region 202 of the n InAlAsP base 301 of the p+ InAlAsP emitter region 302 of extension Window layer 009, p++ contact layer 008, the sub-battery 300 of InAlAsP, the sub-battery 300 of InAlAsP, n++/p++ tunnel diode 007, the sub-battery 200 of InGaAs, the sub-battery 200 of InGaAs, n++/p++ tunnel diode 006, Ge battery 100, Ge battery 300 successively on etching stop layer 010; Extension back surface field layer 403 on the n of Ge battery 300 Ge base 101, continues extension n++ Ge contact layer 402, Ge resilient coating 401 successively afterwards, so far forms structure as shown in Figure 5; Afterwards with reference to figure 6, at second order groove (0021,0031) and on total surface, utilize CVD method fast deposition Ge bonded layer 004, and planarization Ge bonded layer 004, make the Ge bonded layer 004 after this planarization cover all epitaxial loayers of multi-junction photovoltaic battery completely, and there is smooth upper surface.Then with reference to figure 7, substrate 005 is bonded to by bonding technology on the planarization Ge bonded layer 004 of photovoltaic cell; Last with reference to figure 8a, etch away InP growth substrates 001 to etching stop layer 010, finally utilize HCl solution to etch away etching stop layer 010 to complete the transfer of substrate;
By the explanation of above-mentioned entirety, preparation process is described; Below will details of the present invention be described from many aspects:
The final three sub-junction photovoltaic batteries that form of the present invention pass through Ge battery 100, the sub-battery 200 of InGaAs, the sub-battery 300 of InAlAsP to form three junction batteries of 1.90ev/1.40ev/0.66ev band structure.Wherein the band gap of each sub-battery is formed as progressively increasing in the direction away from support substrates 005, this is extremely conducive to the raising of density of photocurrent, wherein Ge battery 100 has the band gap of 0.66ev left and right, the thickness of n Ge base 101 is formed as 2.5 microns, and p+ Ge emitter region 102 thickness are formed as 80-100 nanometer; The sub-battery 200 of InGaAs has the band gap of 1.40ev left and right, and the thickness of n InGaAs base 201 is formed as 2.2 microns, and the thickness of p+ InGaAs emitter region 202 is formed as 80-100 nanometer; The sub-battery 300 of InAlAsP has the band gap of 1.90ev left and right, the thickness of n InAlAsP base 301 is formed as 1.8-2.0 micron, the thickness of p+ InAlAsp emitter region 302 is formed as 80-100 nanometer, in the present invention, is less than for the sub-battery that is optimized for the close plane of illumination that energy gap is large of each sub-battery base thickness the battery away from plane of illumination that energy gap is little; Particularly, the thickness that is exactly n InAlAsP base 301 is less than the thickness of n InGaAs base 201, the thickness of n InGaAs base 201 is less than the thickness of n Ge base 101, is conducive to like this maximum using to natural photovoltaic spectrum;
The n++/p++ tunnel-through diode 006,007 of the Lattice Matching forming between each sub-battery layers, in this InAlAsP/InGaAs/Ge can be with the multi-junction photovoltaic battery of system, the n++/p++ tunnel-through diode of Lattice Matching need to be selected heterojunction structure, potential barrier between this knot that is conducive to provide high, the particularly tunnel-through diode 007 between the sub-battery of InAlAsP and InGaAs, in our experiment, observe this light is played to favourable effect by few son diffusion between the sub-battery 300 of InAlAsP on upper strata and minimizing knot, in experiment, we have used n++ InGaP/p++ InGaAsP heterojunction tunnel-through diode as the tunnel-through diode 007 between InAlAsP and the sub-battery of InGaAs, this has improved the photoelectric current efficiency of battery to the full extent, certainly as for epitaxially grown III-V family photovoltaic cells of tying more, the thickness of tunnel-through diode is very important and responsive, in the time selecting n++ InGaP/p++ InGaAsP heterojunction tunnel-through diode as tunnel-through diode 007 between body series multi-junction photovoltaic battery InAlAsP and the sub-battery of InGaAs, the gross thickness of the n++ InGaP/p++ InGaAsP heterojunction tunnel-through diode 007 of optimum experimental is 30-45 nanometer,
The second order bulge-structure (002 of InAlAsP/InGaAs/Ge tri-junction photovoltaic batteries, 003) preparation process is to be based upon to have formed second order groove structure (0021, in Ge growth substrates 001 0031), each sub-battery and other functional layers are formed in this Ge growth substrates 001 successively, afterwards by substrate change, the transfer of figure to be to form.Therefore, (002 of second order bulge-structure, 003) obtaining the parameters such as size is in advance by second order groove structure (0021,0031) set, the depth d 1 of the first rank groove 0021 forming in preparation process, the end face of growth substrates 001 is formed as 50 ~ 80um to the distance between the bottom of the first rank groove 0021; The depth d 2 of second-order groove 0031, the vertical range between the bottom surface of the first rank groove to the bottom surface of second-order groove 0031 is formed as being at least greater than the twice of the first rank groove 0021 depth d 1, is preferably 150 ~ 200um; Interval between every two second order groove structures is less than the degree of depth of the first rank groove 0021; The width of each second order groove structure is preferably 150 ~ 200um.What form by above-mentioned parameter has a second order bulge-structure (002,003) photovoltaic cell, in the time that incident ray is irradiated to photovoltaic cell surface at a certain angle, first absorbed a part on the surface of second-order bulge-structure 003 by battery, a unabsorbed part that is irradiated to the second bulge-structure 003 side reflexes to the surface of the first rank projection cube structure 002 and is absorbed by the first rank projection cube structure, and can not reflexed on the battery surface between second order projection cube structure by a light part for the first rank projection cube structure Surface absorption.Thus and thus, make originally can only utilize the light that is irradiated to battery upper surface, tightly can not utilize by second order bulge-structure the light that is irradiated to upper surface, can also be by the reflection of the side light that is irradiated to side that utilizes more, this part light is exactly the additional light rays increasing, in a way, this structure has been carried out light the utilization of architecture, therefore can reach maximized utilization to solar incident ray.Even more noteworthy, the light reflecting from the battery surface between second order projection cube structure again can the surface of directive the first rank projection cube structure and/or the surface of second-order projection cube structure, so photovoltaic light is maximized ground confinement on the surface of photovoltaic cell with second order projection cube structure, and battery is greatly improved to the utilization of sunray; It is inseparable can realizing that above-mentioned limit neck effect chooses with above-mentioned parameter, if it is too large that the height of second-order projection is less than interval between height or the second order bulge-structure of the first rank projection, in preparation process the degree of depth of second-order groove to be less than interval between the degree of depth or the second order groove structure of the first rank groove too large, can not play confinement effect or can greatly slacken confinement effect sunray;
By the description of above-mentioned specific embodiment, disclose very all sidedly design of the present invention, those skilled in the art should understand advantage part of the present invention; Understanding for the application should not limit in the above-described embodiments, and the execution mode of the obvious distortion consistent with the present invention's spirit also should belong to design of the present invention.
Claims (10)
1. a preparation method who is inverted growth InAlAsP/InGaAs/Ge tri-junction photovoltaic batteries, comprises step:
Step (1), provide growth substrates, define and etch the first continuous rank groove structure by photoetching process at described growth substrates upper surface;
Step (2), utilize photoetching process to define and etch second-order groove structure in described the first rank groove structure, to form the growth substrates with continuous second order groove structure;
Step (3), in the described growth substrates with continuous second order groove structure, extension goes out the sub-battery of InAlAsP, the sub-battery of InGaAs, Ge battery successively;
Step (4) is utilized CVD method fast deposition Ge bonded layer on total surface, and planarization to be to make the Ge bonded layer after this planarization cover all epitaxial loayers of multi-junction photovoltaic battery completely, and has smooth upper surface;
Step (5) provides another substrate, and is bonded on told planarization Ge bonded layer by bonding technology; Etch away the transfer that growth substrates completes substrate.
2. the method for claim 1, in described step (3), between the sub-battery of InAlAsP, the sub-battery of InGaAs, Ge battery, be formed with n++/p++ tunnel diode, and n++/p++ tunnel diode between the sub-battery of InAlAsP and the sub-battery of InGaAs is n++ InGaP/p++ InGaAsP heterojunction tunnel diode.
3. the method as described in claim 1-2, the degree of depth of described second-order groove is at least greater than the twice of the first rank depth of groove.
4. the method as described in claim 1-3, the degree of depth of described the first rank groove is 50 ~ 80um; The degree of depth of described second-order groove is 150 ~ 200um; Interval between every two second order groove structures is less than the degree of depth of the first rank groove.
5. the method as described in claim 1-2, step (3) is also included in described growth substrates and forms etching stop layer, extension Window layer, p++ contact layer successively on etching stop layer.
6. the method as described in claim 1-2, step (3) is included in well on described Ge battery extension back surface field layer, n++Ge contact layer, Ge resilient coating successively.
7. the method as described in claim 1-6, step (5) is specially: described another substrate is bonded to by bonding technology on the planarization Ge bonded layer of photovoltaic cell; Etch away growth substrates to etching stop layer, finally utilize HCl solution to etch away etching stop layer to complete the transfer of substrate.
8. the method as described in claim 1-2, described growth substrates is and the InP substrate of InAlAsP Lattice Matching.
9. the method as described in claim 1-2, the base thickness of described Ge battery is greater than the base thickness of the sub-battery of InGaAs, and the base thickness of the sub-battery of InGaAs is greater than the base thickness of the sub-battery of InAlAsP.
10. method as claimed in claim 9, the base thickness of Ge battery is that 2.5 microns, the base thickness of the sub-battery of InGaAs are that approximately 2.2 microns, the base thickness of the sub-battery of InAlAsP are 1.8-2.0 micron; The emitter region thickness of Ge battery, the sub-battery of InGaAs and the sub-battery of InAlAsP is 80-100 nanometer.
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| CN105449025A (en) * | 2015-12-11 | 2016-03-30 | 中国电子科技集团公司第十八研究所 | InGaN/Ge four-junction solar cell and manufacturing technique |
| CN106847999A (en) * | 2017-02-28 | 2017-06-13 | 南通壹选工业设计有限公司 | A kind of manufacture method of solar power generation component |
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