CN104167442A - Vertical GaN heterojunction field-effect transistor with P type GaN island - Google Patents
Vertical GaN heterojunction field-effect transistor with P type GaN island Download PDFInfo
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- CN104167442A CN104167442A CN201410433616.8A CN201410433616A CN104167442A CN 104167442 A CN104167442 A CN 104167442A CN 201410433616 A CN201410433616 A CN 201410433616A CN 104167442 A CN104167442 A CN 104167442A
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- 230000005669 field effect Effects 0.000 title claims abstract description 19
- 230000004888 barrier function Effects 0.000 claims abstract description 56
- 229910002601 GaN Inorganic materials 0.000 claims description 185
- 239000011248 coating agent Substances 0.000 claims description 48
- 238000000576 coating method Methods 0.000 claims description 48
- 239000000463 material Substances 0.000 claims description 11
- 230000005684 electric field Effects 0.000 abstract description 29
- 230000015556 catabolic process Effects 0.000 abstract description 15
- 239000012535 impurity Substances 0.000 abstract description 3
- 230000000903 blocking effect Effects 0.000 abstract 4
- 229910002704 AlGaN Inorganic materials 0.000 abstract 3
- 230000003247 decreasing effect Effects 0.000 abstract 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 53
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 208000032750 Device leakage Diseases 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7788—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention discloses a vertical GaN heterojunction field-effect transistor with a P type GaN island. The field-effect transistor comprises an AlGaN barrier layer, wherein a source electrode and a grid electrode are arranged on the AlGaN barrier layer, and a GaN channel layer, a p-GaN current blocking layer, an n-GaN buffer layer, an n+-GaN substrate and a drain electrode are arranged under the AlGaN barrier layer in sequence. A hole with the caliber of LAP is formed in the center of the p-GaN current blocking layer and nested to the n-GaN buffer layer, the p-GaN island is arranged in the n-GaN buffer layer, and the p-GaN island is located between the p-GaN current blocking layer and the n+-GaN substrate. In the GaNPI-VHFET, by using the p-GaN island layer, extra p type impurities are introduced into the n-GaN buffer layer, and the n-GaN buffer layer area is exhausted in the off state, so that the buffer area is equivalent to an intrinsic region during voltage resistance. Therefore, the problem that the vertical electric field intensity is continuously decreased when current moves far away from an interface of the p-GaN current blocking layer and the n-GaN buffer layer is solved to increase breakdown voltage of a device. Meanwhile, leaked current of the drain electrode is also decreased in the off state.
Description
Technical field
The present invention relates to the high withstand voltage devices field of semiconductor, specifically refer to the vertical gallium nitride radical heterojunction field effect transistor on a kind of P of having XingGaN island.
Background technology
Gallium nitride radical heterojunction field effect transistor (GaN Heterojunction Fiele-Effect Transistor, GaN HFET) not only there is energy gap large, critical breakdown electric field is high, electron saturation velocities is high, good heat conductivity, radioresistance and the good excellent specific properties such as chemical stability, simultaneously gallium nitride (GaN) material can form the two-dimensional electron gas heterojunction raceway groove with high concentration and high mobility with the material such as aluminum gallium nitride (AlGaN), therefore be specially adapted to high pressure, high-power and high temperature is applied, it is one of power electronics transistor of applying tool potentiality.
Existing height is withstand voltage, and GaN HFET structure is mainly transversal device, and basic device structure as shown in Figure 1.Device mainly comprises substrate, GaN resilient coating, and the source electrode, the drain and gate that on AlGaN barrier layer and AlGaN barrier layer, form, wherein source electrode and drain electrode and AlGaN barrier layer form ohmic contact, and grid and AlGaN barrier layer form Schottky contacts.But for horizontal GaN HFET, under cut-off state, from source electrode injected electrons, can arrive drain electrode through GaN resilient coating, form leak channel, excessive resilient coating leakage current can cause device to puncture in advance, cannot give full play to the withstand voltage advantage of height of GaN material, thus the application of restriction GaN HFET aspect high pressure.Laterally GaN HFET device mainly relies on the active area between grid and drain electrode to bear withstand voltage simultaneously, obtain large puncture voltage, need grid and drain electrode spacing that design is very large, thereby can increase chip area, be unfavorable for the development trend of modern power electronic system portability, miniaturization.
Compare with horizontal GaN HFET, vertical GaN HFET (GaN Vertical Heterojunction Fiele-Effect Transistor, GaN VHFET) structure can overcome the above problems effectively.As shown in Figure 2, device mainly comprises drain electrode, n to conventional GaN VHFET structure
+the grid and the source electrode that on-GaN substrate, n-GaN resilient coating, p-GaN current barrier layer, GaN channel layer, AlGaN barrier layer and AlGaN barrier layer, form, wherein drain electrode and n
+-GaN substrate forms ohmic contact, and source electrode and AlGaN barrier layer form ohmic contact, and grid and AlGaN barrier layer form Schottky contacts.Comparing with horizontal GaN HFET, there is following advantage in GaN VHFET: device is mainly by the longitudinal pitch between grid and drain electrode, and n-GaN resilient coating bears withstand voltagely, and it is very little that lateral device dimensions can design, effectively saving chip area; The p-n junction simultaneously forming between p-GaN current barrier layer and n-GaN resilient coating can effectively stop from source electrode injected electrons, thus suppression device resilient coating leakage current.In addition, GaN VHFET structure also has many-sided advantages such as being convenient to encapsulation, low channel temperature.
For conventional GaN VHFET structure, device mainly relies on the p-n junction forming between p-GaN current barrier layer and n-GaN resilient coating to bear withstand voltage, when peak value electric field reaches critical electric field or leakage current and reaches threshold value in device, in n-GaN resilient coating, the size of width of depletion region has determined the puncture voltage of device, increase along with n-GaN buffer layer thickness, width of depletion region while puncturing in n-GaN also increases thereupon, but when n-GaN buffer layer thickness surpasses after certain value, width of depletion region while puncturing in n-GaN reaches capacity, the puncture voltage of device also reaches capacity, no longer along with the increase of n-GaN buffer layer thickness, increase, thereby limited the withstand voltage application of height of GaN VHFET.Vertical electric field intensity in n-GaN resilient coating can reduce gradually along with the p-n junction interface away between p-GaN current barrier layer and n-GaN resilient coating simultaneously, because device electric breakdown strength equals vertical electric field intensity in n-GaN resilient coating along the axial integration of y, the vertical electric field intensity constantly reducing makes the puncture voltage of device cannot reach GaN material limits, can not give full play to the withstand voltage advantage of height of GaN base device.
At patent documentation 1[Chinese patent application publication number: CN 103151392A] in, a kind of vertical gallium nitride radical heterojunction field effect transistor with p-GaN buried structure has been proposed, by introduce extra p-n junction between source electrode and drain electrode, institute's making alive between device source leakage is born by a plurality of p-n junctions, and changed the phenomenon that in conventional structure, electric field reduces along with the p-n junction face away between current barrier layer and resilient coating, improve near electric field strength drain electrode, thereby realized the puncture voltage that improves device.But this structure source electric field between leaking presents zigzag and distributes, when each p-n junction interface electric field reaches critical electric field the electric field of all the other positions but still lower than critical breakdown electric field, the withstand voltage potentiality that still have further lifting.
Summary of the invention
The problem existing for conventional GaN VHFET device, the invention provides and a kind ofly device electric breakdown strength can be improved to the vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island that approach the limit.
The present invention is achieved through the following technical solutions: a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island, comprise barrier layer, described barrier layer top is provided with source electrode and grid, and bottom is followed successively by channel layer, p-GaN current barrier layer, n-GaN resilient coating, n
+-GaN substrate, drain electrode; It is L that described p-GaN current barrier layer center is provided with width
aPaperture, and be nested in n-GaN resilient coating top, in described n-GaN resilient coating, be provided with p-GaN island, described p-GaN island is positioned at p-GaN current barrier layer and n
+between-GaN substrate.By introduce p-GaN island layer in n-GaN resilient coating, while puncturing, n-GaN resilient coating is exhausted completely by p-GaN island, make device mainly bear the withstand voltage p-n junction from forming between original p-GaN current barrier layer and n-GaN resilient coating, become by p-GaN current barrier layer, GaN resilient coating, n
+the p-i-n knot that-GaN substrate forms, wherein i intrinsic region internal electric field almost remains unchanged, thereby greatly promotes n-GaN resilient coating internal electric field intensity, and then the compressive resistance of boost device.Meanwhile, due to the constant characteristic of p-i-n knot intrinsic region electric field, in resilient coating, electric field is approximately equal to critical electric field and remains unchanged, and this makes device electric breakdown strength of the present invention will more approach the limit.
For realizing better the present invention, further, described p-GaN island, along y direction, is divided into n layer from top to bottom, and n is positive integer, scope 1≤n≤1000 of n.
For realizing better the present invention, further, every one deck of described p-GaN island layer is same center line, and this center line is also the center line of n-GaN resilient coating.
For realizing better the present invention, further, described p-GaN island layer length is L
p, its scope is 1nm≤L
p≤ L
aP.Described p-GaN island layer thickness is T
p, its scope is 1nm≤T
p≤ 5 μ m.
For realizing better the present invention, further, described p-GaN island layer adjacent two layers spacing is T
p-p, its scope is 1nm≤T
p-p≤ 30 μ m.
For realizing better the present invention, further, described p-GaN island layer top layer and the spacing between p-GaN current barrier layer are T
c-P, its scope is 1nm≤T
c-P≤ 15 μ m, p-GaN island layer bottom and n
+spacing between-GaN substrate is T
p-S, its scope is 1nm≤T
p-S≤ 15 μ m.
For realizing better the present invention, further, in described p-GaN island layer, every layer of doping content scope is 1 * 10
15~ 1 * 10
20cm
-3.
For realizing better the present invention, further, described p-GaN island layer be shaped as rectangle.The shape of p-GaN island layer is not limited only to rectangle, also comprises ellipse, circle, triangle, trapezoidal, hexagon and other shapes.
For realizing better the present invention, further, the thickness of described p-GaN current barrier layer is 0.1 ~ 5 μ m, and doping content is 1 * 10
15~ 1 * 10
20cm
-3.
For realizing better the present invention, further, the material of described barrier layer is Al
xin
yga
zn, 0≤x≤1 wherein, 0≤y≤1,0≤z≤1, x+y+z=1.
The present invention compared with prior art, has the following advantages and beneficial effect:
The present invention by introducing p-GaN island layer in n-GaN resilient coating, while puncturing, n-GaN resilient coating is exhausted completely by p-GaN island, make device mainly bear the withstand voltage p-n junction from forming between original p-GaN current barrier layer and n-GaN resilient coating, become by p-GaN current barrier layer, GaN resilient coating, n
+the p-i-n knot that-GaN substrate forms, wherein i intrinsic region internal electric field almost remains unchanged, thereby greatly promotes n-GaN resilient coating internal electric field intensity, and then the compressive resistance of boost device.Meanwhile, due to the constant characteristic of p-i-n knot intrinsic region electric field, in resilient coating, electric field is approximately equal to critical electric field and remains unchanged, and this makes device electric breakdown strength of the present invention will more approach the limit, and under cut-off state, drain leakage current also will decrease.
Accompanying drawing explanation
Fig. 1 is the horizontal GaN HFET of prior art cross-sectional structure schematic diagram;
Fig. 2 is prior art GaN VHFET cross-sectional structure schematic diagram;
Fig. 3 is GaN PBL-VHFET cross-sectional structure schematic diagram in documents;
Fig. 4 be GaN PI-VHFET provided by the invention and conventional GaN VHFET while puncturing A-A ' section vertical electric field distribute relatively;
Fig. 5 is breakdown characteristics comparison under GaN PI-VHFET provided by the invention and conventional GaN VHFET cut-off state.
Wherein: 101-source electrode, 102-grid, 103-barrier layer, 104-channel layer, 201-p-GaN current barrier layer, 105-n-GaN resilient coating, 202-n
+-GaN substrate, 203-drain electrode, 301-p-GaN island layer.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Fig. 1 is that oneself has the horizontal GaN HFET of technology structural representation, mainly comprise from bottom to up substrate, gallium nitride (GaN) resilient coating, gallium nitride (GaN) channel layer, the source electrode, the drain and gate that on aluminum gallium nitride (AlGaN) barrier layer and aluminum gallium nitride (AlGaN) barrier layer, form, wherein source electrode and drain electrode and aluminum gallium nitride (AlGaN) barrier layer forms ohmic contact, and grid and aluminum gallium nitride (AlGaN) barrier layer forms Schottky contacts.
Fig. 2 is conventional GaN VHFET structural representation, mainly comprises from bottom to up drain electrode, n
+-GaN substrate, n-GaN resilient coating, p-GaN current barrier layer, GaN channel layer, the source electrode and the grid that on AlGaN barrier layer and AlGaN barrier layer, form, wherein source electrode and drain electrode are ohmic contact, and grid is Schottky contacts.
Embodiment 1:
The present embodiment primary structure, as shown in Figure 3, comprises barrier layer 103, and described barrier layer 103 tops are provided with source electrode 101 and grid 102, and bottom is followed successively by channel layer 104, p-GaN current barrier layer 201, n-GaN resilient coating 105, n
+-GaN substrate 202, drain electrode 203, it is L that described p-GaN current barrier layer 201 centers are provided with width
aPaperture, and be nested in n-GaN resilient coating 105 tops, in described n-GaN resilient coating 105, be provided with p-GaN island 301, described p-GaN island 301 is positioned at p-GaN current barrier layer 201 and n
+between-GaN substrate 202.
Wherein, described p-GaN island 301, along y direction, is divided into n layer from top to bottom, and n is positive integer, scope 1≤n≤1000 of n.
Every one deck of p-GaN island layer 301 is same center line, and this center line is also the center line of n-GaN resilient coating 105.
P-GaN island layer 301 length are L
p, its scope is 1nm≤L
p≤ L
aP, described p-GaN island layer 301 thickness are T
p, its scope is 1nm≤T
p≤ 5 μ m.Layer 301 adjacent two layers spacing in p-GaN island are T
p-p, its scope is 1nm≤T
p-p≤ 30 μ m.
Spacing between p-GaN island layer 301 top layer and p-GaN current barrier layer 201 is T
c-P, its scope is 1nm≤T
c-P≤ 15 μ m, p-GaN island layer 301 bottom and n
+spacing between-GaN substrate 202 is T
p-S, its scope is 1nm≤T
p-S≤ 15 μ m.
In p-GaN island layer 301, every layer of doping content scope is 1 * 10
15~ 1 * 10
20cm
-3.
P-GaN island layer 301 be shaped as rectangle.
The thickness of p-GaN current barrier layer 201 is 0.1 ~ 5 μ m, and doping content is 1 * 10
15~ 1 * 10
20cm
-3.
The material of barrier layer 103 is AlGaN, and the material of channel layer 104 is GaN.
In GaN HFET of the present invention, be easy to illustrate that the example the invention is intended to is the conventional GaN VHFET device property contrast shown in the GaN PI-VHFET shown in Fig. 3 and Fig. 2 most.Device architecture parameter is provided by table 1, and wherein, in GaN PI-VHFET, described p-GaN island layer 301 is divided into two-layer, and the parameter of every one deck is identical.
Table 1 device architecture parameter
Fig. 4 is that x=4 μ m place cross section vertical electric field strength ratio is while puncturing for GaN PI-VHFET provided by the invention and conventional GaN VHFET.As can be seen from the figure, for conventional GaN VHFET, while puncturing, the interior vertical electric field of n-GaN resilient coating 105 only extends near y=14 μ m, and when device breakdown is described, n-GaN resilient coating 105 does not exhaust completely, and part n-GaN resilient coating 105 can not bear withstand voltage; Vertical electric field intensity is along with the p-n junction interface away between p-GaN current barrier layer 201 and n-GaN resilient coating 105 (y=1 μ m place) constantly reduces simultaneously, finally cause device electric breakdown strength lower, be only 1723V, can not give full play to the high withstand voltage advantage of GaN base device.
But for GaN PI-VHFET provided by the invention, use due to p-GaN island layer 301, introduced extra p-type impurity n-GaN resilient coating 105 is interior, while puncturing, whole n-GaN resilient coating 105 is completely depleted, be equivalent to an intrinsic region, vertical electric field intensity no longer reduces gradually along with the p-n junction interface away between p-GaN current barrier layer 201 and n-GaN resilient coating 105, but almost remain unchanged, now whole n-GaN resilient coating 105 can bear withstand voltage, thereby device electric breakdown strength is got a promotion, and resulting devices puncture voltage is 2639V.
In order to verify the castering action of 301 pairs of device electric breakdown strength of p-GaN provided by the invention island layer, the breakdown characteristics of GaN PI-VHFET provided by the invention and conventional GaN VHFET has been carried out to emulation, device parameters is consistent with table 1, and result is as shown in Figure 5.Device electric breakdown strength is defined as under cut-off state in device when maximum field intensity reaches 3MV/cm, drain electrode 203 bias voltages that apply.As can be seen from the figure, compare with conventional GaN VHFET, GaN PI-VHFET structure has promoted the puncture voltage of device effectively, and in the identical situation of other parameters of device, device electric breakdown strength increases to 2639V from 1723V, has increased and has surpassed 50%., from Fig. 5, also can find out, the conventional device leakage electric current without p-GaN island structure of leakage current contrast of device reduces to some extent meanwhile.
Be to be understood that any variation of this structure, or and the combination in any of existing structure, can be effectively as embodiment of the present invention.The invention is not restricted to embodiment described above, and certainly comprise the multiple embodiments that meets the principle of the invention.
For example, the materials A lGaN as the barrier layer 103 in above-mentioned embodiment is only material molecule formula Al
xin
yga
zspecial circumstances in N during y=0, and the GaN channel material of using can be any other III group-III nitride semiconductor with the band gap that is less than barrier layer 103.The channel layer 104 that is described as not mixing can comprise and mixes one partly or completely the N-shaped impurity in part, for example Si.
The above, be only preferred embodiment of the present invention, not the present invention done to any pro forma restriction, and any simple modification, equivalent variations that every foundation technical spirit of the present invention is done above embodiment, within all falling into protection scope of the present invention.
Claims (10)
1. a vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island, it is characterized in that: comprise barrier layer (103), described barrier layer (103) top is provided with source electrode (101) and grid (102), and bottom is followed successively by channel layer (104), p-GaN current barrier layer (201), n-GaN resilient coating (105), n
+-GaN substrate (202), drain electrode (203); It is L that described p-GaN current barrier layer (201) center is provided with width
aPaperture, and be nested in n-GaN resilient coating (105) top, in described n-GaN resilient coating (105), be provided with p-GaN island (301), described p-GaN island (301) is positioned at p-GaN current barrier layer (201) and n
+between-GaN substrate (202).
2. a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island according to claim 1, it is characterized in that: described p-GaN island (301) is along y direction, be divided into from top to bottom n layer, n is positive integer, scope 1≤n≤1000 of n.
3. a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island according to claim 2, it is characterized in that: every one deck of described p-GaN island layer (301) is same center line, this center line is also the center line of n-GaN resilient coating (105).
4. according to a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island described in claim 2 or 3, it is characterized in that: described p-GaN island layer (301) length is L
p, its scope is 1nm≤Lp≤L
aP, described p-GaN island layer (301) thickness is T
p, its scope is 1nm≤T
p≤ 5 μ m.
5. according to a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island described in claim 2 or 3, it is characterized in that: described p-GaN island layer (301) adjacent two layers spacing is T
p-p, its scope is 1nm≤T
p-p≤ 30 μ m.
6. according to a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island described in claim 2 or 3, it is characterized in that: described p-GaN island layer (301) top layer and the spacing between p-GaN current barrier layer (201) are T
c-P, its scope is 1nm≤T
c-P≤ 15 μ m, p-GaN island layer (301) bottom and n
+spacing between-GaN substrate (202) is T
p-S, its scope is 1nm≤T
p-S≤ 15 μ m.
7. according to a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island described in claim 2 or 3, it is characterized in that: in described p-GaN island layer (301), every layer of doping content scope is 1 * 10
15~ 1 * 10
20cm
-3.
8. according to a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island described in claim 1 or 2 or 3, it is characterized in that: described p-GaN island layer (301) be shaped as rectangle.
9. according to a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island described in claim 1 or 2 or 3, it is characterized in that: the thickness of described p-GaN current barrier layer (201) is 0.1 ~ 5 μ m, and doping content is 1 * 10
15~ 1 * 10
20cm
-3.
10. according to a kind of vertical gallium nitride radical heterojunction field effect transistor with P XingGaN island described in claim 1 or 2 or 3, it is characterized in that: the material of described barrier layer (103) is Al
xin
yga
zn, 0≤x≤1 wherein, 0≤y≤1,0≤z≤1, x+y+z=1.
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Cited By (8)
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|---|---|---|---|---|
| CN105336771A (en) * | 2015-09-28 | 2016-02-17 | 西南交通大学 | High-voltage heterojunction transistor |
| CN106340535A (en) * | 2016-08-01 | 2017-01-18 | 苏州捷芯威半导体有限公司 | Semiconductor device and manufacturing method thereof |
| CN106887467A (en) * | 2017-03-09 | 2017-06-23 | 西安电子科技大学 | Leakage half superjunction gallium nitride base vertical-type hetero-junctions power device of connection |
| CN110875372A (en) * | 2018-09-03 | 2020-03-10 | 苏州捷芯威半导体有限公司 | Field effect transistor and manufacturing method |
| CN112713190A (en) * | 2020-12-29 | 2021-04-27 | 西安电子科技大学芜湖研究院 | Preparation method of gallium nitride HEMT device with vertical structure |
| CN113380877A (en) * | 2021-06-10 | 2021-09-10 | 四川美阔电子科技有限公司 | Power device of double-junction field plate |
| CN113539822A (en) * | 2021-09-16 | 2021-10-22 | 浙江大学杭州国际科创中心 | Preparation method of vertical current aperture transistor and corresponding device |
| JP2022515428A (en) * | 2018-12-24 | 2022-02-18 | ▲東▼南大学 | Heterojunction semiconductor device with low on-resistance |
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