CN104078544A - LED chip encapsulated without routing and encapsulation technology - Google Patents

LED chip encapsulated without routing and encapsulation technology Download PDF

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Publication number
CN104078544A
CN104078544A CN201410350590.0A CN201410350590A CN104078544A CN 104078544 A CN104078544 A CN 104078544A CN 201410350590 A CN201410350590 A CN 201410350590A CN 104078544 A CN104078544 A CN 104078544A
Authority
CN
China
Prior art keywords
positive electrode
electrode
conducting layer
transparency conducting
led chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410350590.0A
Other languages
Chinese (zh)
Inventor
庞晓东
陈浩明
王瑞庆
刘镇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHENZHEN ZHAOMINGXIN TECHNOLOGY HOLDINGS Co Ltd
Original Assignee
SHENZHEN ZHAOMINGXIN TECHNOLOGY HOLDINGS Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN ZHAOMINGXIN TECHNOLOGY HOLDINGS Co Ltd filed Critical SHENZHEN ZHAOMINGXIN TECHNOLOGY HOLDINGS Co Ltd
Priority to CN201410350590.0A priority Critical patent/CN104078544A/en
Publication of CN104078544A publication Critical patent/CN104078544A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes

Abstract

The invention discloses an LED chip encapsulated without routing. The LED chip encapsulated without routing sequentially comprises a transparent conducting layer, an emitting layer and a liner from the top to the bottom; the LED chip encapsulated without routing further comprises a positive electrode, a negative electrode and an isolation region, wherein the positive electrode extends upwards to the transparent conducting layer along the liner; the isolation region is arranged between the positive electrode and the negative electrode and extends upwards to the transparent conducting layer. The invention further discloses an encapsulation technology. The encapsulation technology comprises the following steps: the negative electrode is arranged on the liner; the positive electrode is arranged on the liner and the positive electrode is enabled to be connected with the transparent conducting layer; an isolation aisle allowing the negative electrode to be isolated from the positive electrode is arranged. The LED chip encapsulated without routing and the encapsulation technology overcome the problem of low qualification rate caused by belt lines; the qualification rate of the product is improved.

Description

Exempt from LED chip and the packaging technology of routing encapsulation
Technical field
The present invention relates to lighting apparatus field, relate in particular to a kind of LED chip and packaging technology of exempting from routing encapsulation.
Background technology
LED chip is the core component of LED etc., major function is to be luminous energy by electric energy conversion, the concrete structure of current traditional LED chip as shown in Figure 1, it comprises transparency conducting layer 1, the first photic zone 2, luminescent layer 3, the second photic zone 4, reflector 5 and substrate 6 etc. from top to bottom successively, in this structure, each layer all adopts electric conducting material to make, this kind of LED chip connects negative electrode with substrate, adopts the mode of routing to connect positive electrode on transparency conducting layer.
While making this kind of LED chip because of used substrate 6 semiconductor structure for conducting electricity, although making rectilinear chip above-mentioned is the most direct reasonably practice, but also therefore limit the follow-up envelope fortune dress expense of LED chip, cannot avoid the yield loss that causes because of routing and cost to rise, also cannot overcome and cover degradation problem under the amount of light causing because of electrode.
Summary of the invention
The technical problem that the present invention mainly solves is to provide the LED chip of exempting from routing encapsulation that a kind of yields is high, can effectively strengthen light extraction efficiency, and a kind of packaging technology is also provided.
For solving the problems of the technologies described above, the technical scheme that the present invention adopts is: a kind of LED chip of exempting from routing encapsulation is provided, comprise successively transparency conducting layer, luminescent layer and substrate from top to bottom, also comprise positive electrode, negative electrode and isolated area, described positive electrode extends upwardly to transparency conducting layer along substrate, described isolated area is arranged between positive electrode and negative electrode, and described isolated area extends upwardly to transparency conducting layer.
For solving the problems of the technologies described above, another technical solution used in the present invention is: a kind of packaging technology is provided, comprises the steps:
Negative electrode is set on substrate;
Positive electrode is set on substrate, and makes positive electrode connect transparency conducting layer;
Offer the isolation aisle that negative electrode and positive electrode are kept apart.
The invention has the beneficial effects as follows: be different from prior art, the present invention arranges positive electrode, negative electrode and isolated area in LED chip bottom, this positive electrode upwards connects transparency conducting layer, negative electrode is arranged on substrate and with substrate and is electrically connected, isolated area extends up through the first photic zone, make positive electrode and negative electrode form isolation in the bottom of LED and middle part, after powering up this LED chip in positive electrode, each layer structure and negative electrode form loop, ensured LED chip stabilized illumination.The present invention need not carry out routing processing, both positive and negative polarity is guided to the bottom of LED chip, has overcome the low problem of yields because causing with line, has improved the yields of product.Secondly, because electrode is arranged on bottom, overcome the shading phenomenon that electrode causes, amount of light and light extraction efficiency are further promoted.
Brief description of the drawings
Fig. 1 is LED chip cutaway view of the prior art;
Fig. 2 is the overall structure cutaway view of one embodiment of the present invention;
Fig. 3 is that the present invention offers the structure cutaway view after isolation aisle and electrode hole;
Fig. 4 is the upward view of Fig. 3;
Fig. 5 is the structure cutaway view that the present invention is provided with connecting electrode;
Fig. 6 is that the present invention installs the structure cutaway view before connecting electrode of the present invention;
Fig. 7 is the vertical view of Fig. 6.
Label declaration:
1, transparency conducting layer; 2, the first photic zone; 3, luminescent layer; 4, the second photic zone; 5, reflector; 6, substrate; 7, electrode hole; 8, isolation aisle; 9, connecting electrode; 10, interface channel; 11, positive electrode; 12, negative electrode; 13, insulator.
Embodiment
By describing technology contents of the present invention, structural feature in detail, being realized object and effect, below in conjunction with execution mode and coordinate accompanying drawing to be explained in detail.
The present invention is compared with prior art in technology, and positive electrode extends upwardly to transparency conducting layer along substrate, and described isolated area is arranged between positive electrode and negative electrode, and described isolated area is arranged between positive electrode and negative electrode and extends upwardly to transparency conducting layer.The present invention guides to both positive and negative polarity the bottom of LED chip, has overcome the low problem of yields because causing with line, has improved the yields of product.
Exempt from as shown in Figure 2 the LED chip of routing encapsulation, comprise successively transparency conducting layer 1, the first photic zone 2, luminescent layer 3, the second photic zone 4 and substrate 6 from top to bottom, also comprise positive electrode 11, negative electrode 12 and isolated area, this positive electrode 11 extends upwardly to transparency conducting layer 1 along substrate 6, isolated area is arranged between positive electrode 11 and negative electrode 12, and isolated area extends upwardly to transparency conducting layer 1.Certainly, in order further to increase the amount of light of LED chip, reduce the absorption of substrate 6 to light, between the second photic zone 4 and substrate 6, one deck reflector 5 is also set.Certainly, the first photic zone and the second photic zone are set can obviously improve the light of ejaculation in the present embodiment, in some other embodiment, the structure that this first, second photic zone also can be other is as PN joint etc.
Together consult Fig. 3 and Fig. 4, the present invention arranges positive electrode 11 on substrate 6, negative electrode 12 and isolated area, this positive electrode 11 upwards connects transparency conducting layer 1, negative electrode 12 is arranged on substrate 6 and with substrate 6 and is electrically connected, isolated area extends up through the first photic zone 2, make positive electrode 11 and negative electrode 12 form isolation at bottom and the middle part of LED, this measure is mainly and prevents that positive electrode 11 and negative electrode 12 from directly connecting the short circuit causing, again because positive electrode 11 is communicated with transparency conducting layer 1, after powering up this LED structure in positive electrode, transparency conducting layer 1, the first photic zone 2, luminescent layer 3, the second photic zone 4, reflector 5, substrate 6 and negative electrode 12 form loop.The present invention need not carry out routing processing, both positive and negative polarity is guided to the bottom of LED chip, has overcome the low problem of yields because causing with line, has improved the yields of product.Secondly, because electrode is arranged on bottom, overcome the shading phenomenon that electrode causes, amount of light and light extraction efficiency are further promoted.
This positive electrode 11 comprises the electrode hole 7 of upwards offering along substrate 6 and is filled in the electric conductor in electrode hole 7, electrode hole 7 extends to transparency conducting layer 1, in the present embodiment, this electrode hole 7 is circular and spaced multiple holes, and in hole, filled conductive body forms positive electrode 11.
This isolated area comprises the isolation aisle 8 of upwards offering along substrate 6, this isolation aisle 8 is arc, the isolation aisle 8 of arc arranges around positive electrode 11, positive electrode 11 and negative electrode 12 are isolated in acting as of isolation aisle 8 completely, certainly in some other embodiment, the pattern in this isolation aisle 8 and big or small pattern are not limited to this, as long as the region separation of positive and negative electrode 12 can be opened, and reach best luminous efficiency.
For further reaching better isolation effect, isolate in aisle 8 and between positive electrode 11 and negative electrode 12 and be also filled with insulator 13, insulator 13 first in this channel isolation is to be come in the middle part of this LED structure and lower isolation, ensure effectively insulation, the secondth, fill this kind of insulator 13 and can effectively strengthen the overall mechanical strength of this LED chip.
Together consult as 5, Fig. 6 and Fig. 7, due in the time making high-power LED chip, because chip area is larger, electric current stroll scope possibly cannot cover whole chips, cause the luminous efficiency of subregion to reduce, for improving this situation, this transparency conducting layer 1 is horizontally arranged with connecting electrode 9, and this connecting electrode 9 is electrically connected with positive electrode 11 and extends to negative electrode 12 region directions.
Further, in this transparency conducting layer 1 or on transparency conducting layer 1, interface channel 10 is set, in the present embodiment, this interface channel 10 is arranged on transparency conducting layer 1, interface channel 10 is communicated with electrode hole 7 and extends the interior connecting electrode 9 that arranges of this interface channel 10 to negative electrode 12 region directions.
In addition, also provide the packaging technology of said structure, comprise the steps:
Negative electrode 12 is set on substrate 6;
Positive electrode 11 is set on substrate 6, and makes positive electrode 11 connect transparency conducting layer 1;
Offer the isolated area that negative electrode 12 and positive electrode 11 are kept apart.
Further, the making of this isolated area comprises the steps: upwards to offer the isolation aisle 8 through the first photic zone 2 along substrate 6, at substrate 6 surfaces and the interior insulating barrier that arranges in isolation aisle 8, and 12 of reserved negative electrodes, in the present embodiment, this isolation aisle 8, for etching forms, is mainly that positive electrode 11 and negative electrode 12 are kept apart.
The making of this positive electrode 11 comprises the steps: upwards to offer along substrate 6 electrode hole 7 that extends to transparency conducting layer 1, and filled conductive body, in the present embodiment, this this electrode hole 7 is circular spaced multiple holes, and in hole, filled conductive body forms positive electrode 11.
For further improving luminous efficiency, in transparency conducting layer 1 or on transparency conducting layer 1, interface channel 10 is offered on edge, at the interior electric conductor that arranges of interface channel 10.
To sum up, the present invention need not carry out routing processing, both positive and negative polarity is guided to the bottom of LED chip, has overcome the low problem of yields because causing with line, has improved the yields of product.Secondly, because electrode is arranged on bottom, overcome the shading phenomenon that electrode causes, amount of light and light extraction efficiency are further promoted.On this basis, isolate in aisle 8 and between positive electrode 11 and negative electrode 12 and be also filled with insulator 13, insulator 13 first in this channel isolation is to be come in the middle part of this LED structure and lower isolation, ensure effectively insulation, the secondth, fill this kind of insulator 13 and can effectively strengthen the overall mechanical strength of this LED chip.Further for solving because chip area is larger, electric current stroll scope possibly cannot cover whole chips, the problem that causes the luminous efficiency of subregion to reduce, this transparency conducting layer 1 is horizontally arranged with connecting electrode 9, this connecting electrode 9 is electrically connected with positive electrode 11 and extends to negative electrode 12, has effectively improved light extraction efficiency.
The foregoing is only embodiments of the invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or conversion of equivalent flow process that utilizes specification of the present invention and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present invention.

Claims (10)

1. exempt from the LED chip of routing encapsulation for one kind, comprise positive electrode, negative electrode, the from top to bottom transparency conducting layer, luminescent layer and the substrate that set gradually, it is characterized in that, also comprise isolated area, described positive electrode extends upwardly to transparency conducting layer along substrate, and described isolated area is arranged between positive electrode and negative electrode and extends upwardly to transparency conducting layer.
2. LED chip of exempting from routing encapsulation according to claim 1, is characterized in that: described positive electrode comprises the electrode hole of upwards offering along substrate and be filled in the electric conductor in electrode hole, and described electrode hole extends to transparency conducting layer.
3. LED chip of exempting from routing encapsulation according to claim 1, it is characterized in that: described isolated area comprises the isolation aisle of upwards offering along substrate, described isolation aisle is arc, and described isolation aisle is around described positive electrode setting and positive electrode and negative electrode are separated.
4. LED chip of exempting from routing encapsulation according to claim 3, is characterized in that: in described isolation aisle and between positive electrode and negative electrode, be also filled with insulator.
5. according to the LED chip of exempting from routing encapsulation described in claim 1-4 any one, it is characterized in that: described transparency conducting layer is horizontally arranged with connecting electrode, described connecting electrode is electrically connected with described positive electrode and extends to negative electrode region direction.
6. LED chip of exempting from routing encapsulation according to claim 5, it is characterized in that: in described transparency conducting layer or on transparency conducting layer, interface channel is set, described interface channel is communicated with electrode hole and extends to negative electrode region direction, and described connecting electrode is set in described interface channel.
7. a packaging technology, is characterized in that, comprises the steps:
Negative electrode is set on substrate;
Positive electrode is set on substrate, and makes positive electrode connect transparency conducting layer;
Offer and there is the isolation aisle that negative electrode and positive electrode are kept apart.
8. packaging technology according to claim 7, is characterized in that: the making in described isolation aisle comprises the steps:
Upwards offer through the first euphotic isolation aisle along substrate, in substrate surface and isolation aisle, insulating barrier is set, and reserved negative electrode position.
9. packaging technology according to claim 7, is characterized in that: the making of described positive electrode comprises the steps:
Upwards offer the electrode hole that extends to transparency conducting layer along substrate, and filled conductive body.
10. according to the packaging technology described in claim 7-9 any one, it is characterized in that: in transparency conducting layer or on transparency conducting layer, along offering interface channel, electric conductor is set in interface channel.
CN201410350590.0A 2014-07-22 2014-07-22 LED chip encapsulated without routing and encapsulation technology Pending CN104078544A (en)

Priority Applications (1)

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CN201410350590.0A CN104078544A (en) 2014-07-22 2014-07-22 LED chip encapsulated without routing and encapsulation technology

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410350590.0A CN104078544A (en) 2014-07-22 2014-07-22 LED chip encapsulated without routing and encapsulation technology

Publications (1)

Publication Number Publication Date
CN104078544A true CN104078544A (en) 2014-10-01

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016011600A1 (en) * 2014-07-22 2016-01-28 深圳市兆明芯科技控股有限公司 Led chip encapsulated without routing, and encapsulation process

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010045564A1 (en) * 1995-03-17 2001-11-29 Toyoda Gosei Co., Ltd. Light-emitting semiconductor device using group III nitride compound
US20040217360A1 (en) * 2003-04-30 2004-11-04 Negley Gerald H. Light-emitting devices having coplanar electrical contacts adjacent to a substrate surface opposite an active region and methods of forming the same
CN1851948A (en) * 2006-05-29 2006-10-25 金芃 Through-hole ventical structure semiconductor chip and device
CN102157662A (en) * 2010-02-12 2011-08-17 台湾积体电路制造股份有限公司 Light-emitting devices with through-substrate via connections
US20140054618A1 (en) * 2012-08-22 2014-02-27 Syue- Min Li Light-emitting diode devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010045564A1 (en) * 1995-03-17 2001-11-29 Toyoda Gosei Co., Ltd. Light-emitting semiconductor device using group III nitride compound
US20040217360A1 (en) * 2003-04-30 2004-11-04 Negley Gerald H. Light-emitting devices having coplanar electrical contacts adjacent to a substrate surface opposite an active region and methods of forming the same
CN1851948A (en) * 2006-05-29 2006-10-25 金芃 Through-hole ventical structure semiconductor chip and device
CN102157662A (en) * 2010-02-12 2011-08-17 台湾积体电路制造股份有限公司 Light-emitting devices with through-substrate via connections
US20140054618A1 (en) * 2012-08-22 2014-02-27 Syue- Min Li Light-emitting diode devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016011600A1 (en) * 2014-07-22 2016-01-28 深圳市兆明芯科技控股有限公司 Led chip encapsulated without routing, and encapsulation process

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Application publication date: 20141001