CN104022634B - An energy storage capacitance high and low voltage surge suppression circuit and method for suppressing - Google Patents

An energy storage capacitance high and low voltage surge suppression circuit and method for suppressing Download PDF

Info

Publication number
CN104022634B
CN104022634B CN201410300193.2A CN201410300193A CN104022634B CN 104022634 B CN104022634 B CN 104022634B CN 201410300193 A CN201410300193 A CN 201410300193A CN 104022634 B CN104022634 B CN 104022634B
Authority
CN
China
Prior art keywords
sampling
comparator
resistor
circuit
connected
Prior art date
Application number
CN201410300193.2A
Other languages
Chinese (zh)
Other versions
CN104022634A (en
Inventor
胡海斌
赵隆冬
胡进
徐辉
张石磊
Original Assignee
中国电子科技集团公司第四十三研究所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中国电子科技集团公司第四十三研究所 filed Critical 中国电子科技集团公司第四十三研究所
Priority to CN201410300193.2A priority Critical patent/CN104022634B/en
Publication of CN104022634A publication Critical patent/CN104022634A/en
Application granted granted Critical
Publication of CN104022634B publication Critical patent/CN104022634B/en

Links

Abstract

本发明提供一种储能电容式高、低压浪涌抑制电路及其抑制方法,该电路包括常闭继电器、防回流二极管、DC/DC转换器、储能电容、常开继电器、MOS管、第一限流电阻、由第一采样电阻和第二采样电阻构成的第一采样电路、由第三采样电阻和第四采样电阻构成的第二采样电路、由稳压二极管和第二限流电阻构成的基准电压电路以及由第一比较器、第一开关元件、第二比较器和第二开关元件构成的控制电路。 The present invention provides an energy storage capacitance high and low voltage surge suppression circuit and a method for inhibiting the circuit comprises a normally closed relay, the backflow preventing diode, DC / DC converters, energy storage capacitors, normally open relays, the MOS tube, the a current limiting resistor, a first sampling circuit comprising a first resistor and a second sampling sampling resistor, a second sampling circuit of a third resistor and a fourth sampling sampling resistor, a Zener diode and a second current-limiting resistors a reference voltage circuit and a control circuit by the first comparator, a first switching element, a second comparator and a second switching element thereof. 本发明还提供一种储能电容式高、低压浪涌抑制电路的抑制方法。 The present invention also provides a high storage capacitance, low pressure method of suppressing surge suppression circuit. 本发明可以同时满足抑制高压浪涌和低压浪涌的需求,提高了电源电路的工作稳定性。 The present invention can meet the needs of high voltage while suppressing surges and a low pressure surge, improve the stability of the power supply circuit.

Description

一种储能电容式高、低压浪涌抑制电路及其抑制方法 An energy storage capacitance high and low voltage surge suppression circuit and method for suppressing

技术领域 FIELD

[0001]本发明涉及电压浪涌抑制技术领域,具体是一种储能电容式高、低压浪涌抑制电路及其抑制方法。 [0001] The present invention relates to voltage surge suppression technology, and in particular an energy storage capacitance is high, low voltage surge suppression circuit and control method.

背景技术 Background technique

[0002]在电源领域的电路设计中必须考虑浪涌抑制,否则当电源输入端输入浪涌电压时,会对整个电源电路产生干扰,使电路出现故障或损坏。 [0002] In the power supply circuit design must be considered in the art surge suppression, or when the surge voltage power input terminal, a power supply circuit will generate interference across the circuit failure or damage. 传统的储能电容式浪涌抑制电路只能单独抑制高压浪涌或低压浪涌,不利于整个电源电路的稳定性。 A capacitive energy storage conventional surge suppression can suppress high voltage surges or separate low voltage surge, it is not conducive to the stability of the entire power supply circuit.

发明内容 SUMMARY

[0003]本发明的目的在于提供一种储能电容式高、低压浪涌抑制电路及其抑制方法,能够同时满足抑制高压浪涌和低压浪涌的需求。 [0003] The object of the present invention to provide a high capacitive energy storage, low voltage surge suppression circuit and a suppression method can satisfy the demand to suppress high voltage surges and a low pressure surges.

[0004]本发明的技术方案为: [0004] aspect of the present invention is:

[0005] —种储能电容式高、低压浪涌抑制电路,包括防回流二极管、DC/DC转换器、储能电容和MOS管;所述防回流二极管的阳极和DC/DC转换器的输入端均通过常闭继电器连接到电源输入电压,所述防回流二极管的阴极直接与电源输出端连接,所述DC/DC转换器的输出端通过常开继电器与电源输出端连接;所述储能电容的一端连接到DC/DC转换器与常开继电器之间的节点,另一端接地;所述MOS管的漏极连接到电源输入电压,其源极通过第一限流电阻接地,MOS管与第一限流电阻之间的节点分别连接到常闭继电器和常开继电器的控制端, [0005] - seed storage capacitance high and low voltage surge suppression circuit comprises a backflow preventing diode, DC / DC converters, a storage capacitor and a MOS transistor; the anti-return diode and the anode input DC / DC converter are connected to the power input terminal voltage through normally closed relay, the backflow preventing diode cathode connected directly to the power supply output, the DC / DC converter by the output of normally open relay power output terminal; said accumulator One end of the capacitor is connected to a node between the DC / DC converter and the normally open relay, the other end is grounded; the drain of the MOS transistor is connected to the power supply input voltage, its source is grounded through a first current limiting resistor, MOS transistor with a node between the first current limiting resistor connected to the normally closed relay and a control terminal of the normally open relay,

[0006]该电路还包括由第一采样电阻和第二采样电阻构成的第一采样电路、由第三采样电阻和第四采样电阻构成的第二采样电路、由稳压二极管和第二限流电阻构成的基准电压电路以及由第一比较器、第一开关元件、第二比较器和第二开关元件构成的控制电路; [0006] The circuit further includes a first sampling circuit comprising a first resistor and a second sampling sampling resistor, a second sampling circuit of a third resistor and a fourth sampling sampling resistor, a Zener diode and a second flow restrictor a reference voltage circuit composed of a resistor and a control circuit by the first comparator, a first switching element, second switching element and a second comparator configured;

[0007]所述第一采样电阻与第二采样电阻串联连接,所述第一采样电阻的一端连接到电源输入电压,另一端通过第二采样电阻接地,所述第三采样电阻与第四采样电阻串联连接,所述第三采样电阻的一端连接到电源输入电压,另一端通过第四采样电阻接地;所述稳压二极管的阳极接地,其阴极通过第二限流电阻连接到电源输入电压; [0007] sampling said first resistor and a second resistor connected in series with the sampling, the sampling end of the first resistor connected to the supply voltage input, and the other end is grounded through a second sampling resistor, the third resistor and the fourth sampling sampling a resistor connected in series, one end of the third sampling resistor connected to the supply voltage input, the other end of the fourth resistor is grounded through the sample; an anode of the Zener diode is grounded, and a cathode connected to a supply voltage input through a second current limiting resistor;

[0008]所述第一比较器的反相输入端和第二比较器的同相输入端均连接到稳压二极管与第二限流电阻之间的节点,所述第一比较器的同相输入端连接到第一采样电阻与第二采样电阻之间的节点,所述第二比较器的反相输入端连接到第三采样电阻与第四采样电阻之间的节点,所述第一比较器的输出端通过第一开关元件与MOS管的栅极连接,所述第二比较器的输出端通过第二开关元件与MOS管的栅极连接。 [0008] The first comparator inverting input terminal and a second comparator inverting input terminal is connected to the node between the Zener diode and the second current limiting resistor, the first comparator inverting input terminal connected to a node between the first resistor and the second sampling sampling resistor, the inverting input terminal of the second comparator is connected to a node between the third resistor and the fourth sampling sampling resistor, said first comparator an output terminal connected to the gate of the first switching element via the MOS transistor, the output terminal of the second comparator is connected to the gate via a second switching element and a MOS transistor.

[0009]所述的储能电容式高、低压浪涌抑制电路,所述第一开关元件选用第一二极管,所述第一二极管的阳极与第一比较器的输出端连接,其阴极与MOS管的栅极连接;所述第二开关元件选用第二二极管,所述第二二极管的阳极与第二比较器的输出端连接,其阴极与MOS管的栅极连接。 High storage capacitance [0009], wherein the low voltage surge suppression circuit, the first selection switching element a first diode, the output terminal of the first diode anode is connected to the first comparator, a cathode connected to the gate of the MOS transistor; a second selection of the second switching element is a diode, the output terminal of the second diode and the anode of the second comparator is connected to the gate of the MOS transistor and a cathode connection.

[0010]所述的一种储能电容式高、低压浪涌抑制电路的抑制方法,包括以下步骤: [0010] A storage capacitor of the high type, low pressure method of suppressing surge suppression circuit, comprising the steps of:

[0011] (I)第一采样电路对电源输入电压进行采样,送至第一比较器的同相输入端,第二采样电路对电源输入电压进行采样,送至第二比较器的反相输入端,基准电压电路输出基准电压,分别送至第一比较器的反相输入端和第二比较器的同相输入端; [0011] (I) a first sampling circuit for sampling an input voltage of the power supply, to the first comparator inverting input terminal, a second sampling circuit for sampling an input voltage of the power supply, supplied to the inverting input of the second comparator , the reference voltage circuit outputs a reference voltage, respectively to the inverting input of the first comparator inverting input terminal and a second terminal of the same comparator;

[0012] (2)当电源输入电压稳定时,第一比较器和第二比较器均输出低电平,第一开关元件和第二开关元件均截止,MOS管截止,常闭继电器的触点闭合,防回流二极管导通,常开继电器的触点断开,DC/DC转换器为储能电容充电; [0012] (2) when the power supply input voltage is stable, the first comparator and the second comparator output low level, the first switching element and second switching elements are both turned off, the MOS tube is turned off, the normally closed relay contacts closing, the backflow prevention diode is turned on, the normally open relay contact opens, DC / DC converter is a charge storage capacitor;

[0013] (3)当电源输入电压出现高压浪涌时,第一比较器输出高电平,第一开关元件导通,驱动MOS管导通,控制常闭继电器的触点断开、常开继电器的触点闭合,储能电容为后级电路供电,防回流二极管截止; [0013] (3) When the high voltage power supply input voltage surge occurs, the first comparator outputs a high level, the first switching element is turned on, the driving MOS transistor is turned on, the normally closed control relay contact opens, the normally open relay contacts are closed storage capacitor power supply for the post-stage circuit, backflow preventing diode is turned off;

[0014] (4)当电源输入电压出现低压浪涌时,第二比较器输出高电平,第二开关元件导通,驱动MOS管导通,控制常闭继电器的触点断开、常开继电器的触点闭合,储能电容为后级电路供电,防回流二极管截止。 [0014] (4) when the low-voltage power supply input voltage surge occurs, the second comparator outputs a high level, the second switching element is turned on, the driving MOS transistor is turned on, the normally closed control relay contact opens, the normally open relay contacts are closed storage capacitor power supply circuit of the subsequent stage, the backflow preventing diode is turned off.

[0015]由上述技术方案可知,本发明可以同时满足抑制高压浪涌和低压浪涌的需求,提高了电源电路的工作稳定性。 [0015] From the above technical solution, the present invention can be suppressed to meet the needs of high voltage surges and a low pressure surge, improve the stability of the power supply circuit simultaneously.

附图说明 BRIEF DESCRIPTION

[0016]图1是本发明具体实施例的电路结构示意图。 [0016] FIG. 1 is a schematic diagram of the circuit structure of particular embodiments of the present invention.

具体实施方式 Detailed ways

[0017]下面结合附图和具体实施例进一步说明本发明。 Drawings and specific examples further illustrate the present invention [0017] The following binding.

[0018]如图1所示,一种储能电容式高、低压浪涌抑制电路,包括常闭继电器K1、防回流二极管D0、DC/DC转换器1、储能电容C、常开继电器K2、NM0S管Q、第一限流电阻R5、第一采样电路2、第二采样电路3、基准电压电路4和控制电路5,第一采样电路2由第一采样电阻Rl和第二采样电阻R2构成,第二采样电路3由第三采样电阻R3和第四采样电阻R4构成,基准电压电路4由稳压二极管Dz和第二限流电阻R6构成,控制电路5由第一比较器V1、第一二极管D1、第二比较器V2和第二二极管D2构成。 [0018] As illustrated, an energy storage capacitance high and low voltage surge suppression circuit, comprising a normally closed relay K1, the backflow preventing diode D0, DC / DC converter 1, the storage capacitor C, normally open relay K2 , NM0S tube Q, a first current limiting resistor R5, a first sampling circuit 2, a second sampling circuit 3, a reference voltage circuit 4 and a control circuit 5, a first sampling circuit 2 samples the first resistor Rl and second sampling resistor R2 configuration, a second sampling circuit 3 is constituted by a third resistor R3 and the fourth sampling sampling resistor R4, the reference voltage circuit 4 is constituted by the zener diode Dz and the second current limiting resistor R6, the control circuit 5 by the first comparator V1, the first a diode D1, a second comparator V2 and the second diode D2.

[0019]防回流二极管DO的阳极和DC/DC转换器I的输入端均通过常闭继电器Kl连接到电源输入电压,防回流二极管DO的阴极直接与电源输出端连接,DC/DC转换器I的输出端通过常开继电器K2与电源输出端连接。 [0019] The anode of the backflow prevention diode DO and the input of the DC / DC converter I are connected through the normally closed relay Kl to the power supply input voltage, the backflow prevention diode DO cathode connected directly to the power supply output, DC / DC converter I the output terminal of the normally open relay K2 is connected through the power supply output. 储能电容C的一端连接到DC/DC转换器I与常开继电器K2之间的节点,另一端接地。 One end of the storage capacitor C is connected to the DC / DC converter and the node I between the normally open relay K2, and the other end is grounded. NMOS管Q的漏极连接到电源输入电压,其源极通过第一限流电阻R5接地,NMOS管Q与第一限流电阻R5之间的节点分别连接到常闭继电器Kl和常开继电器K2的控制端。 Drain of the NMOS transistor Q is connected to the power supply input voltage, its source through a first current-limiting resistor R5 is grounded, the node between the NMOS transistor Q and the first current limiting resistor R5 are connected to the normally closed relay normally open relays Kl and K2 the control side.

[0020] 第一采样电阻Rl与第二采样电阻R2串联连接,第一采样电阻Rl的一端连接到电源输入电压,另一端通过第二采样电阻R2接地。 [0020] The first sampling resistor Rl and resistor R2 connected in series with a second sampling, the sampling end of the first resistor Rl is connected to the power supply input voltage, and the other end is grounded through a second resistor R2 sampling. 第三采样电阻R3与第四采样电阻R4串联连接,第三采样电阻R3的一端连接到电源输入电压,另一端通过第四采样电阻R4接地。 Third sampling resistor R3 and the fourth resistor R4 are connected in series sampling, the sampling end of the third resistor R3 is connected to the power supply input voltage, and the other end is grounded through a fourth resistor R4 sampling. 稳压二极管Dz的阳极接地,其阴极通过第二限流电阻R6连接到电源输入电压。 The anode is grounded zener diode Dz, and its cathode connected to a second power supply input voltage through current limiting resistor R6.

[0021]第一比较器Vl的反相输入端和第二比较器V2的同相输入端均连接到稳压二极管Dz与第二限流电阻R6之间的节点,第一比较器Vl的同相输入端连接到第一采样电阻Rl与第二采样电阻R2之间的节点,第二比较器V2的反相输入端连接到第三采样电阻R3与第四采样电阻R4之间的节点。 Inverting input terminal [0021] The inverting input of the first comparator and a second comparator Vl V2 are connected to a node between the zener diode Dz and the second current limiting resistor R6, the noninverting input of the first comparator Vl terminal is connected to a node between the first resistor Rl and the second sampling sampling resistor R2, an inverting input terminal of the second comparator V2 is connected to the node between the third resistor R3 and the fourth sampling sampling resistor R4. 第一比较器Vl的输出端连接第一二极管Dl的阳极,第一二极管Dl的阴极与匪OS管Q的栅极连接。 Vl output terminal of the first comparator is connected to the anode of the first diode Dl, a cathode bandit OS transistor Q connected to the gate of the first diode Dl. 第二比较器V2的输出端连接第二二极管D2的阳极,第二二极管D2的阴极与NMOS管Q的栅极连接。 The output of the second comparator V2 is connected to the anode of the second diode D2, the cathode and the gate of NMOS transistor Q is connected to the second diode D2.

[0022] 本发明的工作原理: [0022] The working principle of the invention:

[0023]在电源稳定工作时,常闭继电器Kl的触点处于闭合状态,防回流二极管DO导通,常开继电器K2的触点处于断开状态,DC/DC转换器I为储能电容C充电。 [0023] When the power supply stability, the normally closed contacts of relay Kl is closed, the backflow preventing diode DO is turned on, the normally open relay contact K2 in an OFF state, DC / DC converter to the energy storage capacitor C I charge. 在本实施例中,第一采样电路2对电源输入电压进行米样,送至第一比较器Vl的同相输入端,与输入其反相输入端的基准电压进行比较;第二采样电路3对电源输入电压进行采样,送至第二比较器V2的反相输入端,与输入其同相输入端的基准电压进行比较。 In the present embodiment, the first sampling circuit 2 samples the power supply input voltage meters, to the inverting input terminal of the first comparator Vl, compared with the input to its inverting input a reference voltage; a second power supply circuit 3 sampling sampling the input voltage, to the inverting input terminal of the second comparator V2, which is compared with the input inverting input terminal of the reference voltage.

[0024]当电源输入电压出现高压浪涌时,第一比较器Vl的同相输入端电压高于反相输入端电压,第一比较器Vl输出高电平,第一二极管Dl导通,驱动匪OS管Q导通(此时,第二比较器V2的同相输入端电压低于反相输入端电压,第二比较器V2输出低电平,第二二极管D2截止),常闭继电器Kl的触点断开以抑制高压浪涌,常开继电器K2的触点闭合,储能电容C为后级电路供电以防止其掉电,防回流二极管Dz截止以防止输出电压倒灌到DC/DC转换器的输入端,保护电路的稳定工作。 [0024] When a high voltage power supply input voltage surge occurs, the first comparator inverting input terminal of the Vl voltage is higher than the inverting input voltage, the first comparator outputs a high level Vl, the first diode Dl is turned on, bandit OS driver transistor Q is turned on (in this case, the noninverting input voltage of the second comparator V2 is lower than the inverting input voltage, the second comparator V2 outputs a low level, a second diode D2 is turned off), NC relay Kl contact separation to suppress high voltage surges, the normally open relay contact K2 is closed, the storage capacitor C is a post-stage circuit powered down to prevent backflow prevention diode Dz is turned off to prevent back flow to the output voltage of DC / input DC converter, a stable operation of the circuit protection.

[0025]当电源输入电压出现低压浪涌时,第二比较器V2的同相输入端电压高于反相输入端电压,第二比较器V2输出高电平,第二二极管D2导通,驱动匪OS管Q导通(此时,第一比较器Vl的同相输入端电压低于反相输入端电压,第一比较器Vl输出低电平,第一二极管Dl截止),常闭继电器Kl的触点断开以抑制低压浪涌,常开继电器K2的触点闭合,储能电容C为后级电路供电以防止其掉电,防回流二极管Dz截止以防止输出电压倒灌到DC/DC转换器的输入端,保护电路的稳定工作。 [0025] When the low voltage power supply input voltage surge occurs, the noninverting input voltage of the second comparator V2 is higher than the inverting input voltage, the second comparator V2 outputs a high level, the second diode D2 is conducting, bandit OS driver transistor Q is turned on (in this case, the noninverting input of the first comparator voltage Vl is lower than the inverting input voltage, the first comparator outputs a low level Vl, the first diode Dl is turned off), NC relay Kl contact separation to suppress low pressure surge, the normally open relay contact K2 is closed, the storage capacitor C is a post-stage circuit powered down to prevent backflow prevention diode Dz is turned off to prevent back flow to the output voltage of DC / input DC converter, a stable operation of the circuit protection.

[0026]以上所述实施方式仅仅是对本发明的优选实施方式进行描述,并非对本发明的范围进行限定,在不脱离本发明设计精神的前提下,本领域普通技术人员对本发明的技术方案作出的各种变形和改进,均应落入本发明的权利要求书确定的保护范围内。 [0026] The above embodiments are merely preferred embodiments of the present invention will be described, not the scope of the present invention are defined, those of ordinary skill in the art to make technical solution of the present invention without departing from the spirit of the design according to the present invention various variations and modifications can be made within the scope of protection of the present invention is defined to fall within the claims.

Claims (3)

1.一种储能电容式高、低压浪涌抑制电路,包括防回流二极管、DC/DC转换器、储能电容和MOS管;所述防回流二极管的阳极和DC/DC转换器的输入端均通过常闭继电器连接到电源输入电压,所述防回流二极管的阴极直接与电源输出端连接,所述DC/DC转换器的输出端通过常开继电器与电源输出端连接;所述储能电容的一端连接到DC/DC转换器与常开继电器之间的节点,另一端接地;所述MOS管的漏极连接到电源输入电压,其源极通过第一限流电阻接地,MOS管与第一限流电阻之间的节点分别连接到常闭继电器和常开继电器的控制端, 其特征在于:该电路还包括由第一采样电阻和第二采样电阻构成的第一采样电路、由第三采样电阻和第四采样电阻构成的第二采样电路、由稳压二极管和第二限流电阻构成的基准电压电路以及由第一比较器、第一开关元件、第二比较器和第二 A high storage capacitance, low voltage surge suppression circuit comprises a backflow preventing diode, DC / DC converters, a storage capacitor and a MOS transistor; the anti-reflux diode and the anode of DC / DC converter input terminal are connected to a power supply voltage input through normally closed relay, the backflow preventing diode cathode connected directly to the power supply output, the DC / DC converter by the output terminal of the normally open relay power supply output; said storage capacitor one end connected to the DC / DC converter and the normally open relay node between the other end is grounded; the drain of the MOS transistor is connected to the power supply input voltage, its source is grounded through a first current limiting resistor, the first MOS transistor limiting a node between the resistor are connected to the normally closed relay normally open relay and a control terminal, characterized in that: the circuit further comprising a first sampling circuit comprising a first resistor and a second sampling sampling resistor, the third second sampling circuit samples the sampling resistor and a fourth resistor configuration, the reference voltage circuit composed of a second Zener diode and the limiting resistor and a first comparator, a first switching element, a second comparator and a second 关元件构成的控制电路; 所述第一采样电阻与第二采样电阻串联连接,所述第一采样电阻的一端连接到电源输入电压,另一端通过第二采样电阻接地,所述第三采样电阻与第四采样电阻串联连接,所述第三采样电阻的一端连接到电源输入电压,另一端通过第四采样电阻接地;所述稳压二极管的阳极接地,其阴极通过第二限流电阻连接到电源输入电压; 所述第一比较器的反相输入端和第二比较器的同相输入端均连接到稳压二极管与第二限流电阻之间的节点,所述第一比较器的同相输入端连接到第一采样电阻与第二采样电阻之间的节点,所述第二比较器的反相输入端连接到第三采样电阻与第四采样电阻之间的节点,所述第一比较器的输出端通过第一开关元件与MOS管的栅极连接,所述第二比较器的输出端通过第二开关元件与MOS管的栅极连接。 A control circuit including a switching element; first sampling resistor connected to said sampling resistor in series with the second end of the first sampling resistor connected to the supply voltage input, the other end of the resistor is grounded through the second sampling and the third sampling resistor fourth sampling resistor connected in series, one end of said third sampling resistor connected to the supply voltage input, and the other end is grounded through a fourth sampling resistor; the zener diode anode is grounded, and a cathode connected through a second limiting resistor power supply input voltage; phase input to the inverting input of the first comparator and the second comparator are connected to the same end node between the Zener diode and the second current limiting resistor, the first comparator inverting input terminal is connected to a node between the first resistor and the second sampling sampling resistor, the inverting input terminal of the second comparator is connected to a node between the third resistor and the fourth sampling sampling resistor, the first comparator an output terminal connected to the gate of the first MOS transistor and the switching element, an output terminal of the second comparator is connected to the gate via a second switching element and a MOS transistor.
2.根据权利要求1所述的储能电容式高、低压浪涌抑制电路,其特征在于:所述第一开关元件选用第一二极管,所述第一二极管的阳极与第一比较器的输出端连接,其阴极与MOS管的栅极连接;所述第二开关元件选用第二二极管,所述第二二极管的阳极与第二比较器的输出端连接,其阴极与MOS管的栅极连接。 The storage capacitor according to the formula 1 as claimed in claim high, low voltage surge suppression circuit, wherein: said first selection switching element a first diode, an anode of the first diode and the first output of the comparator is connected to the gate of the MOS transistor and a cathode; a second selection of the second switching element is a diode, an anode terminal connected to the output of the second comparator of the second diode, which gate MOS transistor and a cathode connected.
3.根据权利要求1所述的一种储能电容式高、低压浪涌抑制电路的抑制方法,其特征在于,包括以下步骤: (1)第一采样电路对电源输入电压进行采样,送至第一比较器的同相输入端,第二采样电路对电源输入电压进行采样,送至第二比较器的反相输入端,基准电压电路输出基准电压,分别送至第一比较器的反相输入端和第二比较器的同相输入端; (2)当电源输入电压稳定时,第一比较器和第二比较器均输出低电平,第一开关元件和第二开关元件均截止,MOS管截止,常闭继电器的触点闭合,防回流二极管导通,常开继电器的触点断开,DC/DC转换器为储能电容充电; (3)当电源输入电压出现高压浪涌时,第一比较器输出高电平,第一开关元件导通,驱动MOS管导通,控制常闭继电器的触点断开、常开继电器的触点闭合,储能电容为后级电路供电,防回流二极管 According to claim 1. A high energy storage capacitor of formula as claimed in claim inhibiting low pressure surge suppression circuit, characterized by comprising the steps of: (1) a first sampling circuit for sampling an input voltage of the power supply, to the a first comparator inverting input terminal, a second sampling circuit for sampling an input voltage of the power supply, the second comparator to the inverting input terminal, a reference voltage circuit outputs a reference voltage, respectively to the inverting input of the first comparator end and a second comparator inverting input terminal; (2) when the power supply input voltage is stable, the first comparator and the second comparator output low level, the first switching element and second switching elements are both turned off, the MOS tube off, normally closed relay contacts are closed, the backflow preventing diode is turned on, the normally open relay contact opens, DC / DC converter to charge the energy storage capacitor; (3) when the power supply input voltage high voltage surges occur, the a comparator outputs a high level, the first switching element is turned on, the driving MOS transistor is turned on, a control normally-closed relay contact opens, the normally open contact closure relays storage capacitor power supply circuit of the subsequent stage, the backflow prevention diode 止; (4)当电源输入电压出现低压浪涌时,第二比较器输出高电平,第二开关元件导通,驱动MOS管导通,控制常闭继电器的触点断开、常开继电器的触点闭合,储能电容为后级电路供电,防回流二极管截止。 Stopper; (4) when the low-voltage power supply input voltage surge occurs, the second comparator outputs a high level, the second switching element is turned on, the driving MOS transistor is turned on, a control normally-closed relay contact opens, the normally open relay contact closure, after the energy storage capacitor power stage circuit, the backflow preventing diode is turned off.
CN201410300193.2A 2014-06-30 2014-06-30 An energy storage capacitance high and low voltage surge suppression circuit and method for suppressing CN104022634B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410300193.2A CN104022634B (en) 2014-06-30 2014-06-30 An energy storage capacitance high and low voltage surge suppression circuit and method for suppressing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410300193.2A CN104022634B (en) 2014-06-30 2014-06-30 An energy storage capacitance high and low voltage surge suppression circuit and method for suppressing

Publications (2)

Publication Number Publication Date
CN104022634A CN104022634A (en) 2014-09-03
CN104022634B true CN104022634B (en) 2016-06-29

Family

ID=51439250

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410300193.2A CN104022634B (en) 2014-06-30 2014-06-30 An energy storage capacitance high and low voltage surge suppression circuit and method for suppressing

Country Status (1)

Country Link
CN (1) CN104022634B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104362842A (en) * 2014-10-20 2015-02-18 矽力杰半导体技术(杭州)有限公司 Switching power supply and surge protection circuit and method adaptive to same
CN106160158B (en) * 2015-03-31 2018-09-18 丁智博 A kind of power supply device of electric automobile and a kind of motor vehicle
SG11201700428UA (en) * 2016-02-05 2017-09-28 Guangdong Oppo Mobile Telecommunications Corp Ltd Charge method, adapter and mobile terminal
JP6589046B2 (en) * 2016-02-05 2019-10-09 グァンドン オッポ モバイル テレコミュニケーションズ コーポレーション リミテッドGuangdong Oppo Mobile Telecommunications Corp., Ltd. Adapter and charge control method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102354965A (en) * 2011-10-14 2012-02-15 江苏普明商贸有限公司 Novel surge control circuit
CN103166194A (en) * 2011-12-17 2013-06-19 西安恒飞电子科技有限公司 Input overvoltage and under-voltage protection circuit of communication power supply module
CN203933373U (en) * 2014-06-30 2014-11-05 中国电子科技集团公司第四十三研究所 Energy storage capacitor type high-and-low-voltage surge suppression circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58179128A (en) * 1982-04-13 1983-10-20 Mitsubishi Electric Corp Rush-current suppressing circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102354965A (en) * 2011-10-14 2012-02-15 江苏普明商贸有限公司 Novel surge control circuit
CN103166194A (en) * 2011-12-17 2013-06-19 西安恒飞电子科技有限公司 Input overvoltage and under-voltage protection circuit of communication power supply module
CN203933373U (en) * 2014-06-30 2014-11-05 中国电子科技集团公司第四十三研究所 Energy storage capacitor type high-and-low-voltage surge suppression circuit

Also Published As

Publication number Publication date
CN104022634A (en) 2014-09-03

Similar Documents

Publication Publication Date Title
WO2010014232A3 (en) Step-up dc/dc voltage converter with improved transient current capability
US7411768B2 (en) Low-loss rectifier with shoot-through current protection
CN101872971A (en) Reverse-connection preventing circuit, reverse-connection preventing processing method and communication equipment
CN201181903Y (en) Input circuit of DC power supply
DE112013006828T5 (en) Protection of a current transformer circuit with switched capacitors
US20110109374A1 (en) Dying gasp charge controller
CN103236787A (en) Capacity discharge method and circuit
CN101944715B (en) Load short-circuit protection circuit
US8427802B2 (en) Input overvoltage protection circuit with soft-start function
EP2267875A2 (en) Net filter and use of same
CN102082430A (en) Surge suppression circuit
JP2012208868A (en) Voltage regulator
CN101860188B (en) Switch power supply circuit
WO2014171190A1 (en) Level shift circuit
WO2009097557A3 (en) Protection of exposed contacts connected to a bridge rectifier against electrostatic discharge
EP2416476B1 (en) Low Loss Discharge Circuits for EMI Filter Capacitors
CN103022996A (en) Electronic static discharge protection circuit and electronic static discharge protection method
CN102231518B (en) Surging suppression circuit
WO2009023695A3 (en) Power-over-ethernet isolation loss detector
CN101795129A (en) Power-on reset circuit
US7369382B2 (en) Integrated circuit with an undervoltage detector
US20150130428A1 (en) Level shift circuit and dc-dc converter for using the same
US9722411B2 (en) Secondary power system and power supply device
CN103501031B (en) A superabrasive capacitor charging control circuit
CN204156500U (en) Over-current and overvoltage protection circuit

Legal Events

Date Code Title Description
C06 Publication
C10 Entry into substantive examination
C14 Grant of patent or utility model