CN103995369A - Array substrate, display panel and test method thereof - Google Patents

Array substrate, display panel and test method thereof Download PDF

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Publication number
CN103995369A
CN103995369A CN201410158241.9A CN201410158241A CN103995369A CN 103995369 A CN103995369 A CN 103995369A CN 201410158241 A CN201410158241 A CN 201410158241A CN 103995369 A CN103995369 A CN 103995369A
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CN
China
Prior art keywords
signal
data
display panel
wire
voltage
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CN201410158241.9A
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Chinese (zh)
Inventor
张智
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京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to CN201410158241.9A priority Critical patent/CN103995369A/en
Publication of CN103995369A publication Critical patent/CN103995369A/en

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Abstract

An embodiment of the invention discloses an array substrate, a display panel and a test method thereof and relates to the field of the display technique. By means of the array substrate, the display panel and the test method of the display panel, the test on a voltage-transmittance curve of the display panel of a GOA can be achieved. The array substrate comprises a display region and a GOA circuit region, wherein the display region comprises a plurality of grid lines, a plurality of data lines and data line leads electrically connected with the data lines, and the grid lines and the data lines are crossed transversely and longitudinally. The GOA circuit region comprises a plurality of GOA units, a signal line electrically connected with the GOA units and a signal test point electrically connected with the input end of a signal line. The array substrate, the display panel and the test method of the display panel are applied to manufacturing of display devices.

Description

Array base palte, display panel and method of testing thereof

Technical field

The present invention relates to display technique field, relate in particular to a kind of array base palte, display panel and method of testing thereof.

Background technology

Voltage-the transmittance curve (V-T curve) of display panels refers to that display module is at the voltage-transmittance curve without driving circuit stage display panel self, and it is the significant data support of product development stage.

For traditional display panels, the test of its voltage-transmittance curve is by the input end coated with conductive glue at grid line and data line, signal generator is drawn wire at the input end of grid line and data line and is connected with conducting resinl, thereby at the input end input high-voltage signal of grid line, make thin film transistor (TFT) in opening, in the input end input data voltage signal of data line; In the process that optical test equipment changes in data voltage signal, record corresponding brightness, thereby obtain voltage-transmittance curve.

But drive (Gate Driver On Array for integrated grid, be called for short GOA) display panel, the input end of its grid line is made up of GOA unit, cannot realize at the input end coated with conductive glue of grid line the input of signal, therefore the test of the voltage-transmittance curve of GOA display panel is difficult to realize.

Summary of the invention

Embodiments of the invention provide a kind of array base palte, display panel and method of testing thereof, can realize the test of the voltage-transmittance curve of GOA display panel.

For achieving the above object, embodiments of the invention adopt following technical scheme:

On the one hand, provide a kind of array base palte, comprise viewing area and GOA circuit region; Described viewing area comprises many grid lines and many data lines and the data cable lead wire that is electrically connected with described many data lines that transverse and longitudinal is intersected; Described GOA circuit region comprises multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point being electrically connected with the input end of described signal wire.

Optionally, described multiple GOA unit is corresponding one by one with described many grid lines.

Optionally, described signal wire comprises clock (Clock is called for short CLK) signal wire and frame unlatching (Start Vertical is called for short STV) signal wire.

Further alternative, described STV signal wire is 1 or 2.

On the other hand, provide a kind of display panel, comprise above-mentioned array base palte.

Again on the one hand, provide a kind of method of testing of display panel, the display panel that described display panel is above-mentioned; Described method comprises: by inputting signal voltage at the reserved signal testing point of GOA circuit region to grid line; Wherein, described GOA circuit region comprise multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point being electrically connected with the input end of described signal wire; Data cable lead wire by viewing area is to data line input data signal voltage; The brightness of the respective regions to display panel is tested; Voltage data and optical data are processed, obtained voltage-transmittance curve.

Optionally, described by specifically comprising to grid line input signal voltage at the reserved signal testing point of GOA circuit region: signal generator contacts with signal testing point reserved in described GOA circuit region by probe, and inputs signal voltage by described probe to described grid line; Or, at the position coated with conductive glue of the reserved signal testing point of described GOA circuit region, make electrical connection mutually between unlike signal test point; Signal generator is connected with described conducting resinl by wire, and inputs signal voltage by described wire to described grid line.

Optionally, the described data cable lead wire by viewing area comprises to data line input data signal voltage: the data line of described viewing area and corresponding data cable lead wire are divided into at least one group, for data cable lead wire coated with conductive glue described in every group, make every group described in electrical connection mutually between data cable lead wire; Signal generator is connected with conducting resinl described in arbitrary group by wire, and passes through described wire to corresponding described data line input data signal voltage.

Optionally, the brightness of the described respective regions to display panel is tested and is comprised: the specific region of the described display panel driving for described grid line and described data line, the brightness of the respective regions by optical test equipment to described display panel is tested, and records corresponding optical data.

Optionally, described voltage data and optical data are processed, obtaining voltage-transmittance curve comprises: by host computer, the optical data of the respective regions that is carried in voltage data on described data line and described display panel is processed, obtained the voltage-transmittance curve of display panel.

Embodiments of the invention provide a kind of array base palte, display panel and method of testing thereof; Described array base palte comprises viewing area and GOA circuit region; Described viewing area comprises many grid lines and many data lines and the data cable lead wire that is electrically connected with described many data lines that transverse and longitudinal is intersected; Described GOA circuit region comprises multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point being electrically connected with the input end of described signal wire.

In the time that above-mentioned GOA display panel need to carry out the test of V-T curve, because described GOA circuit has replaced the grid driving circuit in traditional display panels, therefore on described array base palte, do not have the grid line lead-in wire for connecting grid line and grid driving circuit, so just can cause cannot be at the input end coated with conductive glue of described grid line.Based on this, by the GOA circuit region preserved signal test point at described array base palte, just can make described grid line by realizing communication connection between the signal generator in probe or wire and testing apparatus; And by above described data cable lead wire coated with conductive glue, just can make described data line connect by wire with testing apparatus in signal generator between realization communicate to connect.So just, can realize the test of the V-T curve of described GOA display panel.

Brief description of the drawings

In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.

The structural representation of a kind of array base palte that Fig. 1 provides for the embodiment of the present invention;

The structural representation of the signal wire in a kind of GOA circuit that Fig. 2 provides for the embodiment of the present invention;

A kind of GOA electrical block diagram that Fig. 3 provides for the embodiment of the present invention;

The test flow chart of the V-T curve of a kind of GOA display panel that Fig. 4 provides for the embodiment of the present invention;

The working timing figure of a kind of GOA circuit that Fig. 5 provides for the embodiment of the present invention.

Reference numeral:

10-viewing area; 20-GOA circuit region; First group of data cable lead wire of 101-; Second group of data cable lead wire of 102-; The 3rd group of data cable lead wire of 103-; The 4th group of data cable lead wire of 104-; 200-signal testing point; 201-the one GOA unit; 202-the 2nd GOA unit; 203-the 3rd GOA unit; 204-the 4th GOA unit.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.

Embodiments of the invention provide a kind of array base palte, as shown in Figure 1, comprise viewing area 10 and GOA circuit region 20; Described viewing area 10 comprises many grid lines and many data lines and the data cable lead wire (not shown) that is electrically connected with described many data lines that transverse and longitudinal is intersected; Described GOA circuit region 20 comprises multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point 200 being electrically connected with the input end of described signal wire.

It should be noted that, the first, in the time that described array base palte is applied to display panels, described GOA circuit region 20 can be used as the grid driving circuit for driving described grid line; In the case, described data cable lead wire, as the input end of described data line, can be connected with source driving circuit.

The second, each described GOA unit can be corresponding with grid line described in a line (that is, controlling a line grid line), can certainly corresponding with grid line described in multirow (, controlling multirow grid line).Concrete corresponding relation between described GOA unit and described grid line is in this no limit, and it can be determined according to actual GOA circuit design.

The 3rd, between described signal testing point 200 and described signal wire, be electrically connected, its concrete connected mode can be the position that described signal wire is extended to described signal testing point 200, can be also will between described signal wire and described signal testing point 200, to be electrically connected by wire.On this basis, can also instrument connection be set in the position of described signal testing point 200, so that carry out the test of external circuits.

Embodiments of the invention provide a kind of array base palte, comprise viewing area 10 and GOA circuit region 20; Described viewing area 10 comprises many grid lines and many data lines and the data cable lead wire that is electrically connected with described many data lines that transverse and longitudinal is intersected; Described GOA circuit region 20 comprises multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point 200 being electrically connected with the input end of described signal wire.

In the time that above-mentioned GOA display panel need to carry out the test of V-T curve, because described GOA circuit has replaced the grid driving circuit in traditional display panels, therefore on described array base palte, do not have the grid line lead-in wire for connecting grid line and grid driving circuit, so just can cause cannot be at the input end coated with conductive glue of described grid line.Based on this, by the GOA circuit region 20 preserved signal test points 200 at described array base palte, just can make described grid line by realizing communication connection between the signal generator in probe or wire and testing apparatus; And by above described data cable lead wire coated with conductive glue, just can make described data line connect by wire with testing apparatus in signal generator between realization communicate to connect.So just, can realize the test of the V-T curve of described GOA display panel.

Based on foregoing description, optional, described multiple GOA unit can be corresponding one by one with described many grid lines.Like this, each described GOA unit just can be controlled a line grid line accordingly.

On this basis, as shown in Figure 2, described signal wire can comprise CLK signal wire and STV signal wire.Wherein, described STV signal wire is 1 or 2.

Here it should be noted that, described STV signal wire can be used to described GOA unit that start signal is provided, and then controls the open and close of described grid line.

In the time that described STV signal wire is 1, described multiple GOA unit provides start signal by this described STV signal wire.

In the time that described STV signal wire is 2, described multiple GOA unit can be divided into two groups, and described in every group, GOA unit provides start signal by the described STV signal wire of correspondence.

Example, as shown in Figure 3, described GOA circuit comprises a GOA unit 201, the 2nd GOA unit 202, the 3rd GOA unit 203 and the 4th GOA unit 204, and a described GOA unit 201 and described the 3rd GOA unit 203 are controlled by described STV_O, described the 2nd GOA unit 202 and described the 4th GOA unit 204 are controlled by described STV_E.Wherein, described STV_O provides start signal for a described GOA unit 201, and the output signal of a described GOA unit 201 can be used as the start signal of described the 3rd GOA unit 203; Described STV_E provides start signal for described the 2nd GOA unit 202, and the output signal of described the 2nd GOA unit 202 can be used as the start signal of described the 4th GOA unit 204.

Embodiments of the invention provide a kind of display panel, comprise above-mentioned array base palte.

For display panels, it can comprise array base palte, color membrane substrates and the liquid crystal layer between the two; Wherein, described array base palte comprises pixel electrode, and described array base palte or described color membrane substrates comprise public electrode.On this basis, by on-load voltage between described pixel electrode and described public electrode, just can drive the liquid crystal molecule in described liquid crystal layer to carry out the deflection of respective angles.In the time of the described liquid crystal layer of polarized light process, along with the difference of liquid crystal deflecting element angle, the transmitance of light is also different.

In the time that the V-T curve to described display panel is tested, be actually voltage between test described pixel electrode and described public electrode and the relation between the transmitance of described display panel.Here it should be noted that, because described pixel electrode is electrically connected with the drain electrode of thin film transistor (TFT), therefore the voltage of described pixel electrode can be controlled by the voltage data signal being carried on described data line; And the voltage of described public electrode can directly be controlled by public electrode wire, in the embodiment of the present invention, repeat no more.

On this basis, in the time that described array base palte is above-mentioned GOA array base palte, by at the reserved described signal testing point 200 of described GOA circuit region 20, just can realize the communication connection between described grid line and the signal generator of testing apparatus by probe or wire; By the position coated with conductive glue at described data cable lead wire, just can realize the communication connection between described data line and the signal generator of testing apparatus by wire; Based on this, when described signal generator is during respectively to described grid line and described data line on-load voltage signal, can test by optical test equipment the brightness of described display panel, thereby realize the test of the V-T curve of described GOA display panel.

Embodiments of the invention also provide a kind of method of testing of display panel, test for the GOA display panel to having said structure.As shown in Figure 4, described method can comprise:

S101, by inputting signal voltage at the reserved signal testing point 200 of GOA circuit region 20 to grid line.

Wherein, described GOA circuit region 20 can comprise multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point 200 being electrically connected with the input end of described signal wire.

Here, described signal wire can comprise CLK signal wire and STV signal wire.By extending the position of described signal wire to described signal testing point 200, or by wire, described signal wire is connected with described signal testing point 200, all can realizes the electrical connection between described signal wire and described signal testing point 200.

On this basis, this step specifically can comprise following two kinds of implementations:

Mode one, signal generator can contact with described signal testing point 200 by probe, and input signal voltage by described probe to described grid line.

Mode two, at the position of described signal testing point 200 coated with conductive glue, make between unlike signal test point electrical connection mutually; Signal generator is connected with described conducting resinl by wire, and inputs signal voltage by described wire to described grid line.

S102, data cable lead wire by viewing area 10 are to data line input data signal voltage.

Here, described display panel can be defined as at least one viewing area, specifically can be by the data line of described viewing area 10 and corresponding data cable lead wire be divided into at least one group, for data cable lead wire coated with conductive glue described in every group, make every group described in electrical connection mutually between data cable lead wire; Signal generator can be connected with conducting resinl described in arbitrary group by wire, and passes through described wire to corresponding described data line input data signal voltage.

Known based on foregoing description, in the time of the test of V-T curve of carrying out described display panel, in fact can carry out subregion test.Example, described display panel is divided into four viewing areas arranged side by side from left to right, each described viewing area includes corresponding data line and data cable lead wire; On this basis, in the time that described in the control of described GOA circuit, grid line is opened successively, while only having the described data line input data signal voltage to a certain viewing area, just may make the respective regions of described display panel show, and the now namely brightness of this viewing area of brightness of the described display panel of test.

The brightness of S103, respective regions to display panel is tested.

When described grid line receives signal voltage and thin film transistor (TFT) is opened, when described data line receives voltage data signal and controls liquid crystal molecule in liquid crystal layer and carry out deflection, for a certain specific viewing area of described grid line and the driving of described data line, optical test equipment just can carry out for this viewing area the test of brightness, and records corresponding optical data.

S104, voltage data and optical data are processed, obtained voltage-transmittance curve.

Here it should be noted that, described voltage data is corresponding to above-mentioned voltage data signal, but is not this voltage data signal; Described voltage data signal finally can be converted to through thin film transistor (TFT) the voltage being carried on pixel electrode, and voltage between pixel electrode and public electrode is only real required voltage data.Described optical data refers to the brightness of the respective regions of described display panel.

On this basis, can process described voltage data and described optical data by host computer, thereby obtain the V-T curve of display panel.

Wherein, described host computer can be computing machine.

By above-mentioned steps S101-S104, can obtain the V-T curve of described GOA display panel.

Comprise that taking described GOA circuit structure 4 CLK signal wires and 2 STV signal wires are as example below, the method for testing of the V-T curve to described GOA display panel is specifically described.

The method of testing of the V-T curve of described display panel specifically can comprise the steps:

S201, with reference to shown in figure 1, described display panel is defined as to four viewing areas arranged side by side from left to right, each described viewing area is corresponding one group of data line and corresponding data cable lead wire all, and organizes described data cable lead wire coated with conductive glue for each.

Wherein, by applying described conducting resinl, can make electrical connection mutually between first group of data cable lead wire 101 corresponding to the first viewing area, electrical connection mutually between second group of data cable lead wire 102 corresponding to the second viewing area, electrical connection mutually between the 3rd group of data cable lead wire 103 corresponding to the 3rd viewing area, electrical connection mutually between the 4th group of data cable lead wire 104 corresponding to the 4th viewing area.

S202, by wire, described first group of data cable lead wire 101 is connected with described signal generator.

S203, with reference to shown in figure 2, by probe described signal testing point 200(is comprised to STV_E, STV_O, CLK1, CLK2, CLK3, CLK4) be connected with described signal generator.

S204, as shown in Figure 5, described signal generator is inputted illustrated work schedule signal by probe to described GOA circuit.

S205, described signal generator are inputted different voltage data signals by wire to the data line connected from described first group of data cable lead wire 101.

The brightness of S206, optical test equipment test first viewing area of described display panel under different voltage data signals.

Described voltage data signal is converted to the voltage data between corresponding pixel electrode and public electrode by S207, host computer, and described voltage data and described optical data (brightness of the first viewing area) are processed, thereby obtain the V-T curve of described display panel.

The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, any be familiar with those skilled in the art the present invention disclose technical scope in; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.

Claims (10)

1. an array base palte, is characterized in that, comprises viewing area and GOA circuit region;
Described viewing area comprises many grid lines and many data lines and the data cable lead wire that is electrically connected with described many data lines that transverse and longitudinal is intersected;
Described GOA circuit region comprises multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point being electrically connected with the input end of described signal wire.
2. array base palte according to claim 1, is characterized in that, described multiple GOA unit is corresponding one by one with described many grid lines.
3. array base palte according to claim 1, is characterized in that, described signal wire comprises clock cable and frame start signal line.
4. array base palte according to claim 3, is characterized in that, described frame start signal line is 1 or 2.
5. a display panel, is characterized in that, comprises the array base palte described in claim 1 to 4 any one.
6. a method of testing for display panel, is characterized in that, described display panel is display panel claimed in claim 5; Described method comprises:
By inputting signal voltage at the reserved signal testing point of GOA circuit region to grid line; Wherein, described GOA circuit region comprise multiple GOA unit, the signal wire being electrically connected with described multiple GOA unit and the signal testing point being electrically connected with the input end of described signal wire;
Data cable lead wire by viewing area is to data line input data signal voltage;
The brightness of the respective regions to display panel is tested;
Voltage data and optical data are processed, obtained voltage-transmittance curve.
7. method according to claim 6, is characterized in that, described by specifically comprising to grid line input signal voltage at the reserved signal testing point of GOA circuit region:
Signal generator contacts with signal testing point reserved in described GOA circuit region by probe, and inputs signal voltage by described probe to described grid line;
Or, at the position coated with conductive glue of the reserved signal testing point of described GOA circuit region, make electrical connection mutually between unlike signal test point; Signal generator is connected with described conducting resinl by wire, and inputs signal voltage by described wire to described grid line.
8. method according to claim 6, is characterized in that, the described data cable lead wire by viewing area comprises to data line input data signal voltage:
The data line of described viewing area and corresponding data cable lead wire are divided into at least one group, for data cable lead wire coated with conductive glue described in every group, make every group described in electrical connection mutually between data cable lead wire;
Signal generator is connected with conducting resinl described in arbitrary group by wire, and passes through described wire to corresponding described data line input data signal voltage.
9. method according to claim 6, is characterized in that, the brightness of the described respective regions to display panel is tested and comprised:
The specific region of the described display panel driving for described grid line and described data line, the brightness of the respective regions by optical test equipment to described display panel is tested, and records corresponding optical data.
10. method according to claim 6, is characterized in that, described voltage data and optical data is processed, and obtains voltage-transmittance curve and comprises:
By host computer, the optical data of the respective regions that is carried in voltage data on described data line and described display panel is processed, obtained the voltage-transmittance curve of display panel.
CN201410158241.9A 2014-04-18 2014-04-18 Array substrate, display panel and test method thereof CN103995369A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104680963A (en) * 2015-03-26 2015-06-03 京东方科技集团股份有限公司 Detection device and detection method of display panel GOA circuit
CN104777636A (en) * 2015-04-20 2015-07-15 合肥鑫晟光电科技有限公司 Test system and test method
CN106019672A (en) * 2016-07-26 2016-10-12 武汉华星光电技术有限公司 Making method for thin film transistor array substrate
CN107749269A (en) * 2017-11-15 2018-03-02 武汉华星光电半导体显示技术有限公司 Display panel and display device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040017531A1 (en) * 1998-03-27 2004-01-29 Sharp Kabushiki Kaisha Active-matrix-type liquid crystal display panel and method of inspecting the same
US20040263460A1 (en) * 2003-06-25 2004-12-30 Chi Mei Optoelectronics Corporation Active matrix display device
CN101221958A (en) * 2001-10-11 2008-07-16 三星电子株式会社 Thin film transistor array panel having a means for visual inspection and a method of performing visual inspection
CN101292168A (en) * 2005-11-15 2008-10-22 光子动力学公司 Array test using the shorting bar and high frequency clock signal for the inspection of tft-lcd with integrated driver ic
CN102455553A (en) * 2010-10-22 2012-05-16 京东方科技集团股份有限公司 TFT-LCD (thin film transistor-liquid crystal display), array substrate and manufacturing method thereof
CN102540595A (en) * 2010-12-31 2012-07-04 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof and liquid crystal panel
CN102629440A (en) * 2011-05-06 2012-08-08 京东方科技集团股份有限公司 Method and apparatus for testing display panel

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040017531A1 (en) * 1998-03-27 2004-01-29 Sharp Kabushiki Kaisha Active-matrix-type liquid crystal display panel and method of inspecting the same
CN101221958A (en) * 2001-10-11 2008-07-16 三星电子株式会社 Thin film transistor array panel having a means for visual inspection and a method of performing visual inspection
US20040263460A1 (en) * 2003-06-25 2004-12-30 Chi Mei Optoelectronics Corporation Active matrix display device
CN101292168A (en) * 2005-11-15 2008-10-22 光子动力学公司 Array test using the shorting bar and high frequency clock signal for the inspection of tft-lcd with integrated driver ic
CN102455553A (en) * 2010-10-22 2012-05-16 京东方科技集团股份有限公司 TFT-LCD (thin film transistor-liquid crystal display), array substrate and manufacturing method thereof
CN102540595A (en) * 2010-12-31 2012-07-04 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof and liquid crystal panel
CN102629440A (en) * 2011-05-06 2012-08-08 京东方科技集团股份有限公司 Method and apparatus for testing display panel

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104680963A (en) * 2015-03-26 2015-06-03 京东方科技集团股份有限公司 Detection device and detection method of display panel GOA circuit
US10311764B2 (en) 2015-03-26 2019-06-04 Boe Technoloy Group Co., Ltd. Detection device and detection method of a GOA circuit of a display panel
CN104777636A (en) * 2015-04-20 2015-07-15 合肥鑫晟光电科技有限公司 Test system and test method
CN104777636B (en) * 2015-04-20 2018-06-12 合肥鑫晟光电科技有限公司 Test system and test method
CN106019672A (en) * 2016-07-26 2016-10-12 武汉华星光电技术有限公司 Making method for thin film transistor array substrate
CN107749269A (en) * 2017-11-15 2018-03-02 武汉华星光电半导体显示技术有限公司 Display panel and display device
WO2019095431A1 (en) * 2017-11-15 2019-05-23 武汉华星光电半导体显示技术有限公司 Display panel and display device

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