CN103972075A - Etching method and array substrate - Google Patents

Etching method and array substrate Download PDF

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Publication number
CN103972075A
CN103972075A CN201410187181.3A CN201410187181A CN103972075A CN 103972075 A CN103972075 A CN 103972075A CN 201410187181 A CN201410187181 A CN 201410187181A CN 103972075 A CN103972075 A CN 103972075A
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China
Prior art keywords
etching
ito film
ito
layer
photoresist layer
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CN201410187181.3A
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Chinese (zh)
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卜倩倩
郭炜
任庆荣
王路
刘英伟
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京东方科技集团股份有限公司
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Priority to CN201410187181.3A priority Critical patent/CN103972075A/en
Publication of CN103972075A publication Critical patent/CN103972075A/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement

Abstract

The embodiment of the invention provides an etching method and an array substrate. According to the etching method and the array substrate, the problems that when ITO patterning etching is conducted according to existing array substrate manufacturing scheme, etching is not complete and etching speed is low are solved, the ITO patterning etching effect and practicality of a display panel are improved, the etching rate is increased, and etching cost is reduced. The etching method comprises the steps of forming an ITO film on the substrate; forming a photoresist layer on the ITO film; arranging a mask plate above the photoresist layer, wherein part of the photoresist layer is covered with the mask plate; removing photoresist, not covered with the mask plate, in the photoresist layer; etching off the part, not covered with the photoresist layer, of the ITO film with the wet etching technology; etching off the part, left after the part, not covered with the photoresist layer, of the ITO film is etched off with the wet etching method, of the ITO film with the dry etching technology. The etching method and the array substrate are used in manufacturing of display panels.

Description

一种刻蚀方法和阵列基板 The method of the array substrate and a method of etching

技术领域 FIELD

[0001] 本发明涉及显示面板制作技术领域,尤其涉及一种刻蚀方法和阵列基板。 [0001] The present invention relates to the technical field of a display panel, and more particularly to a method of etching an array substrate.

背景技术 Background technique

[0002]随着薄膜晶体管液晶显不屏(Thin Film Transistor Liquid Crystal Display,简称TFT-LCD)等显示器件的高速发展,对高光透过率、超低电阻的透明电极的需求量越来越大。 [0002] As the thin film transistor liquid crystal display screen not (Thin Film Transistor Liquid Crystal Display, referred to as TFT-LCD) display device of high-speed development, demand for the high light transmittance of the transparent electrode, low resistance increasing . 目前,平面显示中最常用的透明导电氧化物(Transparent Conducting Oxide,简称TC0)薄膜材料是氧化铟锡(indium tin oxid,简称ITO),这是一种N型半导体材料,在导电性和透明性方面有着极其优越的性能。 Currently, the most commonly used flat panel display of a transparent conductive oxide (Transparent Conducting Oxide, referred to TC0) film material is indium tin oxide (indium tin oxid, referred to as ITO), which is an N-type semiconductor material, the conductivity and transparency aspect has a very superior performance. 而这种材料应用于显示器件中,其图案化是非常重要的因素。 And this material is applied to a display device in which patterning is a very important factor.

[0003] 现有的技术方案中常用的一种ITO图案化的方法是湿法化学刻蚀方法。 [0003] The prior art schemes commonly used ITO patterning process is a wet chemical etching method. 但是,湿法化学刻蚀方法在刻蚀膜厚大于700A的ITO时,常常会出现刻蚀不干净,甚至于会出现图像短路的现象;如果采用延长刻蚀时间、提高刻蚀浓度等措施来解决湿法刻蚀中刻蚀不干净的问题,会影响腐蚀设备的使用寿命等;同时,延长刻蚀时间会出现刻蚀不均匀或刻蚀过度的问题,影响产品的性能。 However, when the wet chemical etching method of etching is greater than the thickness of the ITO 700A, there will often not clean etching, even a short circuit occurs the phenomenon image; extended if the etching time, and other measures to increase the concentration of etching wet etching etching solve the problem is not clean, it will affect the life of equipment, such as corrosion; at the same time, uneven etching or over-etching problem extended etching time will affect product performance. 另一种可行的方案是使用等离子体干法刻蚀。 Another possible solution is to dry etching using a plasma. 但是,等离子体干法刻蚀方法在实际的应用中需要的刻蚀成本较大,且刻蚀速率较慢,对于大面积的显示面板操作起来比较困难,实用性比较差。 However, plasma dry etching method in practical applications a greater cost required etched, and the etching rate is slow, the display panel is difficult to operate a large area, relatively poor practicability.

发明内容 SUMMARY

[0004] 本发明的实施例提供一种刻蚀方法和阵列基板,解决了现有的阵列基板制作方案中进行ITO图案化刻蚀时由于ITO膜厚过大而出现刻蚀不干净和刻蚀速度较慢的问题,增强了显示面板的ITO图案化的刻蚀效果和在实际应用中的实用性,提高了刻蚀速率,同时,降低了刻蚀成本。 [0004] Embodiments of the present invention to provide an etching method and an array substrate, since the thick ITO solve excessive etching occurs when etching is not clean and etch the ITO pattern of a conventional array substrate produced in scheme slower problems, enhancing was etched ITO patterned display panel and utility in practical applications, improved etch rate, while reducing the cost of the etching.

[0005] 为达到上述目的,本发明的实施例采用如下技术方案: [0005] To achieve the above object, embodiments of the present invention adopts the following technical solutions:

[0006] 一方面,提供一种刻蚀方法,所述方法包括: [0006] In one aspect, there is provided a method of etching, said method comprising:

[0007] 在基板上形成一层氧化铟锡ITO膜层; [0007] a layer of indium tin oxide ITO film on a substrate;

[0008] 在所述ITO膜层上形成一层光刻胶层; [0008] forming a photoresist layer on the ITO film;

[0009] 在所述光刻胶层上方设置掩膜板,所述掩膜板不完全覆盖所述光刻胶层; [0009] disposed over the photoresist mask layer, the mask does not completely cover the photoresist layer;

[0010] 祛除所述光刻胶层中未被所述掩膜板覆盖的光刻胶; [0010] eliminate the photoresist layer that are not covered by the photoresist of the mask plate;

[0011] 采用湿法刻蚀工艺刻蚀掉所述ITO膜层中未被所述光刻胶层覆盖的所述ITO膜层; [0011] The wet etching process to etch away the ITO film layer not covered by the photoresist layer covers the ITO film;

[0012] 采用干法刻蚀工艺刻蚀掉所述ITO膜层中未被所述光刻胶层覆盖的所述ITO膜层中通过所述湿法刻蚀工艺刻蚀后残留的ITO膜层。 [0012] The dry etching process to etch away the ITO film layer of the ITO film not covered by the photoresist layer is covered by a wet etching process after the etching of the ITO film layer remaining .

[0013] 可选的,所述方法还包括: [0013] Optionally, the method further comprising:

[0014] 祛除所述光刻胶层中通过所述湿法刻蚀工艺和所述干法刻蚀工艺刻蚀后剩余的光刻胶。 [0014] eliminate the photoresist layer by the wet etching process and the dry etching process for etching the remaining photoresist. [0015] 可选的,所述方法还包括: [0015] Optionally, the method further comprising:

[0016] 根据干法刻蚀所采用的刻蚀设备,设置采用干法刻蚀工艺刻蚀所述ITO膜层时的所述刻蚀设备中的刻蚀条件满足预设条件。 [0016] The etching apparatus used in dry etching, the etching conditions provided an etching apparatus during the process of etching the ITO film layer using the dry etching in the preset condition is satisfied.

[0017] 可选的,所述基板上的所述ITO膜层的厚度大于预设膜厚。 [0017] Optionally, the thickness of the ITO film layer on the substrate is greater than a predetermined film thickness.

[0018] 可选的,所述方法还包括: [0018] Optionally, the method further comprising:

[0019] 采用湿法刻蚀工艺刻蚀所述ITO膜层时,设置所述湿法刻蚀的刻蚀液的浓度小于或者等于预设浓度。 [0019] When the process of etching the ITO film using wet etching, etchant concentration provided the wet etching is less than or equal to a preset concentration.

[0020] 另一方面,提供一种阵列基板,所述阵列基板包括: [0020] In another aspect, an array substrate, the array substrate comprising:

[0021]基板; [0021] a substrate;

[0022] 覆盖所述基板的ITO像素电极层,所述ITO像素电极层是采用湿法刻蚀工艺和干法刻蚀工艺相结合的工艺制程制作形成的。 [0022] ITO pixel electrode layer covering the substrate, the ITO pixel electrode layer is a wet etching process and a dry etching process of combining the process of manufacturing process of formation.

[0023] 本发明的实施例提供的刻蚀方法和阵列基板,通过在制作显示面板的阵列基板时采用湿法刻蚀工艺和干法刻蚀工艺相结合的方案形成ITO像素电极层,解决了现有的阵列基板制作方案中进行ITO图案化刻蚀时由于ITO膜厚过大而出现刻蚀不干净和刻蚀速度较慢的问题,增强了显示面板的ITO图案化的刻蚀效果和在实际应用中的实用性,提高了刻蚀速率,同时,降低了刻蚀成本。 [0023] The array substrate etching method and embodiments of the present invention is provided by using a wet etching process and a dry etching process in the production of a display panel array substrate in combination forming an ITO pixel electrode layer embodiment solves Since too large thickness of ITO etching occurs not clean and etch slower problem when the conventional etching ITO patterning array substrate production program, the enhanced effect of etching the ITO pattern of the display panel and the Applicability in practical application, the etching rate increased, while reducing the cost of the etching.

附图说明 BRIEF DESCRIPTION

[0024] 为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。 [0024] In order to more clearly illustrate the technical solutions in the embodiments or the prior art embodiment of the present invention, briefly introduced hereinafter, embodiments are described below in the accompanying drawings or described in the prior art needed to be used in describing the embodiments the drawings are only some embodiments of the present invention, those of ordinary skill in the art is concerned, without creative efforts, can derive from these drawings other drawings.

[0025] 图1为本发明的实施例提供的一种刻蚀方法的流程示意图; [0025] FIG flow of a method of etching a method according to an embodiment of the present invention, a schematic diagram;

[0026] 图2为本发明的实施例提供的另一种刻蚀方法的流程示意图; Another method of etching process according to an embodiment of [0026] FIG. 2 is a schematic view of the present disclosure;

[0027] 图3为本发明的实施例提供的一种阵列基板中的ITO像素电极层制作过程中的结构一示意图; Structure of an array substrate provided in the ITO pixel electrode layer in the manufacturing process of Embodiment [0027] FIG. 3 is a schematic diagram of the present invention;

[0028] 图4为本发明的实施例提供的一种阵列基板中的ITO像素电极层制作过程中的结构二示意图; Structure of an array substrate provided in the ITO pixel electrode layer in the manufacturing process of Embodiment [0028] FIG. 4 is a schematic view of the invention of the two;

[0029] 图5为本发明的实施例提供的一种阵列基板中的ITO像素电极层制作过程中的结构三示意图; Structure of an array substrate provided in the ITO pixel electrode layer in the manufacturing process of Embodiment [0029] FIG. 5 is a schematic view of the invention of the three;

[0030] 图6为本发明的实施例提供的一种阵列基板中的ITO像素电极层制作过程中的结构四示意图; Structure of an array substrate provided in the ITO pixel electrode layer in the manufacturing process of Embodiment [0030] FIG. 6 is a schematic view of the invention of four;

[0031] 图7为本发明的实施例提供的一种阵列基板中的ITO像素电极层制作过程中的结构五示意图; Structure of an array substrate provided in the ITO pixel electrode layer in the manufacturing process of Embodiment [0031] Figure 7 is a schematic view of the invention of five;

[0032] 图8为本发明的实施例提供的一种阵列基板中的ITO像素电极层制作过程中的结构六示意图。 Structure of an array substrate provided in the ITO pixel electrode layer in the manufacturing process of Embodiment [0032] Figure 8 is a schematic view of sixth invention.

[0033] 附图标记:1_基板;2-1T0膜层;3_光刻胶层;4_掩膜板;21_残留的ΙΤ0。 [0033] The reference numerals: 1_ substrate; 2-1T0 layer; 3_ photoresist layer; 4_ mask plate; 21_ residual ΙΤ0.

具体实施方式[0034] 下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。 DETAILED DESCRIPTION [0034] below in conjunction with the present invention in the accompanying drawings, technical solutions of embodiments of the present invention are clearly and completely described, obviously, the described embodiments are merely part of embodiments of the present invention, rather than all embodiments. 基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。 Based on the embodiments of the present invention, all other embodiments of ordinary skill in the art without any creative effort shall fall within the scope of the present invention.

[0035] 本发明的实施例提供一种刻蚀方法,参照图1所示,该方法包括以下步骤: [0035] Embodiments of the present invention to provide an etching method, with reference to FIG. 1, the method comprising the steps of:

[0036] 101、在基板上形成一层氧化铟锡ITO膜层。 [0036] 101, a layer of indium tin oxide ITO layer on the substrate.

[0037] 102、在ITO膜层上形成一层光刻胶层。 [0037] 102, a photoresist layer is formed on the ITO film.

[0038] 其中,该光刻胶可以是通过均匀涂布的方式形成的。 [0038] wherein, the photoresist may be formed by uniformly coating a.

[0039] 103、在光刻胶层上方设置掩膜板。 [0039] 103, is provided above the mask the photoresist layer.

[0040] 其中,掩膜板不完全覆盖光刻胶层。 [0040] wherein the mask does not completely cover the photoresist layer.

[0041] 其中,掩膜板可以是在设备中自主携带的,不与光刻胶层产生接触。 [0041] wherein, in the mask plate may be carried in the autonomous device, no contact with the photoresist layer.

[0042] 104、祛除光刻胶层中未被掩膜板覆盖的光刻胶。 [0042] 104, eliminate the photoresist mask photoresist layer not covered.

[0043] 105、采用湿法刻蚀工艺刻蚀掉ITO膜层中未被光刻胶层覆盖的ITO膜层。 [0043] 105, a wet etching process to etch away the ITO film layer that are not covered by the photoresist layer ITO film.

[0044] 106、采用干法刻蚀工艺刻蚀掉ITO膜层中未被光刻胶层覆盖的ITO膜层中通过湿法刻蚀工艺刻蚀后残留的ITO膜层。 [0044] 106, using the dry etching process to etch away the ITO film layer that are not covered by the photoresist layer after the ITO layer by wet etching process for etching the ITO film layer remaining.

[0045] 本发明的实施例提供的刻蚀方法,通过在制作显示面板的阵列基板时采用湿法刻蚀工艺和干法刻蚀工艺相结合的方案形成ITO像素电极层,解决了现有的阵列基板制作方案中进行ITO图案化刻蚀时由于ITO膜厚过大而出现刻蚀不干净和刻蚀速度较慢的问题,增强了显示面板的ITO图案化的刻蚀效果和在实际应用中的实用性,提高了刻蚀速率,同时,降低了刻蚀成本。 [0045] Embodiments of the present invention, etching is provided by forming ITO pixel electrode layer is made of an array substrate of the panel when the wet etching process and a dry etching process of combining, solutions of the display in a conventional production Since too large thickness of ITO etching occurs not clean and etch problems slow when the array substrate having ITO patterned etching production program, the enhanced effect of the etching of the ITO pattern and the display panel in practical applications practicality, improved etch rate, while reducing the cost of the etching.

[0046] 本发明的实施例提供一种刻蚀方法,参照图2所示,该方法包括以下步骤: [0046] Embodiments of the present invention to provide an etching method, with reference to FIG. 2, the method comprising the steps of:

[0047] 201、在基板上形成一层氧化铟锡ITO膜层。 [0047] 201, a layer of indium tin oxide ITO layer on the substrate.

[0048] 具体的,在基板I上形成ITO膜层2的过程如图3所示,可以是在预先准备好的基板例如玻璃基板或石英基板上通过真空镀膜机以磁控溅射的方式形成覆盖该基板I的ITO膜层2。 Process [0048] Specifically, the ITO film layer formed on the substrate I 2 shown in Figure 3, may be prepared in advance, for example, a glass substrate or a quartz substrate formed in a plate by way of magnetron sputtering vacuum coater I ITO layer covering the substrate 2. 当然,此处只是举例说明形成ITO膜层的方式和基板的类型,并不限于只能用磁控溅射的方式形成ITO膜层和基板的类型,在实际的应用中可以根据具体的实施环境选择适合的基板和恰当的方式形成ITO膜层。 Types Of course, here is only an example embodiment and the ITO film layer of the substrate are not restricted to the type of substrate and the ITO film layer formed by vacuum sputtering, in the actual application environment according to the specific embodiment choose an appropriate substrate and the ITO film layer is formed. 其中,基板可以是显示器面板的基板,或者彩色滤波片的基板,或者玻璃基板或者柔性基板等,此处不作具体的限定。 Wherein, the substrate may be a substrate of the display panel or the color filter substrate, a glass substrate or a flexible substrate or the like, is not specifically limited here.

[0049] 基板上的ITO膜层的厚度大于预设膜厚,一般预设膜厚的厚度可以为700A。 [0049] The thickness of the ITO film on the substrate is greater than a predetermined film thickness, the film thickness generally have a thickness of a predetermined 700A. 当然此处只是举例说明预设膜厚的厚度,并不作具体限定ITO膜厚只能是700 A。 Of course, merely illustrative herein predetermined thickness of the film thickness, the film thickness of ITO is not particularly limited only 700 A. 在具体的应用中可以根据实际的需要和应用场景选择最优的ITO膜层厚度数值作为预设膜厚。 In a specific application can select the optimal value as the film thickness of ITO film thickness preset according to actual needs and application scenarios.

[0050] 202、在ITO膜层上形成一层光刻胶层。 [0050] 202, a photoresist layer is formed on the ITO film.

[0051] 其中,形成光刻胶层3的过程如图4所示,可以是通过涂布的方式在ITO膜层2上形成一层覆盖该ITO膜层2的感光性光刻胶,进而形成光刻胶层3。 [0051] wherein the process of forming a photoresist layer 3 as shown, may be formed of a layer of photosensitive resist layer covering the ITO 2 on the ITO film layer 24 by coating a manner, thereby forming The photoresist layer 3.

[0052] 在ITO膜层上均匀涂布感光性光刻胶,该感光性光刻胶为正性光刻胶,以旋转涂覆的方式均匀地形成于ITO膜层上。 [0052] uniformly on the ITO film layer coating the photosensitive resist, the photosensitive resist is a positive photoresist, so as to uniformly spin coated on the ITO film formed on. 感光性光刻胶的膜层厚度需兼顾对ITO的保护和刻蚀时间,一般为1.0-1.2 μ m。 The photosensitive resist film thickness required both for protection and ITO etching time, typically 1.0-1.2 μ m. 光刻胶的涂覆过程需要前烘和后烘,目的是将该感光性光刻胶中的溶剂蒸发,同时增加ITO膜层与该感光性光刻胶的粘合力。 The photoresist coating process requires the front and rear bake drying, the object is a photosensitive resist solvent was evaporated, and the ITO film layer while increasing adhesion of the photosensitive resist.

[0053] 203、在光刻胶层上方设置掩膜板。 [0053] 203, is provided above the mask the photoresist layer. [0054] 其中,掩膜板不完全覆盖光刻胶层。 [0054] wherein the mask does not completely cover the photoresist layer.

[0055] 204、祛除光刻胶层中未被掩膜板覆盖的光刻胶。 [0055] 204, eliminate the photoresist mask photoresist layer not covered.

[0056] 具体的,如图5所示为使用掩膜板4图案化光刻胶层3后的示意图,可以是使用掩膜板4通过曝光、显影和刻蚀等构图工艺图案化感光性光刻胶层3以形成图案化感光层。 [0056] Specifically, as shown in FIG 3 is a schematic view of the patterned photoresist mask layer 4 used may be a plate 4 by using a mask exposure, development and patterning and etching process for patterning the photosensitive light resist layer 3 to form a patterned photosensitive layer.

[0057] 205、采用湿法刻蚀工艺刻蚀ITO膜层时,设置湿法刻蚀的刻蚀液的浓度小于或者等于预设浓度。 [0057] 205, when the wet etching process for etching the ITO film layer, provided the concentration of wet etching etching solution is less than or equal to a preset concentration.

[0058] 本实施例中提供的ITO刻蚀方法的湿法刻蚀中的刻蚀液浓度可以比一般现有的湿法刻蚀中刻蚀液的浓度小5%左右,刻蚀时间可以比现有额湿法刻蚀工艺的刻蚀时间减少3秒左右,刻蚀设备的温度可以采用现有方案中的任一可以完成湿法刻蚀的温度数值。 About [0058] the concentration of an etching solution ITO etching wet etching method provided in the present embodiment may be smaller than the conventional wet etching concentration is typically in the 5% of the etching solution, the etching time can be compared etching time conventional wet etching process to reduce the amount of 3 seconds, temperature of the etching equipment can be used in the temperature values ​​of any prior embodiment of a wet etching can be done.

[0059] 206、采用湿法刻蚀工艺刻蚀掉ITO膜层中未被光刻胶层覆盖的ITO膜层。 [0059] 206, a wet etching process to etch away the ITO film layer that are not covered by the photoresist layer ITO film.

[0060] 如图6所示为移除掩膜板后,用湿法刻蚀工艺将图案化感光层的图案转移到ITO膜层。 [0060] As shown after mask removal, a wet etching process using the patterned photosensitive layer pattern is transferred to the ITO film layer 6. 其中,经过湿法刻蚀工艺刻蚀后如图6中所示会残留一部分IT021。 Wherein, after a wet etching process for etching shown in Figure 6 may remain part IT021.

[0061] 其中,一种可行的湿法刻蚀的刻蚀模式为喷淋模式。 [0061] wherein, one possible mode of etching is wet etching spray pattern.

[0062] 207、根据干法刻蚀所采用的刻蚀设备,设置采用干法刻蚀工艺刻蚀ITO膜层时的刻蚀设备中的刻蚀条件满足预设条件。 [0062] 207, according to an etching apparatus used in dry etching, etching conditions provided an etching apparatus when using a dry etching process for etching the ITO film layer satisfies a preset condition.

[0063] 其中,本实施例中可用的干法刻蚀的设备包括:电感稱合等离子体(InductivelyCoupled Plasma,简称ICP)设备、等离子刻蚀(plasma etching,简称PE)设备、反应离子刻蚀(Reactive 1n Etching,简称RIE)设备等。 Bonding said plasma inductively (InductivelyCoupled Plasma, referred to as ICP) equipment, plasma etching (plasma etching, referred to as PE) device, reactive ion etching (: [0063] wherein the dry etching apparatus of the present embodiment can be used include embodiments Reactive 1n Etching, referred to as RIE) equipment. 由于ICP设备的刻蚀损伤较大,PE设备的刻蚀速率较慢,因此,本实施例中优选干法刻蚀的刻蚀设备为RIE设备。 ICP etching damage due to the large device, the etch rate is slow PE device, therefore, the present embodiment is preferably etched in a dry etching embodiment of the device for the RIE apparatus.

[0064] 采用RIE设备进行干法刻蚀的时候,可以设置预设条件包括:刻蚀功率为IOO-1OOOw,压强为10-400毫托mtorr,使用的气体可以包括下面一项或任意项的组合:He、CHF3> Cl2, Ar、C2H4。 [0064] RIE using dry etching equipment, you can set the preset condition comprises: etching power IOO-1OOOw, a pressure of 10-400 mTorr mTorr, the gas used may include one or any of the following combination: He, CHF3> Cl2, Ar, C2H4. 例如,刻蚀效果较好的可行的干法刻蚀的刻蚀条件可以包括:功率为1000W,压强为40mtorr,气体流量比He/Cl2 = 100/300sccm ;功率为1000W,压强为40mtorr,气体流量比He/Cl2 = 50/300sccm。 For example, better etch viable conditions of dry etching the etching may comprise: a power of 1000W, a pressure of 40 mTorr, gas flow rate 100 / 300sccm ratio of He / Cl2 =; power of 1000W, a pressure of 40 mTorr, gas flow rate ratio of He / Cl2 = 50 / 300sccm. 此时对应的非晶态的ITO的刻蚀速率分别为1.66 A/s, 1.52A/S,刻蚀均一性分别为8.5%和6.8%。 At this time, the corresponding amorphous ITO etching rate were 1.66 A / s, 1.52A / S, etching uniformity of 8.5% and 6.8%, respectively. 当功率为1000W,压强为40mtorr, When power is 1000W, pressure is 40mtorr,

气体流量比He/Cl2 = 100/300sccm条件下,对应于多晶态的ITO的刻蚀速率为1.41A/S,刻 Gas flow rate ratio of He / Cl2 = 100 / 300sccm conditions, corresponding to a polycrystalline ITO etch rate of 1.41A / S, engraved

蚀均一性为11.1%。 Etch uniformity of 11.1%. 需要说明的是此处只是举例说明采用干法刻蚀的刻蚀条件,在实际应用中可以根据具体的运行环境选择适合的刻蚀条件作为预设条件。 It should be noted here merely illustrative etching conditions using dry etching, in practical applications as a preset condition depending on the operating environment to select appropriate etching conditions.

[0065] 需要说明的是步骤207设置干法刻蚀的刻蚀条件可以是在步骤208采用干法刻蚀工艺刻蚀残留ITO的步骤之前的任一步骤进行,也可以是与步骤208同时进行的。 [0065] Note that step 207 is provided etching conditions may be dry etching in step 208 by a dry etching process for etching any remaining step is performed prior to the step of ITO, or may be performed simultaneously with step 208 of. 具体的实施顺序可以根据实际运行环境的需要来选择合适的顺序执行。 Specific embodiments the order may be selected suitable order according to actual operating environment.

[0066] 208、采用干法刻蚀工艺刻蚀掉ITO膜层中未被光刻胶层覆盖的ITO膜层中通过湿法刻蚀工艺刻蚀后残留的ITO膜层。 [0066] 208, using the dry etching process to etch away the ITO film layer that are not covered by the photoresist layer after the ITO layer by wet etching process for etching the ITO film layer remaining.

[0067] 如图7中所示为采用干法刻蚀工艺完全刻蚀掉ITO膜层中通过湿法刻蚀工艺刻蚀后残留的ITO的结构图。 [0067] As shown in FIG. 7 by a dry etching process is completely etched away by the structure of FIG ITO film layer remaining after the wet etching process for etching ITO.

[0068] 209、祛除光刻胶层中通过湿法刻蚀工艺和干法刻蚀工艺刻蚀后剩余的光刻胶。 [0068] 209, eliminate the remaining photoresist layer, after the resist by wet etching process and a dry etching process for etching.

[0069] 其中,如图8所示,可以用剥离液祛除基板上剩余的感光性光刻胶层。 [0069] wherein, as shown in Figure 8, the remaining photosensitive resist layer on a substrate may be removed using a stripping solution.

[0070] 需要说明的是本实施例中湿法刻蚀的时间可以是根据刻蚀的ITO膜厚的剩余厚度和选用的湿法刻蚀速率来确定,一般采用湿法刻蚀剩余的ITO膜厚应小于原始ITO膜厚的5% ;干法刻蚀的时间可以是根据ITO膜层中通过湿法刻蚀后剩余的ITO的膜厚和干法刻蚀的刻蚀速率计算得到的。 [0070] Note that the thickness of the remaining time of wet etching of the present embodiment may be implemented according to the thickness of the ITO etch and wet etch rate chosen is determined, typically using wet etching the ITO film remaining thick ITO film thickness should be less than 5% of the original; dry etching time may be calculated in accordance with the ITO film layer through the remaining thickness of the etch rate of dry etching and the wet etching of ITO obtained.

[0071] 本实施中的ITO刻蚀方法,采用先湿法刻蚀掉需要得到的图案化ITO膜层中不需要的ΙΤ0,然后在采用干法刻蚀工艺刻蚀掉通过湿法刻蚀后残留在相应位置的所有ΙΤ0,最终形成需要的图案化的ITO膜层,可以极大的提升产品的品质,避免单一的采用湿法刻蚀出现的刻蚀均一性不高,尤其是关键尺寸偏差控制难度较大的问题。 [0071] ITO etching method in the present embodiment, the first film layer using the patterned ITO wet etching away the unwanted need ΙΤ0, then a dry etching process for etching away by wet etching after the residue in the corresponding position of all ΙΤ0, eventually forming a patterned ITO film required, can greatly enhance the quality of the product, to avoid a single wet etching using etch uniformity appear not high, especially in critical dimension variation control more difficult problem. 采用本方案中的刻蚀方法可以很方便的得到需要的图案化的ITO膜层,可以提高设备的使用时间。 Using the etching method of the present embodiment can easily obtain the desired patterned ITO film, can be improved using time of the device. 同时,本实施例中的刻蚀方法在采用干法刻蚀时中的等离子气体可以与光刻胶发生作用,使得后续进行光刻胶剥离时更加快速、容易和彻底。 Meanwhile, the etching method in the embodiment uses dry etching in a plasma gas and the photoresist may act occurs, so that a more rapid when a subsequent photoresist strip, easy and complete.

[0072] 本发明的实施例提供的刻蚀方法,通过在制作显示面板的阵列基板时采用湿法刻蚀工艺和干法刻蚀工艺相结合的方案形成ITO像素电极层,解决了现有的阵列基板制作方案中进行ITO图案化刻蚀时由于ITO膜厚过大而出现刻蚀不干净和刻蚀速度较慢的问题,增强了显示面板的ITO图案化的刻蚀效果和在实际应用中的实用性,提高了刻蚀速率,同时,降低了刻蚀成本。 [0072] Embodiments of the present invention, etching is provided by forming ITO pixel electrode layer is made of an array substrate of the panel when the wet etching process and a dry etching process of combining, solutions of the display in a conventional production Since too large thickness of ITO etching occurs not clean and etch problems slow when the array substrate having ITO patterned etching production program, the enhanced effect of the etching of the ITO pattern and the display panel in practical applications practicality, improved etch rate, while reducing the cost of the etching. 进而,可以提高生产效率。 Furthermore, it can improve production efficiency.

[0073] 本发明的实施例提供一种阵列基板,该阵列基板包括:基板和覆盖基板的ITO像素电极层。 Example [0073] The present invention provides an array substrate, the array substrate comprising: ITO pixel electrode layer of the substrate and the cover substrate.

[0074] 其中,该ITO像素电极层是采用湿法刻蚀工艺和干法刻蚀工艺相结合的工艺制程制作形成的。 [0074] wherein, the ITO pixel electrode layer is a wet etching process and a dry etching process of combining the process of manufacturing process of formation.

[0075] 本发明的实施例提供的阵列基板,通过在形成阵列基板中的ITO像素电极层时采用湿法刻蚀工艺和干法刻蚀工艺相结合的方案,解决了现有的阵列基板制作方案中进行ITO图案化刻蚀时由于ITO膜厚过大而出现刻蚀不干净和刻蚀速度较慢的问题,增强了显示面板的ITO图案化的刻蚀效果和在实际应用中的实用性,提高了刻蚀速率,同时,降低了刻蚀成本。 [0075] The array substrate of the present embodiment of the invention provides, using a wet etching process and a dry etch process combination of programs through the ITO pixel electrode layer is formed on the array substrate, the array substrate solves the conventional production Since too large thickness of ITO etching occurs not clean and etch problems slower etching when patterning the ITO embodiment, the display panel to enhance the effect of etching ITO patterned and utility in practical applications to improve the etch rate, while reducing the cost of etching. 进而,可以提高生产效率。 Furthermore, it can improve production efficiency.

[0076] 以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。 [0076] The above are only specific embodiments of the present invention, but the scope of the present invention is not limited thereto, any skilled in the art in the art within the technical scope of the present invention is disclosed, variations may readily occur or Alternatively, it shall fall within the protection scope of the present invention. 因此,本发明的保护范围应以所述权利要求的保护范围为准。 Accordingly, the scope of the present invention should be defined by the scope of the claims.

Claims (6)

1.一种刻蚀方法,其特征在于,所述方法包括: 在基板上形成一层氧化铟锡ITO膜层; 在所述ITO膜层上形成一层光刻胶层; 在所述光刻胶层上方设置掩膜板,所述掩膜板不完全覆盖所述光刻胶层; 祛除所述光刻胶层中未被所述掩膜板覆盖的光刻胶; 采用湿法刻蚀工艺刻蚀掉所述ITO膜层中未被所述光刻胶层覆盖的所述ITO膜层; 采用干法刻蚀工艺刻蚀掉所述ITO膜层中未被所述光刻胶层覆盖的所述ITO膜层中通过所述湿法刻蚀工艺刻蚀后残留的ITO膜层。 An etching method, wherein the method comprises: forming a layer of indium tin oxide ITO film on a substrate; forming a photoresist layer on the ITO film; the photolithographic subbing layer is provided above the mask plate, the mask does not completely cover the photoresist layer; eliminate the photoresist layer that are not covered by the photoresist of the mask plate; wet etching process etching away the ITO film layer not covered by the photoresist layer covers the ITO film; a dry etching process for etching away the ITO film layer not covered by the photoresist layer the ITO film layer remaining after the wet etching process for etching the ITO film by.
2.根据权利要求1所述的方法,其特征在于,所述方法还包括: 祛除所述光刻胶层中通过所述湿法刻蚀工艺和所述干法刻蚀工艺刻蚀后剩余的光刻胶。 2. The method according to claim 1, wherein said method further comprises: after eliminate the photoresist layer by the wet etching process and the dry etching process for etching the remaining photoresist.
3.根据权利要求1或2所述的方法,其特征在于,所述方法还包括: 根据干法刻蚀所采用的刻蚀设备,设置采用干法刻蚀工艺刻蚀所述ITO膜层时的所述刻蚀设备中的刻蚀条件满足预设条件。 3. The method of claim 1 or claim 2, characterized in that, said method further comprising: the etching apparatus used in dry etching, is provided by a dry etching process for etching the ITO film when etching conditions in the etching apparatus meets a preset condition.
4.根据权利要求1或2所述的方法,其特征在于, 所述基板上的所述ITO膜层的厚度大于预设膜厚。 4. The method of claim 1 or claim 2, wherein the thickness of the ITO film layer on the substrate is greater than a predetermined film thickness.
5.根据权利要求1或2所述的方法,其特征在于,所述方法还包括: 采用湿法刻蚀工艺刻蚀所述ITO膜层时,设置所述湿法刻蚀的刻蚀液的浓度小于或者等于预设浓度。 5. The method of claim 1 or claim 2, wherein said method further comprises: when the ITO film etching process using wet etching, the etchant is provided a wet etching concentration of less than or equal to a preset concentration.
6.一种阵列基板,其特征在于,所述阵列基板包括: 基板; 覆盖所述基板的ITO像素电极层,所述ITO像素电极层是采用湿法刻蚀工艺和干法刻蚀工艺相结合的工艺制程制作形成的。 6. An array substrate, wherein the array substrate comprises: a substrate; ITO pixel electrode layer covering the substrate, the ITO pixel electrode layer is a wet etching process and a dry etch process in combination the process of manufacturing process of formation.
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