CN103941122A - Multifunctional transformer comprehensive testing device - Google Patents

Abstract

A multi-functional transformer test comprehensive test device, mainly composed of a working power supply, a data acquisition system, a CPU system, an operation interface, a power output control system, a relay system and wiring terminals, wherein the data acquisition system includes on-load acquisition, impedance acquisition and direct current acquisition. Resistance acquisition, it is characterized in that: described data acquisition system is also provided with degaussing acquisition, degaussing acquisition system is connected with CPU system through serial port, has three AD conversion chips, each AD conversion chip is provided with AD7705 analog-to-digital converter, Serial input/output isolation circuit, power isolation circuit, crystal oscillating circuit, reference voltage source circuit and analog signal input circuit; the present invention realizes the integrated use of four test and test equipment of transformer winding by adding degaussing acquisition system, reduces The space occupation and the number of times the inspection personnel go up and down the transformer ensure personal safety, quickly eliminate the residual magnetism inside the transformer, and improve work efficiency.

Description

A multifunctional transformer test comprehensive test device

technical field

The invention relates to a transformer detection device, in particular to a multifunctional transformer test comprehensive test device.

Background technique

my country's power industry requires testing of winding DC resistance, low-voltage short-circuit impedance, on-load tap-changer characteristics, and winding degaussing during transformer outage maintenance, new transformer handover and acceptance, and power outage troubleshooting. Winding DC resistance, low-voltage short-circuit impedance, on-load tap-changer characteristics and demagnetization are four independent test items that must be done. At present, domestic test instrument manufacturers produce single test equipment for each test item, and there is no comprehensive test. device. In this way, the test personnel must carry a variety of test equipment and related test lines at the same time, and repeat the test with the upper and lower transformers. The labor intensity is high, the risk index is high, and the waste of equipment and materials is serious. In addition, various equipment takes up a lot of work space, which affects the detection efficiency. .

Contents of the invention

The purpose of the present invention is to solve the problem that when testers use existing methods to detect transformers, they carry a variety of detection equipment, resulting in waste of equipment materials, occupying a large amount of work space, and increasing labor intensity caused by repeated up and down tests. To solve problems such as increased risk index, a multifunctional transformer test comprehensive test device is provided.

The specific scheme of the present invention is: a multi-functional transformer test comprehensive test device, mainly composed of a working power supply, a data acquisition system, a CPU system, an operation interface, a power output control system, a relay system and a wiring terminal; the whole device adopts a set of working The power supply provides the required power for the test function; the CPU system communicates with the data acquisition system and the operation interface through the serial port, which manages the data acquisition system, the switching and output of the power output control system, the phase switching of the relay system, and the switching of AC and DC output , and complete the human-computer interaction work through the operation interface; the data acquisition system includes on-load acquisition, impedance acquisition and direct resistance acquisition, and is characterized in that: the data acquisition system is also provided with degaussing acquisition, and the degaussing acquisition system also communicates with the CPU through the serial port The system is connected with three AD conversion chips, and each AD conversion chip is equipped with an AD7705 analog-to-digital converter, a serial input/output isolation circuit, a power isolation circuit, a crystal oscillator circuit, a reference voltage source circuit and an analog signal input circuit.

Chip selection/CS of AD7705 analog-to-digital converter described in the present invention, No. 2 differential channels AIN2+, AIN2-, negative terminal reference voltage REFN- and the pins of potential reference point GND are all grounded; its voltage VDD and reset/RSSET Pin connected to +5V DC power supply.

The power isolation circuit described in the present invention is composed of a fully-controlled rectifier bridge and a 7805 regulated power supply module U1, the AC input end of the fully-controlled rectifier bridge is connected to the terminal J1, and its DC output terminal is connected to the input of the regulated power supply module Pin 1 and ground pin 2; a high-frequency filter capacitor E7 is connected in parallel between the input pin 1 and the ground pin 2 of the stabilized voltage module, and its output pin 3 is connected in parallel with the ground pin 2 respectively There are high-frequency filter capacitors E8, E9 and capacitors C16, C17, C18, and C19; the output pin 3 of the stabilized power supply module is connected to the +5V voltage VDD pin of the AD7705 analog-to-digital converter.

Crystal oscillating circuit described in the present invention is connected with main clock input MCLK IN of AD7705 analog-to-digital converter and main clock output MCLK OUT, is made up of resistance R36 and quartz crystal, and electric capacity C14, C15, wherein the clock frequency of quartz crystal is 2MHZ.

The reference voltage source circuit described in the present invention comprises chip AD780BR, and the reference input terminal and the reference output terminal of AD780BR are connected in parallel with decoupling capacitors E6, C12 and E5, C11 respectively, wherein the reference input terminal is connected to +5V DC power supply, and the reference output terminal is connected to REFIN+ pin of the AD7705 analog-to-digital converter.

The serial input/output isolation circuit in the present invention includes a serial clock input circuit, a serial data input circuit and a serial data output circuit, wherein a photoelectric isolator 6N137 is connected in series in these three circuits.

The analog signal input circuit described in the present invention has a terminal J2 that includes 4 input signal channels, and there are voltage dividing resistors R25 and R26 in series between the No. 1 and No. 2 channels of the terminal, and the No. 3 and No. 4 channels are respectively By connecting a current limiting resistor R27 and R28 in series, it is connected to the two pins AIN+ and AIN- of the differential input channel 1 of the AD7705 analog-to-digital converter; the connection between the 3rd channel and the 1st and 2nd channels is carried out through the contacts of the relay KM6 Switch, and the analog input negative terminal AIN- is connected to the reference voltage VREF.

In the present invention, due to the addition of the degaussing acquisition system, the integrated use of test equipment for test items such as transformer winding DC resistance, winding degaussing, low-voltage short-circuit impedance, and on-load tap-changer characteristics is realized, which not only saves the use of raw materials, reduces Occupying the working space, and reducing the number of inspection personnel going up and down the transformer, reducing labor intensity, increasing personal safety factors, quickly eliminating the residual magnetism in large power transformers, and improving work efficiency; and adding power isolation to the degaussing acquisition system And the photoelectric isolation module ensures the anti-interference of the degaussing acquisition system and improves the accuracy of the test test items.

Description of drawings

Fig. 1 is the overall block diagram of circuit of the present invention;

Fig. 2 is the circuit schematic diagram of the AD conversion chip of the degaussing acquisition system;

In the figure: 1—AD7705 analog-to-digital converter, 2—serial input/output isolation circuit, 3—power isolation circuit, 4—crystal oscillator circuit, 5—reference voltage source circuit, 6—analog signal input circuit, 7—serial Line clock input circuit, 8—serial data input circuit, 9—serial data output circuit.

Detailed ways

See Figures 1 and 2, a multifunctional transformer test comprehensive test device, mainly composed of a working power supply, data acquisition system, CPU system, operation interface, power output control system, relay system and wiring terminals; the whole device uses a set of working power supply, Provide the required power for the test function; the CPU system communicates with the data acquisition system and the operation interface through the serial port, which manages the data acquisition system, the switching and output of the power output control system, the phase switching of the relay system and the switching of AC and DC output, and The human-computer interaction work is completed through the operation interface; the data acquisition system includes on-load acquisition, impedance acquisition and direct resistance acquisition, and it is characterized in that: the data acquisition system is also equipped with degaussing acquisition, and the degaussing acquisition system is also connected to the CPU system through the serial port Contact, with three AD conversion chips, each AD conversion chip is equipped with AD7705 analog-to-digital converter 1, serial input/output isolation circuit 2, power isolation circuit 3, crystal oscillator circuit 4, reference voltage source circuit 5 and analog signal Input circuit 6.

Chip select/CS of AD7705 analog-to-digital converter 1 described in this embodiment, No. 2 differential channels AIN2+, AIN2-, the pins of negative reference voltage REFN- and potential reference point GND are all grounded; its voltage VDD and reset The pin of /RSSET is connected to +5V DC power supply; when the power is turned on, the input pin /RESET is at a low level, which resets all logic, data filters and analog debuggers, and sets all on-chip registers to their default states.

The power isolation circuit 3 in this embodiment is composed of a fully-controlled rectifier bridge and a 7805 regulated power supply module U1, the AC input terminal of the fully-controlled rectifier bridge is connected to the terminal J1, and its DC output terminal is connected to the regulated power supply module The input pin 1 and the ground pin 2; the high-frequency filter capacitor E7 is connected in parallel between the input pin 1 and the ground pin 2 of the stabilized voltage module, and its output pin 3 is connected with the ground pin 2 High-frequency filter capacitors E8, E9 and capacitors C16, C17, C18, C19 are connected in parallel respectively; the output pin 3 of the voltage stabilizing power supply module is connected to the +5V voltage VDD pin of the AD7705 analog-to-digital converter; the full control The rectifier bridge converts the 8V AC from terminal J1 into 11V DC, and inputs it to the voltage regulator module, which outputs +5V DC, which is input to the AD7705 analog-to-digital converter after high-frequency filtering; The voltage isolation module eliminates the interference of external interference signals on the internal control function of the AD conversion module.

The crystal oscillation circuit 4 described in this embodiment is connected with the main clock input MCLK IN and the main clock output MCLK OUT of the AD7705 analog-to-digital converter 1, and is composed of a resistor R36, a quartz crystal, and capacitors C14, C15, wherein the quartz crystal The clock frequency is 2MHZ; this circuit provides a main clock signal with a clock frequency of 2MHZ for the AD7705 analog-to-digital converter 1.

The reference voltage source circuit 5 described in this embodiment includes a chip AD780BR, and the reference input terminal and the reference output terminal of the AD780BR are connected in parallel with decoupling capacitors E6, C12 and E5, C11 respectively, wherein the reference input terminal is connected to a +5V DC power supply, and the reference output terminal Connect to the REFIN+ pin of the AD7705 ADC to provide a 2.5V reference for ADC 1.

The serial input/output isolation circuit 2 described in this embodiment includes a serial clock input circuit 7, a serial data input circuit 8 and a serial data output circuit 9, wherein in these three circuits, a photoelectric isolator 6N137 is connected in series respectively ; In the serial clock input circuit 7, the input signal to the CPU system is connected to the 2-pin input end of the photoelectric isolator IC18 through the triode N7 series current limiting resistor R34, and the 8 pins of the photoelectric isolator are connected to +5V direct current, The pull-up resistor R35 is connected in series between the 6-pin output terminal and the 8-pin, and its 6-pin output terminal is connected to the serial clock input pin SCLK of the AD7705 through the inverter IC15A; the serial data input circuit 8 is connected to the serial clock The input circuit 7 is connected in the same way, and the input signal from the CPU system is input to the serial data input pin DIN of AD7705 by this circuit; in the described serial data output circuit 9, the AD7705 serial data output pins are respectively connected successively Inverter IC15C, triode N9 and current limiting resistor are connected to the 2-pin input terminal of the photoelectric isolator, and the 6-pin output terminal of the photoelectric isolator is connected to the CPU system.

The photoelectric isolator described in this embodiment photoelectrically isolates the input/output signal between the AD analog-to-digital converter 1 and the CPU system, which greatly improves the sound-to-noise ratio of the system and provides good isolation for the input/output signal Function, to avoid the interference of system noise on the AD line.

In this embodiment, the analog signal input circuit 6 has a terminal J2 including 4 input signal channels, and the voltage dividing resistors R25, R26, No. 3 and No. 4 are connected in series between No. 1 and No. 2 channels of the terminal. The channels are respectively connected to the two pins AIN+ and AIN- of the differential input channel 1 of the AD7705 analog-to-digital converter through series connection of a current-limiting resistor R27 and R28; between channel 3 and channels 1 and 2 through the contact of relay KM6 The point is switched, and the analog input negative terminal AIN- is connected to the reference voltage VREF. The analog input circuit realizes the collection and conversion of various input signals such as voltage, current and resistance.

The three AD conversion chips of the degaussing collection system described in this embodiment jointly realize the collection of three voltages and three currents.

Claims (7)

1. A comprehensive test device for multi-functional transformer test, mainly composed of working power supply, data acquisition system, CPU system, operation interface, power output control system, relay system and wiring terminals; the whole device adopts a set of working power supply for the test function Provide the required power supply; the CPU system communicates with the data acquisition system and the operation interface through the serial port. Complete human-computer interaction work; the data acquisition system includes on-load acquisition, impedance acquisition and direct resistance acquisition. Three AD conversion chips, each AD conversion chip is provided with an AD7705 analog-to-digital converter, a serial input/output isolation circuit, a power isolation circuit, a crystal oscillator circuit, a reference voltage source circuit and an analog signal input circuit. 2. A kind of multifunctional transformer test comprehensive testing device according to claim 1, is characterized in that: the chip selection/CS of described AD7705 analog-to-digital converter, No. 2 differential channels AIN2+, AIN2-, negative terminal reference voltage REFN - and the pins of the potential reference point GND are grounded; its voltage VDD and reset/RSSET pins are connected to +5V DC power supply. 3. A kind of comprehensive testing device for multifunctional transformer test according to claim 1, characterized in that: the power isolation circuit is composed of a full-control rectifier bridge and a 7805 stabilized power supply module U1, and the AC of the full-control rectifier bridge The input end is connected to terminal J1, and its DC output end is connected to input pin 1 and ground pin 2 of the voltage stabilizing power supply module; High-frequency filter capacitor E7, high-frequency filter capacitors E8, E9 and capacitors C16, C17, C18, C19 are connected in parallel between its output pin 3 and ground pin 2; The +5V voltage VDD pin of the AD7705 analog-to-digital converter is connected. 4. a kind of multifunctional transformer test comprehensive testing device according to claim 1, is characterized in that: described crystal oscillating circuit is connected with master clock input MCLK IN and master clock output MCLK OUT of AD7705 analog-to-digital converter, by Composed of resistor R36, quartz crystal, and capacitors C14 and C15, the clock frequency of the quartz crystal is 2MHZ. 5. the described a kind of multi-functional transformer test comprehensive testing device of claim 1, it is characterized in that: described reference voltage source circuit comprises chip AD780BR, and the reference input end and reference output end of AD780BR are connected in parallel with decoupling capacitance E6, C12 respectively And E5, C11, where the reference input terminal is connected to +5V DC power supply, and the reference output terminal is connected to the REFIN+ pin of the AD7705 analog-to-digital converter. 6. A kind of multifunctional transformer test comprehensive test device according to claim 1, characterized in that: said serial input/output isolation circuit comprises a serial clock input circuit, a serial data input circuit and a serial data output circuit , in which the photoelectric isolator 6N137 is connected in series in the three circuits respectively. 7. A kind of multifunctional transformer test comprehensive testing device according to claim 1, characterized in that: said analog signal input circuit has a terminal J2 that includes 4 input signal channels, No. 1 and No. 2 of said terminals There are voltage divider resistors R25 and R26 connected in series between channels No. 3 and No. 4 respectively through a current-limiting resistor R27 and R28 connected in series to the two pins AIN+ and AIN of the differential input channel No. 1 of the AD7705 analog-to-digital converter. - Upper: Channel 3 and channels 1 and 2 are switched through the contact of relay KM6, and the analog input negative terminal AIN- is connected to the reference voltage VREF.