CN103927814B - Luminance point automatic calibration bill validator - Google Patents

Luminance point automatic calibration bill validator Download PDF

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CN103927814B
CN103927814B CN 201410144126 CN201410144126A CN103927814B CN 103927814 B CN103927814 B CN 103927814B CN 201410144126 CN201410144126 CN 201410144126 CN 201410144126 A CN201410144126 A CN 201410144126A CN 103927814 B CN103927814 B CN 103927814B
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fpga
effect transistor
bill validator
field effect
type field
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CN103927814A (en )
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陈思龙
尤新革
李方震
付祥旭
江浩
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尤新革
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Abstract

本发明涉及点验钞机技术,自动校准亮度的点验钞机。 The present invention relates to a technical point bill validator, bill validator luminance point automatic calibration. 现有技术缺点是:点验钞机图像质量不稳定;用户使用不方便;维护成本较高。 The disadvantage is that the prior art: an image quality point of instability bill validator; user inconvenient; higher maintenance costs. 本发明点验钞机的控制电路包括数字信号处理芯片DSP、现场可编程门阵列FPGA、多通道增强型场效应管、可编程数字电位器和模数转换AD芯片;数字信号处理芯片DSP和现场可编程门阵列FPGA通过外部存储器接口EMIF相连;多通道增强型场效应管与FPGA的通用I/O口相连;可编程数字电位器串联在多通道增强型场效应管和CIS之间;AD芯片输入端与CIS信号输出端连接,其输出端与FPGA通过通用I/O口连接。 Point bill validator control circuit of the present invention comprises a digital signal processing chip DSP, a field programmable gate array, the FPGA, the multi-channel enhancement type field effect transistor, a programmable digital potentiometer and analog to digital AD converting chip; DSP digital signal processing chip and field programmable gate array (FPGA) is connected via the EMIF external memory Interface; multi-purpose I connected channel enhancement type field effect transistor and FPGA / O port; a programmable digital potentiometer in series between a multi-channel enhancement type field effect transistor and CIS; AD chip input CIS and the signal output terminal is connected to its output through a common connection with the FPGA I / O port. 本发明的优点是:提高点验钞机图像质量;降低维护成本;操作使用方便。 Advantage of the present invention are: to improve the image quality point the bill validator; lower maintenance costs; and easy to operate.

Description

自动校准竞:度的点验纱机 Automatic calibration competing: inspection of the degree of yarn

技术领域 FIELD

[0001] 本发明涉及点验钞机技术,具体地说是一种自动校准亮度的点验钞机。 [0001] The present invention relates to a technology point bill validator, in particular to a luminance point automatic calibration bill validator.

背景技术 Background technique

[0002]目前纸币、发票等有价票据时刻在人们生活中流通,一些不法分子为了经济利益,造假日益泛滥。 [0002] Currently bills, invoices and other documents of value in circulation time in people's lives, some criminals for financial gain, the increasing spread of fraud. 为了打击犯罪,准确识别伪造的纸币、发票等,保护国家、人民财产安全,有价票据的真伪识别显得非常重要。 In order to combat crime, to accurately identify counterfeit notes, invoices, etc., to protect the country, people and property, to identify the authenticity of the document of value is very important.

[0003] 现有技术有价票据识别系统,融合了磁编码和光学特征等重要防伪技术。 [0003] The prior art identification document of value systems, magnetic encoding fusion and optical characteristics and other important anti-counterfeiting technology. 随着科学技术的飞速发展,图像识别技术也融入到有假票据鉴伪技术的大家庭中,弥补了磁、光技术的缺陷,如票面新旧识别、冠字号识别与统计、图像鉴伪等技术。 With the rapid development of science and technology, image recognition technology is integrated into the family of false notes pseudo-Kam technology, to make up for the shortcomings of magnetic, optical technologies, such as the face of old and new recognition, identification and statistical crown size, image technology and other pseudo-Kam .

[0004] 已有技术成功完成了从电荷耦合元件/互补金属氧化物半导体CCD/CM0S面阵传感器和(XD/CM0S线阵传感器到接触式图像传感器(CIS)的过度,由于CIS具有的体积小、重量轻、成本低等的优点,成为了金融设备图像传感器的主流传感器,并结合数字信号处理芯片(DSP)技术和现场可编程门阵列(FPGA)技术,实现了高质量图像采集和处理。 [0004] The prior art charge coupled device from successfully completed / complementary metal oxide semiconductor CCD / CM0S area array sensor and (XD / CM0S line sensors to excessive contact image sensor (CIS), since having a small size CIS , light weight, low cost advantages, the financial device sensor has become the mainstream of the image sensor, and combined with digital signal processing chip (DSP) technology and field programmable gate array (FPGA) technology, a high-quality image acquisition and processing.

[0005] CIS—般具有红、蓝、绿、红外、紫外等不同光谱的光源,在采集系统控制下,分别被点亮,并在当前光源下获取相应图像。 [0005] CIS- having red-like, light sources with different spectra of blue, green, infrared, ultraviolet, etc., under the control of the acquisition system, are lit, and acquires the corresponding image in the current source. 由于每个光学设备的不一致性和各光谱光源配比需求,例如白光由特定比例的蓝光和绿光构成,有价票据识别系统在出厂前都需要用电位器进行调节。 Since each optical device inconsistencies and demand ratio for each spectrum light source, for example a white light composed of specific proportions of green and blue, the document of value in identification systems require factory adjusted potentiometer. 然而,由于CIS老化、电路老化和环境变化等因素,机器要在一定时期内或更换工作环境的条件下,进行校准,以便保证图像质量。 However, since the CIS aging, aging and environmental circuit changes and other factors, to the machine in a period of time or environmental conditions of replacement, calibration, to ensure image quality. 现有技术电位器为手动可调电位器,必须拆机维护,既不方便用户,也给点验钞机生产厂家带来不必要的成本投入。 The prior art potentiometer is manually adjustable potentiometer, you must disassemble maintenance, not user-friendly, but also unnecessary investment costs to the point the bill validator manufacturers.

[0006] 现有技术的缺点是:1.点验钞机图像质量不稳定。 Disadvantage of [0006] the prior art are: 1:00 bill validator unstable image quality. 2.用户使用不方便。 2. User inconvenient. 3.点验钞机维护成本较高。 3. Money Detector point higher maintenance costs.

[0007]因此发明一种具有提高点验钞机图像质量,用户使用方便,降低维护成本优点的自动校准亮度的点验钞机是十分必要的。 [0007] Thus the invention with improved image quality bill validator point, user convenience and reduce maintenance cost advantages bill validator point auto-calibration is necessary brightness.

发明内容 SUMMARY

[0008] 本发明的目的是:提供一种具有提高点验钞机图像质量,方便用户,降低维护成本优点的可自动校准亮度的点验钞机。 [0008] The object of the present invention are: to provide an improved bill validator dot image quality, user-friendly, the advantages of reduced maintenance cost point of bill validators can be automatically calibrate brightness.

[0009] 本发明的目的是这样实现的: [0009] The object of the present invention is implemented as follows:

[0010] —种可自动校准亮度的点验钞机,由机体、点钞装置、验钞装置、电机、控制电路组成,其特征在于:控制电路包括数字信号处理芯片(DSP)、现场可编程门阵列(FPGA)、多通道增强型场效应管、可编程数字电位器和模数转换芯片(AD芯片);DSP和FPGA通过外部存储器接口(EMIF)相连;所述多通道增强型场效应管与FPGA的通用I/O 口相连;所述可编程数字电位器串联在多通道增强型场效应管和接触式图像传感器(CIS)之间;所述AD芯片输入端与CIS信号输出端连接,所述AD芯片输出端与FPGA通过通用I/O 口连接。 [0010] - species can be automatically calibrated luminance point detectors, by the body, Counting apparatus, paper money, motor, control circuit, wherein: the control circuit comprises a digital signal processing chip (DSP), a field programmable gate array (FPGA), a multi-channel enhancement type field effect transistor, and a programmable digital potentiometer chip analog to digital converter (AD chips); the DSP and the FPGA are connected via the external memory interface (the EMIF); the multi-channel enhancement type field effect transistor and FPGA general purpose I / O port is connected; said programmable digital potentiometer in series between a multi-channel enhancement type field effect transistor and a contact image sensor (CIS); the AD chip input terminal and an output terminal connected to the signal CIS, the AD chip and said output terminal are connected through a common FPGA I / O port.

[0011] 所述可编程数字电位器通过I2C总线或SPI总线与FPGA相连。 The [0011] programmable digital potentiometer is connected via an I2C bus or SPI bus FPGA.

[0012] 两或多片可编程数字电位器共用一条I2C总线或SPI总线,通过地址编码选定其中一片进行编程。 [0012] two or more sheets of a programmable digital potentiometer common I2C bus or SPI bus, an address code by which the selected program.

[0013] 多通道增强型场效应管包括两个以上通道增强型场效应管。 [0013] Multi-channel enhancement type field effect transistor comprises two or more channel enhancement type field effect transistor.

[0014] 本发明的要点是: [0014] The gist of the invention are:

[0015] 通过带有数字信号处理芯片(DSP)、现场可编程门阵列(FPGA)、多通道增强型场效应管控制电路自动校准点验钞机的亮度,从而实现本发明的目的。 [0015] By having a digital signal processing chip (DSP), field programmable gate arrays (the FPGA), a multi-channel enhancement type field effect transistor automatic brightness control circuit bill validator calibration point, in order to achieve the object of the present invention.

[0016] 本发明的线路板还可以用于其它金融设备,例如银行的ATM存取款机、清分机、票据鉴伪装置等。 PCB [0016] The present invention may also be used in other financial devices, such as ATM bank teller machine, sorter, Kam false bills devices.

[0017] 本发明克服了现有技术的不足,提供了亮度可自动校准的点验钞机,通过控制电路实现自动校准亮度。 [0017] The present invention overcomes the disadvantages of the prior art by providing automatic calibration of a brightness point detectors, automatic brightness adjustment by the control circuit. 控制电路包括数字信号处理芯片(DSP)、现场可编程门阵列(FPGA)、多通道增强型场效应管、可编程数字电位器和AD芯片。 The control circuit comprises a digital signal processing chip (DSP), field programmable gate arrays (the FPGA), a multi-channel enhancement type field effect transistor, and a programmable digital potentiometer AD chip.

[0018] FPGA提供时序驱动CIS工作,CIS输出模拟信号通过AD芯片的处理将模拟信号转换成数字信号,将所述数字信号存储到FPGA内部RAM中,然后传输给DSP,DSP计算当前基准纸张图像灰度值的特征值,将所述特征值与事先设定的阈值比较,如果特征值在以阈值为中心的有限区域内,校准成功;如果特征值不在以阈值为中心的有限区域内,则需要调理可编程数字电位器,FPGA通过I2C总线或SPI总线对可编程数字电位器进行编程,控制可编程数字电位器,达到调节电阻的目的。 [0018] FPGA provides timing driven work CIS, CIS output analog signal processing chip AD converts the analog signal into a digital signal, said digital signal stored in the FPGA internal RAM and then transmitted to the DSP, DSP calculating a current reference paper sheet images characteristic value of the gradation values, the feature value compared with a threshold value set in advance, if the characteristic value in a limited area in the center of the threshold, the calibration is successful; if the feature value is not limited to the center of the threshold region, the It requires conditioning programmable digital potentiometer, FPGA via I2C bus or SPI bus to program a programmable digital potentiometer, control the programmable digital potentiometer, the resistance adjustment purposes.

[0019] 本发明亮度可自动校准的点验钞机,操作方法包括以下步骤: [0019] The present invention can automatically calibrate the luminance point detectors, the operation method comprising the steps of:

[0020] 1.通过可视化界面进入CIS光源校准模式,选择动态或静态校准方式; [0020] 1. Enter CIS light source calibration mode through a visual interface, to select a dynamic or static calibration mode;

[0021] 2.使用动态或静态采图方式采集图像; [0021] 2. Using a dynamic or static image acquired mining FIG embodiment;

[0022] 3.CIS驱动电路模块获取灰度图像,DSP对图像数据进行分析,得出特征值; [0022] 3.CIS driving circuit module acquires a grayscale image, the image data of the DSP analysis, the characteristic value;

[0023] 4.将上述特征值与设定阈值进行比较,如果特征值在以阈值为中心的有限区域内,则校准成功;如果不满足,则进入调理可编程数字电位器环节; [0023] 4. The above-described feature values ​​with a set threshold value, if the characteristic value in a limited area in the center of the threshold, the calibration is successful; if not, the process proceeds conditioning programmable digital potentiometer links;

[0024] 5.FPGA通过I2C总线或SPI总线对可编程数字电位器进行编程,调整可编程数字电位器阻值; [0024] 5.FPGA programming the programmable digital potentiometer via I2C bus or SPI bus, a programmable digital adjustment potentiometer value;

[0025] 6.重新获取图像,重复步骤3、4、5,直到校准成功。 [0025] 6. reacquired image, repeating steps 3, 4, until the calibration is successful.

[0026] 本发明与国内外现有同类产品的不同功能在于: [0026] The present invention relates to different functions of conventional domestic and similar products comprising:

[0027] 现有的国内外点验钞机都不具备自动校准功能,本发明则可自动校准点验钞机的亮度,提高了点验钞机图像质量,降低维护成本,用户使用方便。 [0027] The conventional bill validator points do not have domestic and automatic calibration, the present invention can automatically calibrate the luminance point bill validator, bill validator point improves the image quality, reduce maintenance costs, user-friendliness.

[0028] 经广泛查阅国内外公开出版物和检索专利文献,均未见有与本发明完全相同的技术方案。 [0028] Now are widely abroad publications and patent document retrieval, there are no technical solutions identical to the present invention. 本发明具有创造性、新颖性,本发明适用于全世界的银行、商厂、企业,具有广泛的实用性。 The invention has the creativity, novelty, the present invention is applicable to the world of banking, commercial plant, the company has wide applicability.

[0029] 本发明的优点是: [0029] The advantage of the present invention are:

[0030] 1.提高点验钞机图像质量; [0030] 1. Improved image quality point the bill validator;

[0031] 2.降低维护成本; [0031] 2. The lower maintenance costs;

[0032] 3.操作使用方便。 [0032] 3. easy operation.

附图说明 BRIEF DESCRIPTION

: :

[0033]图1为本发明可自动校准亮度的点验钞机图像传感器驱动电路模块图; [0033] FIG. 1 of the present invention can automatically calibrate the luminance image sensor driving circuit point bill validator block diagram;

[0034] 图2为本发明点验钞机控制方法流程图。 [0034] FIG bill validator 2:00 flowchart showing a control method of the present invention.

具体实施方式 Detailed ways

: :

[0035] 下面结合附图通过实施例对本发明进行详细说明。 [0035] The following detailed description of the present invention by way of example with the figures.

[0036]图1为亮度可自动化校准的接触式图像传感器驱动电路模块构成,包括数字信号处理芯片(DSP)、现场可编程门阵列(FPGA)、双或多通道增强型场效应管、可编程数字电位器和AD芯片。 [0036] FIG driving circuit module is a contact type image sensor configured brightness automated calibration, including a digital signal processing chip (DSP), field programmable gate arrays (the FPGA), or dual-channel enhancement type field effect transistor, programmable digital potentiometers and AD chip.

[0037] 图中DSP和FPGA通过外部存储器接口(EMIF)相连,FPGA采集到的图像通过总线传输到DSP处理;双或多通道增强型场效应管与FPGA的通用I/O 口相连,其导通和截止状态分别控制光源通断;可编程数字电位器串联在双或多通道增强型场效应管和CIS之间,通过分压来控制CIS亮度强弱。 [0037] FIG DSP and FPGA by an external memory interface (the EMIF) is connected, FPGA images collected over a bus to the DSP processing; bi- or connected to a general purpose I-channel enhancement type field effect transistor and FPGA / O port, which guide oN and oFF states, respectively, controls the light source off; programmable digital potentiometer in series between the dual or multiple channel enhancement type field effect transistor and CIS, CIS luminance intensity is controlled by partial pressure.

[0038] 所述可编程数字电位器通过I2C总线或SPI总线与FPGA相连,FPGA编程控制可编程数字电位器阻值。 [0038] The programmable digital potentiometer via I2C bus or SPI bus is connected to the FPGA, FPGA programmed to control the programmable digital potentiometer value. 两或多片可编程数字电位器共用一条I2C总线或SPI总线,通过地址编码选定其中一片进行编程。 Two or more sheets of a programmable digital potentiometer common I2C bus or SPI bus, an address code by which the selected program. 模块根据所选基准纸张灰度图像特征,给出相应反馈用以调整亮度。 Module sheet wherein the selected reference gray-scale image, given the appropriate feedback to adjust brightness.

[0039] 本实施例采用基准纸张为纯色,使用静态或动态标准化方式。 [0039] The present embodiment uses a reference solid color paper, using a standardized static or dynamic manner. 静态标准化是将基准纸张放在CIS上获取图像,动态标准化是在基准纸张通过采图通道时获取图像。 Standardization is static on the reference paper CIS acquired image, a moving image acquired through standardization is adopted in reference to FIG channel paper.

[0040] 阈值界定方法,以冠字号识别率最高条件下的基准纸张灰度图像灰度均值为阈值。 [0040] The method of defining the threshold value, the reference conditions at the highest recognition rate of the sheet crown size gray scale image gray value as the threshold.

[0041] 如图2所示,亮度可自动化校准CIS驱动电路模块的控制方法,其步骤如下: [0041] 2, the luminance control method of the driving circuit module CIS calibration can be automated, the following steps:

[0042] 1.通过可视化界面进入CIS光源校准模式,选择动态或静态校准方式; [0042] 1. Enter CIS light source calibration mode through a visual interface, to select a dynamic or static calibration mode;

[0043] 2.使用动态或静态采图方式采集图像; [0043] 2. Using a dynamic or static image acquired mining FIG embodiment;

[0044] 3.CIS驱动电路模块获取灰度图像,DSP对图像数据进行分析,得出特征值; [0044] 3.CIS driving circuit module acquires a grayscale image, the image data of the DSP analysis, the characteristic value;

[0045] 4.将上述特征值与设定阈值进行比较,如果特征值在以阈值为中心的有限区域内,则校准成功;如果不满足,则进入调理可编程数字电位器环节; [0045] 4. The above-described feature values ​​with a set threshold value, if the characteristic value in a limited area in the center of the threshold, the calibration is successful; if not, the process proceeds conditioning programmable digital potentiometer links;

[0046] 5.FPGA通过I2C总线或SPI总线对可编程数字电位器进行编程,调整可编程数字电位器阻值; [0046] 5.FPGA programming the programmable digital potentiometer via I2C bus or SPI bus, a programmable digital adjustment potentiometer value;

[0047] 6.重新获取图像,重复步骤3、4、5,直到校准成功。 [0047] 6. reacquired image, repeating steps 3, 4, until the calibration is successful.

[0048] 本实施例采用双通道256抽头可编程数字电位器,最大阻值IK Ω,内部由数字控制电路、非易失性存储器和RDAC(Redundant Disk Array Controller)电路构成。 [0048] The present embodiment employs a dual-channel programmable digital potentiometer tap 256, the maximum resistance IK Ω, internally by the digital control circuit, nonvolatile memory and RDAC (Redundant Disk Array Controller) circuit. 选用一种具有I2C总线的型号,4片可编程数字电位器与FPGA通过I2C总线相连,每个电位器具有唯一的地址编码,可实现FPGA分别对其编程。 I2C bus having a selected model, four programmable digital potentiometer is connected to the FPGA via I2C bus, each potentiometer having a unique address code, respectively, may be implemented on FPGA programming. 非易失性存储器用以存储控制信号和可编程数字电位器的抽头位置。 Nonvolatile memory for storing control signals and a programmable digital potentiometer wiper position.

[0049] 本实施例亮度可自动化校准的CIS电路驱动模块上的可编程数字电位器,选取可调最小单位,具有256抽头的IK Ω电位器,最小单位为3.9Ω。 [0049] The present embodiment programmable digital potentiometer according to brightness automated calibration circuit driving the CIS module, select the smallest adjustable unit 256 has a IK Ω potentiometer taps, the minimum unit of 3.9Ω. 当可调范围和最小可调单位均选取合适的情况下,可提高调整精度,最终实现亮度自动化校准的目标。 In the case where the adjustable range and the minimum select the appropriate units are adjustable, the adjustment accuracy can be improved, luminance ultimate goal of automated calibration.

[0050] 本发明具有实现简单,成本低,自动化程度高等优点,应用范围广,除了金融设备领域,也应用于其他需要用CIS进行图像采集的行业。 [0050] The present invention has a simple, low cost, high degree of automation, a wide range of applications, in addition to the field of financial devices, is also applicable to other needs of the industry for image acquisition with CIS.

[0051] 上述实施例仅为本发明的优选例,并不用来限制本发明,凡在本发明的原则之内,所做的任何等同替代、修改和变化,均在本发明的保护范围之内。 [0051] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the present invention, all within the principles of the present invention, any equivalent alternatives, modifications and variations made are within the scope of the present invention .

Claims (3)

  1. 1.一种可自动校准亮度的点验钞机,由机体、点钞装置、验钞装置、电机、控制电路组成,其特征在于:控制电路包括数字信号处理芯片(DSP)、现场可编程门阵列(FPGA)、多通道增强型场效应管、可编程数字电位器和模数转换芯片(AD芯片);DSP和FPGA通过外部存储器接口(EMIF)相连;所述多通道增强型场效应管与FPGA的通用I/O 口相连;所述可编程数字电位器串联在多通道增强型场效应管和接触式图像传感器(CIS)之间;所述AD芯片输入端与CIS信号输出端连接,所述AD芯片输出端与FPGA通过通用I/O 口连接;所述可编程数字电位器通过I2C总线或SPI总线与FPGA相连;FPGA提供时序驱动CIS工作,CIS输出模拟信号通过AD芯片的处理将模拟信号转换成数字信号,将所述数字信号存储到FPGA内部RAM中,然后传输给DSP,DSP计算当前基准纸张图像灰度值的特征值,将所述特征值与事先设定 1. An automatic calibration luminance point detectors, by the body, Counting apparatus, paper money, motor, control circuit, wherein: the control circuit comprises a digital signal processing chip (DSP), field programmable gate arrays (FPGA), a multi-channel enhancement type field effect transistor, and a programmable digital potentiometer chip analog to digital converter (AD chips); the DSP and the FPGA are connected via the external memory interface (the EMIF); the multi-channel enhancement type field effect transistor and FPGA general purpose I / O port is connected; said programmable digital potentiometer in series between a multi-channel enhancement type field effect transistor and a contact image sensor (CIS); the AD chip input terminal and an output terminal connected to the signal CIS, the AD FPGA chip output terminal connected through a common I / O port; programmable digital potentiometer connected to the I2C bus or SPI bus and FPGA; FPGA provides timing driven work CIS, CIS output analog signal processing chip analog signal AD into a digital signal, said digital signal stored in the FPGA internal RAM and then transmitted to the DSP, DSP calculating a current value of the reference image gray paper characteristic values, the characteristic value set in advance 的阈值比较,如果特征值在以阈值为中心的有限区域内,校准成功;如果特征值不在以阈值为中心的有限区域内,则需要调理可编程数字电位器,FPGA通过I2C总线或SPI总线对可编程数字电位器进行编程,控制可编程数字电位器,达到调节电阻的目的。 The threshold comparison, if the characteristic value in a limited area to a threshold value being the center, the calibration is successful; if the feature value is not in a limited area threshold value being the center, it is necessary conditioning programmable digital potentiometer, FPGA I2C bus or SPI bus programming programmable digital potentiometer, to control a programmable digital potentiometer, the resistance adjustment purposes.
  2. 2.根据权利要求1所述的可自动校准亮度的点验钞机,其特征在于:两或多片可编程数字电位器共用一条I2C总线或SPI总线,通过地址编码选定其中一片进行编程。 2. The auto-calibration may be according to claim 1 luminance point detectors, wherein: two or more sheets of a programmable digital potentiometer common I2C bus or SPI bus, an address code by which the selected program.
  3. 3.根据权利要求1所述的可自动校准亮度的点验钞机,其特征在于:多通道增强型场效应管包括两个以上通道增强型场效应管。 The bill validator of claim 1 point calibration can be automatically luminance claim, wherein: the multi-channel enhancement type field effect transistor comprises two or more channel enhancement type field effect transistor.
CN 201410144126 2014-04-10 2014-04-10 Luminance point automatic calibration bill validator CN103927814B (en)

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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2249925Y (en) * 1996-01-08 1997-03-19 党治平 Multifunctional forge identifier with TV display for microscopic point and line structure of patterns
WO2000026861A1 (en) * 1998-10-29 2000-05-11 De La Rue International Limited Method and system for recognition of currency by denomination
US6078683A (en) * 1997-11-20 2000-06-20 De La Rue, Inc. Method and system for recognition of currency by denomination
WO2008081183A1 (en) * 2007-01-05 2008-07-10 De La Rue International Limited Method of monitoring a sequence of documents
CN102568081A (en) * 2012-01-12 2012-07-11 浙江大学 Image acquisition and processing method and device of paper money discriminator
CN202433978U (en) * 2012-02-24 2012-09-12 湖南丰汇银佳科技有限公司 Paper money authentication device based on spectral analysis technology
CN102855680A (en) * 2011-06-28 2013-01-02 新昌县七星街道兰新科技咨询服务部 Technology and method for singlechip to be used for identifying image and text of paper money
CN202694451U (en) * 2012-07-24 2013-01-23 黑龙江科技学院 Multi-light source high-speed banknote image capturing and processing circuit
CN203882379U (en) * 2014-04-10 2014-10-15 尤新革 Currency counting and detecting machine with automatic brightness calibration function

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2249925Y (en) * 1996-01-08 1997-03-19 党治平 Multifunctional forge identifier with TV display for microscopic point and line structure of patterns
US6078683A (en) * 1997-11-20 2000-06-20 De La Rue, Inc. Method and system for recognition of currency by denomination
WO2000026861A1 (en) * 1998-10-29 2000-05-11 De La Rue International Limited Method and system for recognition of currency by denomination
WO2008081183A1 (en) * 2007-01-05 2008-07-10 De La Rue International Limited Method of monitoring a sequence of documents
CN102855680A (en) * 2011-06-28 2013-01-02 新昌县七星街道兰新科技咨询服务部 Technology and method for singlechip to be used for identifying image and text of paper money
CN102568081A (en) * 2012-01-12 2012-07-11 浙江大学 Image acquisition and processing method and device of paper money discriminator
CN202433978U (en) * 2012-02-24 2012-09-12 湖南丰汇银佳科技有限公司 Paper money authentication device based on spectral analysis technology
CN202694451U (en) * 2012-07-24 2013-01-23 黑龙江科技学院 Multi-light source high-speed banknote image capturing and processing circuit
CN203882379U (en) * 2014-04-10 2014-10-15 尤新革 Currency counting and detecting machine with automatic brightness calibration function

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