CN103872137A - 增强型、耗尽型和电流感应集成vdmos功率器件 - Google Patents
增强型、耗尽型和电流感应集成vdmos功率器件 Download PDFInfo
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Abstract
本发明涉及一种增强型、耗尽型和电流感应集成VDMOS功率器件，包括N型衬底，所述N型衬底上设置有N型外延层，其特征在于：所述N型外延层上设置有增强型VDMOS、耗尽型VDMOS和电流感应VDMOS，且它们之间设有隔离结构；本发明将三个VDMOS器件集成在一起，应用组合灵活多样，可用于LED驱动电源、电源适配器、充电器等电路中，不仅有利于系统集成和小型化，而且具有成本低，制成控制简单的优点；本发明在三个VDMOS器件之间采用隔离结构，能有效防止器件之间穿通。本发明具有兼容性好、可靠性高、制造成本低、易产业化等特点。
Description
技术领域
本发明涉及 VDMOS功率器件技术领域，特别是一种增强型、耗尽型和电流感应集成VDMOS功率器件。
背景技术
垂直双扩散金属氧化物场效应器件VDMOS包括了增强型和耗尽型，它们具有开关特性好、功耗小等优点;此外还有利用该垂直双扩散金属氧化物场效应器件设计成电流感应功率MOSFET（SENSFET），电流感应功率MOSFET可以实现比其它方案更高的效率、更快的负载电流瞬间响应和更低的系统成本。因此VDMOS功率器件在LED驱动电源、充电器、电源适配器等产品上得到广泛使用，但是现有的垂直双扩散金属氧化物场效应器件在这些产品中都是独立封装，这样不仅占用面积大，而且制造工艺复杂，成本高。然而随着电子器件集成技术的发展，各自独立封装已经阻碍了产品小型化，因此，怎样将增强型、耗尽型和电流感应型VDMOS通过集成技术集成成一个器件，并能保证器件的稳定性、可靠性是市场的需求。
发明内容
本发明的目的是提供一种增强型、耗尽型和电流感应集成VDMOS功率器件，能有效降低生产成本，更有利系统的集成和小型化。
本发明采用以下方案实现：一种增强型、耗尽型和电流感应集成VDMOS功率器件，包括N型衬底，所述N型衬底上设置有N型外延层，其特征在于：所述N型外延层上设置有增强型VDMOS、耗尽型VDMOS、电流感应VDMOS和两个隔离结构，其中三类VDMOS器件共用漏极，增强型VDMOS和电流感应VDMOS共用栅极，所述隔离结构分别设置于所述增强型VDMOS、耗尽型VDMOS和电流感应VDMOS的源极之间。
在本发明一实施例中，所述增强型VDMOS的栅极和电流感应VDMOS的栅极通过金属共同连接到共用栅极；
在本发明一实施例中，所述隔离结构包括多晶硅场板，多晶硅场板下的N型外延上还设置有浮空P阱，浮空P阱位于P阱之间，所述多晶硅场板位于P阱的上端且向浮空P阱方向延伸，同时和浮空P阱有交叠；所述多晶硅场板被二氧化硅介质层所覆盖，所述多晶硅场板下设置有栅氧化层和场氧化层。
在本发明一实施例中，所述的多晶硅场板为两块，且为Z字形。
在本发明一实施例中，所述的增强型VDMOS和电流感应VDMOS结构相同，均包括设置在所述N型外延层中的两个P阱；所述P阱设置有相互邻接的n+源区和p+欧姆接触区；所述的P阱上设置有多晶硅栅，所述多晶硅栅下表面设置有栅氧化层，所述多晶硅栅覆盖有二氧化硅介质层，所述的二氧化硅介质层上覆盖有金属层。
在本发明一实施例中，所述的耗尽型VDMOS包括设置在所述N型外延层中的两个P阱；所述P阱设置有相互邻接的n+源区和p+欧姆接触区；所述的P阱上设置有耗尽层；所述耗尽层上设置有多晶硅栅，所述多晶硅栅下表面设置有栅氧化层，所述多晶硅栅覆盖有二氧化硅介质层，所述的二氧化硅介质层上覆盖有金属层。
在本发明一实施例中，所述的耗尽型VDMOS和电流感应VDMOS版图能位于增强型VDMOS版图内部或者外部。
本发明的有益效果是：本发明将三个VDMOS器件集成在一起，不仅应用灵活多样，可独立或者组合使用，更有利于系统集成和小型化，具有成本低，制成控制简单等优点；此外，本发明在三个VDMOS器件之间采用隔离结构，能有效防止器件之间穿通。本发明具有兼容性好、可靠性高、制造成本低 、易产业化等特点。
附图说明
图1是本发明实施例结构示意图。
图2是本发明另一实施例版图分布示意图。
其中：1为漏极金属；2为N型衬底；3为耗尽型VDMOS；4为隔离结构；5为增强型VDMOS；6为电流感应VDMOS；7为n+源区；8为p+欧姆接触区；9为多晶硅栅；10为二氧化硅介质保护层；11为金属层；12为浮空P阱；13为P阱；14为N型外延层。15为耗尽层；16为栅氧化层；17场氧化层，18为多晶硅场板，19为耗尽管栅极PAD,20为耗尽管源极PAD,21为增强管和电流感应管共用栅极PAD，22为增强管源极PAD,23为电流管源极PAD。
具体实施方式
以下结合附图及实施例对本发明做进一步说明。
如图1所示，本实施例提供一种增强型、耗尽型和电流感应集成VDMOS功率器件，包括N型衬底2，所述N型衬底2上设置有N型外延层14，其特征在于：所述N型外延层14上设置有增强型VDMOS5、耗尽型VDMOS3、电流感应VDMOS6和两个隔离结构4，其中三类VDMOS器件共用漏极，增强型VDMOS和电流感应VDMOS共用栅极，所述隔离结构4分别设置于所述增强型VDMOS、耗尽型VDMOS和电流感应VDMOS的源极之间。所述增强型VDMOS的栅极和电流感应VDMOS的栅极通过金属共同连接到共用栅极；
请继续参见图1，在本发明一实施例中，所述隔离结构4包括多晶硅场板18，多晶硅场板18下的N型外延上还设置有浮空P阱12，浮空P阱12位于P阱13之间，所述多晶硅场板18位于P阱13的上端且向浮空P阱12方向延伸，同时和浮空P阱12有交叠；所述多晶硅场板18被二氧化硅介质层10所覆盖，所述多晶硅场板18下表面设置有栅氧化层16和场氧化层17。所述的多晶硅场板18为两块，且为Z字形。
要说明的是，本实施例中，所述的增强型VDMOS5和电流感应VDMOS6结构相同，请继续参见图1，该增强型VDMOS和电流感应VDMOS均包括设置在所述N型外延层14中的两个P阱13；所述P阱13设置有相互邻接的n+源区7和p+欧姆接触区8；所述的P阱上设置有多晶硅栅9，所述多晶硅栅9下表面设置有栅氧化层16，所述多晶硅栅9覆盖有二氧化硅介质层10，所述的二氧化硅介质层上覆盖有金属层11。所述的耗尽型VDMOS3包括设置在所述N型外延层14中的两个P阱13；所述P阱13设置有相互邻接的n+源区7和p+欧姆接触区8；所述的P阱上设置有耗尽层15；所述耗尽层15上设置有多晶硅栅9，所述多晶硅栅下表面设置有栅氧化层16，所述多晶硅栅9覆盖有二氧化硅介质层10，所述的二氧化硅介质层10上覆盖有金属层11。
请参见图2，图2中，所述的耗尽型VMDOS和电流感应VDMOS版图位于增强型VDMOS内部，但并不以此为限，也可以位于外部。
为了让一般技术人员更好的区别本发明与现有技术。下面对本发明器件的制作工艺做进一步说明。
该集成增强型、耗尽型和电流感应VDMOS功率器件采用N（100）掺锑衬底，其主要制作工艺包括：
1、场氧化：芯片整片氧化，氧化层厚度为10000~12000 
，
2、有源区光刻，腐蚀：将片内要形成增强管、耗尽管和电流感应管的区域以及形成高压终端的区域打开，将这些区域的氧化层去掉；
3、JFET注入，退火：整片注入，由于场区厚氧化层的存在，构成自对准注入，只有有源区的位置被注入，能量80kev~100kev，注入剂量8E11-1.2E12cm-2，杂质类型为磷；退火条件1150℃氮氧气（氧含量2.7%）120分钟；
4、P阱well光刻，注入，退火推结深：在增强管、和耗尽管、电流感应管和高压终端的区域注入区域，注入能量70kev~90kev；注入剂量2.6E13~3.2E13；杂质类型为硼，退火条件1150℃氮氧（氧含量1.2%）气120分钟；
5、耗尽层光刻，注入：在形成耗尽管的区域注入，注入能量130kev~150kev；注入剂量1.6~2.0E12；杂质类型为砷；
6、栅氧化：整片氧化，在增强、耗尽管和电流感应管的区域氧厚度达950~1050 
；
7、多晶硅栅（包括多晶硅场板）淀积、掺杂，光刻，刻蚀；栅氧后应立刻进炉管进行多晶淀积，以免表面沾污，多晶淀积厚度5000~6000 
；
8、P+光刻，注入，退火：在增强管、耗尽管、电流感应管以及高压终端的位置注入，注入能量60kev~80kev；注入剂量1.0E15~1.2E15，杂质类型为硼，退火条件1100℃氮气30分钟；增加欧姆接触的良好性，抑制寄生NPN管开启；
9、源极N+光刻，注入，退火：在增强管、耗尽管和电流感应管区域内，要形成VDMOS的源极区域做N+，注入能量80~100kev；注入剂量4.5E15~5.5E15；杂质类型为砷；
10、接触孔光刻，刻蚀：在增强管、耗尽管、电流感应管以及多晶栅极上，开出铝接触用的接触孔；
11、蒸铝，腐蚀铝：整片蒸铝，铝厚4μm，厚铝可以提高电流能力和可靠性，然后腐蚀掉有VDMOS源区和多晶栅极外的铝；
12、压点PAD刻蚀：在增强管、耗尽管和电流感应的栅极和源极上，开出封装时用来金丝焊接的区域。
较佳的，上述采用的N（100）掺锑衬底的VDMOS材料片，电阻率小于0.01Ω·CM，外延厚度为50~52μm，外延电阻率23Ω·CM。
以上所述仅为本发明的较佳实施例，凡依本发明申请专利范围所做的均等变化与修饰，皆应属本发明的涵盖范围。
Claims (7)
1.一种增强型、耗尽型和电流感应集成VDMOS功率器件，包括N型衬底，所述N型衬底上设置有N型外延层，其特征在于：所述N型外延层上设置有增强型VDMOS、耗尽型VDMOS、电流感应VDMOS和隔离结构，其中三类VDMOS器件共用漏极，增强型VDMOS和电流感应VDMOS共用栅极，所述隔离结构分别设置于所述增强型VDMOS、耗尽型VDMOS和电流感应VDMOS的源极之间。
2.根据权利要求1所述的增强型、耗尽型和电流感应集成VDMOS功率器件，其特征在于：所述增强型VDMOS的栅极和电流感应VDMOS的栅极通过金属共同连接到共用栅极。
3.根据权利要求1所述的增强型、耗尽型和电流感应集成VDMOS功率器件，其特征在于：所述隔离结构包括多晶硅场板，多晶硅场板下的N型外延上还设置有浮空P阱，浮空P阱位于P阱之间，所述多晶硅场板位于P阱的上端且向浮空P阱方向延伸，同时和浮空P阱有交叠；所述的多晶硅场板被二氧化硅介质所覆盖，所述多晶硅场板下设置有栅氧化层和场氧化层。
4.根据权利要求3所述的增强型、耗尽型和电流感应集成VDMOS功率器件，其特征在于：所述的多晶硅场板为两块，且为Z字形。
5.根据权利要求1所述的增强型、耗尽型和电流感应集成VDMOS功率器件，其特征在于：所述的增强型VDMOS和电流感应VDMOS结构相同，均包括设置在所述N型外延层中的两个P阱；所述P阱设置有相互邻接的n+源区和p+欧姆接触区；所述的P阱上设置有多晶硅栅，所述多晶硅栅下表面设置有栅氧化层，所述多晶硅栅覆盖有二氧化硅介质层，所述的二氧化硅介质层上覆盖有金属层。
6.根据权利要求1所述的增强型、耗尽型和电流感应集成VDMOS功率器件，其特征在于：所述的耗尽型VDMOS包括设置在所述N型外延层中的两个P阱；所述P阱设置有相互邻接的n+源区和p+欧姆接触区；所述的P阱上设置有耗尽层；所述耗尽层上设置有多晶硅栅，所述多晶硅栅下表面设置有栅氧化层，所述多晶硅栅覆盖有二氧化硅介质层，所述的二氧化硅介质层上覆盖有金属层。
7.根据权利要求1所述的增强型、耗尽型和电流感应集成VDMOS功率器件，其特征在于：所述的耗尽型VMDOS和电流感应VDMOS版图能位于增强型VDMOS版图内部或者外部。
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