CN103871480A - Memory perparing method, and memory controller and memory storage apparatus using the same - Google Patents
Memory perparing method, and memory controller and memory storage apparatus using the same Download PDFInfo
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- CN103871480A CN103871480A CN201310048377.XA CN201310048377A CN103871480A CN 103871480 A CN103871480 A CN 103871480A CN 201310048377 A CN201310048377 A CN 201310048377A CN 103871480 A CN103871480 A CN 103871480A
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Abstract
A memory repairing method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus are provided. The method includes monitoring a wear degree of the rewritable non-volatile memory module; determining whether the wear degree of the rewritable non-volatile memory module is larger than a threshold; and heating the rewritable non-volatile memory module such that the temperature of the rewritable non-volatile memory module lies in between 100 DEG C. and 600 DEG C. if the wear degree of the rewritable non-volatile memory module is larger than the threshold. Accordingly, deteriorated memory cells in the rewritable non-volatile memory module can be repaired, thereby preventing data loss.
Description
Technical field
The invention relates to a kind of storage repairing method, Memory Controller and memorizer memory devices.Background technology
Digital camera, mobile phone and MP3 are very rapid in growth over the years, and consumer is also increased rapidly to the demand of storing media.Because duplicative nonvolatile memory (rewritable non-volatilememory) has that data are non-volatile, the characteristic such as little, the machinery-free structure of power saving, volume, read or write speed be fast, be suitable for most portable type electronic product, for example notebook computer.Solid state hard disc is exactly a kind of storage device using flash memory as storing media.Therefore, flash memory industry becomes a ring quite popular in electronic industry in recent years.
Fig. 1 is the schematic diagram of the flash memory component shown in prior art.
Please refer to Fig. 1, flash memory component 1 comprises electric charge capture layer (charge traping layer) 2 for stored electrons, for executing biased control grid (Control Gate) 3, tunneling oxide layer (Tunnel Oxide) 4 and dielectric layers between polycrystal silicon (Interpoly Dielectric) 5.In the time wanting data writing to flash memory component 1, can, by the critical voltage with change flash memory component 1 by electronic injection electric charge capture layer 2, define thus the high low state of numerical digit of flash memory component 1, and realize the function of storage data.At this, inject electronics to the process of electric charge capture layer 2 and be called sequencing.Otherwise, in the time that wish removes stored data, by institute's injected electrons is removed from electric charge capture layer 2, can make flash memory component 1 revert to not by the state before sequencing.
Write with erase process in, flash memory component 1 can cause wearing and tearing with removing along with the injection repeatedly of electronics, causes electronics writing speed to increase and causes critical voltage distribution to broaden.Therefore, after flash memory component 1 is by sequencing, cannot be correctly identified its storing state, and produce error bit.
Summary of the invention
The invention provides a kind of storage repairing method, Memory Controller and memorizer memory devices, can be by deteriorated memory cell reparation, to recover the storage capacity of storer.
The storage repairing method of exemplary embodiment of the present invention is for a duplicative nonvolatile memory module.This flash memory restorative procedure comprises the degree of wear of one of them part of monitoring this duplicative nonvolatile memory module; And when duplicative nonvolatile memory module this wherein the degree of wear of a part while being greater than threshold value, heat this one of them part of this duplicative nonvolatile memory module.
In one embodiment of this invention, the temperature of this one of them part of duplicative nonvolatile memory module can be heated between 100° centigrade between 600 degree Celsius.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises the first duplicative nonvolatile memory submodule group and the second duplicative nonvolatile memory submodule group, the first duplicative nonvolatile memory submodule group is to be formed by the first duplicative nonvolatile memory chip and primary heater encapsulation, and the second duplicative nonvolatile memory submodule group is to be formed by the second duplicative nonvolatile memory chip and secondary heater encapsulation.The step of wherein monitoring the degree of wear of duplicative nonvolatile memory module comprises the degree of wear value that records the first duplicative nonvolatile memory chip.Wherein, in the time that this degree of wear of duplicative nonvolatile memory module is greater than threshold value, the step of heating duplicative nonvolatile memory module comprises: whether the degree of wear value that judges the first duplicative nonvolatile memory chip is greater than threshold value; If when the degree of wear value of the first duplicative nonvolatile memory chip is greater than threshold value, the data Replica being stored on the first duplicative nonvolatile memory chip is heated to the first duplicative nonvolatile memory chip in the second duplicative nonvolatile memory chip and by primary heater, and wherein the first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time; And the data that copy to the second duplicative nonvolatile memory chip are restored in the first duplicative nonvolatile memory chip.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises the first duplicative nonvolatile memory submodule group, and the first duplicative nonvolatile memory submodule group is to be formed by the first duplicative nonvolatile memory chip and primary heater encapsulation.The step of wherein monitoring the degree of wear of duplicative nonvolatile memory module comprises the degree of wear value that records the first duplicative nonvolatile memory chip.Wherein, in the time that the degree of wear of duplicative nonvolatile memory module is greater than threshold value, the step of heating duplicative nonvolatile memory module comprises: whether the degree of wear value that judges the first duplicative nonvolatile memory chip is greater than threshold value; If when the degree of wear value of the first duplicative nonvolatile memory chip is greater than threshold value, the data Replica being stored on the first duplicative nonvolatile memory chip is heated to the first duplicative nonvolatile memory chip in memory buffer and by primary heater, and wherein the first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time; And these data that copy to memory buffer are restored in the first duplicative nonvolatile memory chip.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises that multiple entity erase units and each entity erase unit dispose a heater circuit.The step of wherein monitoring the degree of wear of duplicative nonvolatile memory module comprises the degree of wear value that records each entity erase unit.Wherein in the time that the degree of wear value of duplicative nonvolatile memory module is greater than threshold value, the step of heating duplicative nonvolatile memory module comprises: whether the degree of wear value that judges the first instance erase unit among these a little entity erase units is greater than threshold value; If when the degree of wear value of first instance erase unit is greater than threshold value, to be stored in data Replica on first instance erase unit in the second instance erase unit among these a little entity erase units and by the heater circuit heating first instance erase unit of corresponding first instance erase unit, wherein first instance erase unit can be heated between 100° centigrade between 600 degree Celsius and maintain a Preset Time; And the data that copy to second instance erase unit are restored in first instance erase unit.
In one embodiment of this invention, the degree of wear value of the first above-mentioned duplicative nonvolatile memory chip be according to the erasing times of the first duplicative nonvolatile memory chip, write indegree, error bit number, error bit ratio and reading times at least one of them calculates.
In one embodiment of this invention, the degree of wear value of above-mentioned first instance erase unit be according to the erasing times of first instance erase unit, write indegree, error bit number, error bit ratio and reading times at least one of them calculates.
In one embodiment of this invention, one of them part of above-mentioned duplicative nonvolatile memory module is a memory crystal grain (die) or a memory block face (plane).
The Memory Controller of exemplary embodiment of the present invention is used for controlling duplicative nonvolatile memory module and comprises host interface, memory interface, memory buffer and memory management circuitry.Host interface is in order to be electrically connected to host computer system, and memory interface is in order to be electrically connected to duplicative nonvolatile memory module, and memory management circuitry is electrically connected to host interface, memory interface and memory buffer.Memory management circuitry is in order to monitor the degree of wear of one of them part of duplicative nonvolatile memory module.In the time that the degree of wear of this one of them part of this duplicative nonvolatile memory module is greater than threshold value, this one of them part of memory management circuitry instruction heating duplicative nonvolatile memory module.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises the first duplicative nonvolatile memory submodule group and the second duplicative nonvolatile memory submodule group, the first duplicative nonvolatile memory submodule group is to be formed by the first duplicative nonvolatile memory chip and primary heater encapsulation, and the second duplicative nonvolatile memory submodule group is to be formed by the second duplicative nonvolatile memory chip and secondary heater encapsulation.In the running of the degree of wear of at least a portion of this duplicative nonvolatile memory module of above-mentioned monitoring, memory management circuitry records the degree of wear value of the first duplicative nonvolatile memory chip.In the time that above-mentioned at least one of them the degree of wear when duplicative nonvolatile memory module is greater than threshold value, this of heating duplicative nonvolatile memory module is at least in one of them running, and memory management circuitry can judge whether this degree of wear value of the first duplicative nonvolatile memory chip is greater than this threshold value.If when the degree of wear value of the first duplicative nonvolatile memory chip is greater than threshold value, memory management circuitry can will be stored in data Replica on the first duplicative nonvolatile memory chip in the second duplicative nonvolatile memory chip, heat the first duplicative nonvolatile memory chip by primary heater, and the data that copy to the second duplicative nonvolatile memory chip are restored in the first duplicative nonvolatile memory chip, the first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises the first duplicative nonvolatile memory submodule group, and the first duplicative nonvolatile memory submodule group is to be formed by the first duplicative nonvolatile memory chip and primary heater encapsulation.In the running of the degree of wear of at least a portion of above-mentioned monitoring duplicative nonvolatile memory module, memory management circuitry records the degree of wear value of the first duplicative nonvolatile memory chip.In the time that above-mentioned at least one of them the degree of wear when duplicative nonvolatile memory module is greater than threshold value, in at least one of them the running of heating duplicative nonvolatile memory module, memory management circuitry can judge whether the degree of wear value of the first duplicative nonvolatile memory chip is greater than threshold value, if when wherein the degree of wear value of the first duplicative nonvolatile memory chip is greater than this threshold value, memory management circuitry can will be stored in data Replica on the first duplicative nonvolatile memory chip in memory buffer, heat the first duplicative nonvolatile memory chip by primary heater, and these data that copy to memory buffer are restored in the first duplicative nonvolatile memory chip, wherein the first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises that multiple entity erase units and each entity erase unit dispose a heater circuit.In the running of the degree of wear of monitoring this duplicative nonvolatile memory module, memory management circuitry can record the degree of wear value of each entity erase unit.In the time that above-mentioned at least one of them the degree of wear when duplicative nonvolatile memory module is greater than threshold value, in at least one of them the running of heating duplicative nonvolatile memory module, memory management circuitry can judge whether the degree of wear value of the first instance erase unit among these a little entity erase units is greater than threshold value, if when wherein the degree of wear value of first instance erase unit is greater than this threshold value, memory management circuitry can will be stored in data Replica on first instance erase unit in the second instance erase unit among these a little entity erase units, by the heater circuit heating first instance erase unit of corresponding this first instance erase unit, and the data that copy to second instance erase unit are restored in first instance erase unit, wherein first instance erase unit can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
The memorizer memory devices of exemplary embodiment of the present invention comprises connector, duplicative nonvolatile memory module and Memory Controller.Connector is in order to be electrically connected to host computer system.Memory Controller has memory buffer and is electrically connected to connector and duplicative nonvolatile memory module.In addition, Memory Controller is in order to monitor the degree of wear of one of them part of duplicative nonvolatile memory module.In the time that the degree of wear of one of them part of duplicative nonvolatile memory module is greater than threshold value, one of them part of this duplicative nonvolatile memory module of Memory Controller instruction heating.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises the first duplicative nonvolatile memory submodule group and the second duplicative nonvolatile memory submodule group, the first duplicative nonvolatile memory submodule group is to be formed by the first duplicative nonvolatile memory chip and primary heater encapsulation, and the second duplicative nonvolatile memory submodule group is to be formed by the second duplicative nonvolatile memory chip and secondary heater encapsulation.In the running of the degree of wear of at least a portion of this duplicative nonvolatile memory module of above-mentioned monitoring, memory management circuitry records the degree of wear value of the first duplicative nonvolatile memory chip.In the time that above-mentioned at least one of them the degree of wear when duplicative nonvolatile memory module is greater than threshold value, this of heating duplicative nonvolatile memory module is at least in one of them running, and Memory Controller can judge whether this degree of wear value of the first duplicative nonvolatile memory chip is greater than this threshold value.If when the degree of wear value of the first duplicative nonvolatile memory chip is greater than threshold value, Memory Controller can will be stored in data Replica on the first duplicative nonvolatile memory chip in the second duplicative nonvolatile memory chip, heat the first duplicative nonvolatile memory chip by primary heater, and the data that copy to the second duplicative nonvolatile memory chip are restored in the first duplicative nonvolatile memory chip, the first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises the first duplicative nonvolatile memory submodule group, and the first duplicative nonvolatile memory submodule group is to be formed by the first duplicative nonvolatile memory chip and primary heater encapsulation.In the running of the degree of wear of at least a portion of above-mentioned monitoring duplicative nonvolatile memory module, Memory Controller records the degree of wear value of the first duplicative nonvolatile memory chip.In the time that above-mentioned at least one of them the degree of wear when duplicative nonvolatile memory module is greater than threshold value, in at least one of them the running of heating duplicative nonvolatile memory module, Memory Controller can judge whether the degree of wear value of the first duplicative nonvolatile memory chip is greater than threshold value, if when wherein the degree of wear value of the first duplicative nonvolatile memory chip is greater than this threshold value, Memory Controller can will be stored in data Replica on the first duplicative nonvolatile memory chip in memory buffer, heat the first duplicative nonvolatile memory chip by primary heater, and these data that copy to memory buffer are restored in the first duplicative nonvolatile memory chip, wherein the first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
In one embodiment of this invention, above-mentioned duplicative nonvolatile memory module comprises that multiple entity erase units and each entity erase unit dispose a heater circuit.In the running of the degree of wear of monitoring this duplicative nonvolatile memory module, Memory Controller can record the degree of wear value of each entity erase unit.In the time that above-mentioned at least one of them the degree of wear when duplicative nonvolatile memory module is greater than threshold value, in at least one of them the running of heating duplicative nonvolatile memory module, Memory Controller can judge whether the degree of wear value of the first instance erase unit among these a little entity erase units is greater than threshold value, if when wherein the degree of wear value of first instance erase unit is greater than this threshold value, Memory Controller can will be stored in data Replica on first instance erase unit in the second instance erase unit among these a little entity erase units, by the heater circuit heating first instance erase unit of corresponding this first instance erase unit, and the data that copy to second instance erase unit are restored in first instance erase unit, wherein first instance erase unit can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
Based on above-mentioned, storage repairing method, Memory Controller and the memorizer memory devices that this example is implemented can be in good time by the reparation of deteriorated duplicative nonvolatile memory module, to recover the data hold capacity of memory cell, storage data reliably thus.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Brief description of the drawings
Fig. 1 is the schematic diagram of the flash memory component shown in prior art;
Fig. 2 is the process flow diagram of the storage repairing method shown in exemplary embodiment of the present invention;
Fig. 3 is the host computer system shown in the first exemplary embodiment and memorizer memory devices;
Fig. 4 is the schematic diagram of the computer shown in an exemplary embodiment, input/output device and memorizer memory devices;
Fig. 5 is the schematic diagram of the host computer system shown in an exemplary embodiment and memorizer memory devices;
Fig. 6 is the summary calcspar of the memorizer memory devices shown in the first exemplary embodiment;
Fig. 7 A～7B is the encapsulation duplicative nonvolatile memory chip shown in the present invention's the first exemplary embodiment and the schematic diagram of well heater;
Fig. 7 C～7D is the encapsulation duplicative nonvolatile memory chip shown in another exemplary embodiment of the present invention and the schematic diagram of well heater;
Fig. 8 is the summary calcspar of the Memory Controller shown in the first exemplary embodiment;
Fig. 9 is the process flow diagram of the storage repairing method shown in the present invention's the first exemplary embodiment;
Figure 10 is the summary calcspar of the memorizer memory devices shown in the present invention's the second exemplary embodiment;
Figure 11 is the structural representation of the entity erase unit shown in the present invention's the second exemplary embodiment;
Figure 12 is the process flow diagram of the storage repairing method shown in the present invention's the first exemplary embodiment;
Figure 13 is the structural representation of the entity erase unit shown in another exemplary embodiment.
Description of reference numerals:
1: flash memory component;
2: electric charge capture layer;
3: control grid;
4: tunneling oxide layer;
5: dielectric layers between polycrystal silicon;
S1001, S1003, S1005: the step of storage repairing method;
1000: host computer system;
1100: computer;
1102: microprocessor;
1104: random access memory;
1106: input/output device;
1108: system bus;
1110: data transmission interface;
1202: mouse;
1204: keyboard;
1206: display;
1208: printer;
1212: portable disk;
1214: storage card;
1216: solid state hard disc;
1310: digital camera;
1312:SD card;
1314:MMC card;
1316: memory stick;
1318:CF card;
1320: embedded storage device;
100: memorizer memory devices;
102: connector;
104: Memory Controller;
106: duplicative nonvolatile memory module;
202: memory management circuitry;
206: memory interface;
252: memory buffer;
254: electric power management circuit;
256: bug check and correcting circuit;
900: memorizer memory devices;
906: duplicative nonvolatile memory module;
S901, S903, S905, S907, S909: the step of storage repairing method;
S1201, S1203, S1205, S1207, S1209: the step of storage repairing method.
Embodiment
Writing and wipe in operation, the part-structure of duplicative nonvolatile memory module (for example, tunneling oxide layer) may cause wearing and tearing with removing because of the injection repeatedly along with electronics, cause electronics writing speed to increase and cause critical voltage to distribute broadening.In order to recover the storage fiduciary level of duplicative nonvolatile memory module, if Fig. 2 is the process flow diagram of the storage repairing method shown in exemplary embodiment of the present invention, in an exemplary embodiment, the degree of wear of at least a portion of duplicative nonvolatile memory module can monitored (step S1001), and is judged whether exceed a threshold value (step S1003).If the degree of wear of this at least a portion of duplicative nonvolatile memory module is judged while exceeding this threshold value, this at least a portion (S1005) of heating duplicative nonvolatile memory module, with make duplicative nonvolatile memory module this at least a portion temperature increase between 100° centigrade between 600 degree Celsius.Below will and coordinate accompanying drawing to describe the present invention in detail with several exemplary embodiment.
The first exemplary embodiment
Generally speaking, memorizer memory devices (also claiming memory storage system) comprises duplicative nonvolatile memory module and controller (also claiming control circuit).Conventionally memorizer memory devices is to use together with host computer system, so that host computer system can write to data memorizer memory devices or reading out data from memorizer memory devices.
Fig. 3 is the host computer system shown in the first exemplary embodiment and memorizer memory devices.
Please refer to Fig. 3, host computer system 1000 generally comprises computer 1100 and I/O (input/output, I/O) device 1106.Computer 1100 comprises microprocessor 1102, random access memory (random access memory, RAM) 1104, system bus 1108 and data transmission interface 1110.Input/output device 1106 comprises as the mouse 1202 of Fig. 4, keyboard 1204, display 1206 and printer 1208.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Fig. 4, input/output device 1106 can more comprise other devices.
In embodiments of the present invention, memorizer memory devices 100 is to be electrically connected by data transmission interface 1110 and other elements of host computer system 1000.Data can be write to memorizer memory devices 100 or reading out data from memorizer memory devices 100 by microprocessor 1102, random access memory 1104 with the running of input/output device 1106.For example, memorizer memory devices 100 can be the duplicative non-volatile memory storage device of portable disk 1212, storage card 1214 or solid state hard disc (Solid State Drive, SSD) 1216 as shown in Figure 4 etc.
Generally speaking, host computer system 1000 is for can coordinate substantially any system with storage data with memorizer memory devices 100.Although in this exemplary embodiment, host computer system 1000 is to illustrate with computer system, but host computer system 1000 can be the systems such as digital camera, video camera, communicator, music player or video player in another exemplary embodiment of the present invention.For example, be digital camera (video camera) 1310 o'clock in host computer system, duplicative non-volatile memory storage device is its SD card 1312 using, mmc card 1314, memory stick (memory stick) 1316, CF card 1318 or embedded storage device 1320 (as shown in Figure 5).Embedded storage device 1320 comprises embedded multi-media card (Embedded MMC, eMMC).It is worth mentioning that, embedded multi-media card is to be directly electrically connected on the mainboard of host computer system.
Fig. 6 is the summary calcspar of the memorizer memory devices shown in the first exemplary embodiment.
Please refer to Fig. 6, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and duplicative nonvolatile memory module 106.
In this exemplary embodiment, connector 102 is to be applicable to USB (universal serial bus) (Universal Serial Bus, USB) standard.But, it must be appreciated, the invention is not restricted to this, connector 102 can be also to meet advanced annex arranged side by side (Parallel Advanced Technology Attachment, PATA) standard, Institute of Electrical and Electric Engineers (Institute of Electrical and Electronic Engineers, IEEE) 1394 standards, high-speed peripheral component connecting interface (Peripheral Component Interconnect Express, PCI Express) standard, safety digit (Secure Digital, SD) interface standard, advanced annex (the Serial Advanced Technology Attachment of sequence, SATA) standard, a hypervelocity generation (Ultra High Speed-I, UHS-I) interface standard, two generations of hypervelocity (Ultra High Speed-II, UHS-II) interface standard, memory stick (Memory Stick, MS) interface standard, Multi Media Card (Multi Media Card, MMC) interface standard, built-in multimedia memory card (Embedded Multimedia Card, eMMC) interface standard, general flash memory (Universal Flash Storage, UFS) interface standard, compact flash (Compact Flash, CF) interface standard, integrated driving electrical interface (Integrated Device Electronics, IDE) standard or other applicable standards.
Duplicative nonvolatile memory module 106 comprises the first duplicative nonvolatile memory submodule group 106a and the second duplicative nonvolatile memory submodule group 106b.The first duplicative nonvolatile memory submodule group 106a is formed by the first duplicative nonvolatile memory chip 106-1 and primary heater 108-1 encapsulation, and the second duplicative nonvolatile memory submodule group 106b is formed by the second duplicative nonvolatile memory chip 106-2 and secondary heater 108-2 encapsulation.
The first duplicative nonvolatile memory chip 106-1 and the second duplicative nonvolatile memory chip 106-2 are electrically connected to Memory Controller 104, and the data that write in order to store host computer system 1000.For example, the first duplicative nonvolatile memory chip 106-1 and the second duplicative nonvolatile memory chip 106-2 can be single-order memory cell (Single Level Cell, SLC) NAND type quick flashing, memory chip (, in a memory cell, can store the flash memory chip of 1 Bit data), multistage memory cell (Multi Level Cell, MLC) NAND type quick flashing, memory chip (, in a memory cell, can store the flash memory chip module of 2 Bit datas), Complex Order memory cell (Trinary Level Cell, TLC) NAND type flash memory chip (, in a memory cell, can store the flash memory chip of 3 Bit datas) or other there is the memory chip of identical characteristics.
Primary heater 108-1 and secondary heater 108-2 are electrically connected to Memory Controller 104 and respectively in order to heat the first duplicative nonvolatile memory chip 106-1 and the second duplicative nonvolatile memory chip 106-2.Specifically, primary heater 108-1 is that below (as shown in Figure 7 A) and the secondary heater 108-2 that is encapsulated in the first duplicative nonvolatile memory chip 106-1 is the below (as shown in Figure 7 B) that is encapsulated in the second duplicative nonvolatile memory chip 106-2.And primary heater 108-1 can be heated to the temperature of the first duplicative nonvolatile memory chip 106-1 between 100° centigrade and 600 degree Celsius and secondary heater 108-2 can be heated to the temperature of the second duplicative nonvolatile memory chip 106-2 between 100° centigrade and Celsius 600 is spent.For example, primary heater 108-1 can be heated to the temperature of the first duplicative nonvolatile memory chip 106-1 300 degree Celsius and secondary heater 108-2 can be heated to the temperature of the second duplicative nonvolatile memory chip 106-2 300 degree Celsius.It is worth mentioning that, although in this exemplary embodiment, well heater is the below that is encapsulated in duplicative nonvolatile memory chip, the invention is not restricted to this.For example, in another exemplary embodiment of the present invention, well heater is the top that is encapsulated in duplicative nonvolatile memory chip.In addition,, in further embodiment of this invention, the top of duplicative nonvolatile memory chip and below also can dispose well heater simultaneously.Moreover, in yet another embodiment of the invention, all configurable well heater of each side of duplicative nonvolatile memory chip.
In addition, it must be appreciated, although in this exemplary embodiment, it is that unit heats that well heater can be configured to whole duplicative nonvolatile memory chip, the invention is not restricted to this.For example; in another exemplary embodiment of the present invention; duplicative nonvolatile memory chip is that multiple memory crystal grain or memory block face form; and multiple well heaters can be configured respectively corresponding to these a little memory crystal grain or memory block face, to heat corresponding memory crystal grain or memory block face.
Fig. 8 is according to the summary calcspar of the shown Memory Controller of the first exemplary embodiment.It must be appreciated, the structure of the Memory Controller shown in Fig. 8 is only an example, and the present invention is not as limit.
Please refer to Figure 12, Memory Controller 104 comprises memory management circuitry 202, host interface 204 and memory interface 206.
In this exemplary embodiment, the steering order of memory management circuitry 202 is to carry out implementation with firmware pattern.For example, memory management circuitry 202 has microprocessor unit (not shown) and ROM (read-only memory) (not shown), and these a little steering orders are to be burned onto in this ROM (read-only memory).In the time that memorizer memory devices 100 operates, these a little steering orders can be carried out to carry out by microprocessor unit the runnings such as writing, read and wipe of data.
In another exemplary embodiment of the present invention, the steering order of memory management circuitry 202 also can for example be stored in, in the specific region (, being exclusively used in the system region of storage system data in memory module) of duplicative nonvolatile memory module 106 by program mode.In addition, memory management circuitry 202 has microprocessor unit (not shown), ROM (read-only memory) (not shown) and random access memory (not shown).Particularly, this ROM (read-only memory) has the code of driving, and in the time of Memory Controller 104 quilt intelligence, microprocessor unit can first be carried out this and drive code section that the steering order being stored in duplicative nonvolatile memory module 106 is loaded in the random access memory of memory management circuitry 202.Afterwards, microprocessor unit can turn round these a little steering orders to carry out the runnings such as writing, read and wipe of data.
In addition,, in another exemplary embodiment of the present invention, the steering order of memory management circuitry 202 also can a hardware pattern be carried out implementation.For example, memory management circuitry 202 comprises microcontroller, memory cell management circuit, storer write circuit, memory reading circuitry, memory erase circuit and data processing circuit.Memory cell management circuit, storer write circuit, memory reading circuitry, memory erase circuit and data processing circuit are to be electrically connected to microcontroller.Wherein, memory cell management circuit is in order to manage the entity erase unit of duplicative nonvolatile memory module 106; Storer write circuit writes instruction data are write in duplicative nonvolatile memory module 106 in order to duplicative nonvolatile memory module 106 is assigned; Memory reading circuitry is in order to assign reading command with reading out data from duplicative nonvolatile memory module 106 to duplicative nonvolatile memory module 106; Memory erase circuit is in order to assign erasing instruction so that data are wiped from duplicative nonvolatile memory module 106 to duplicative nonvolatile memory module 106; And data processing circuit is wanted the data that write to the data of duplicative nonvolatile memory module 106 and read from duplicative nonvolatile memory module 106 in order to processing.
In the present invention's one exemplary embodiment, Memory Controller 104 also comprises memory buffer 252, electric power management circuit 254 and bug check and correcting circuit 256.
Electric power management circuit 254 is to be electrically connected to memory management circuitry 202 and the power supply in order to control store storage device 100.
Bug check and correcting circuit 256 be electrically connected to memory management circuitry 202 and in order to execution error inspection and correction program to guarantee the correctness of data.In this exemplary embodiment, when memory management circuitry 202 receives while writing instruction from host computer system 1000, bug check can produce corresponding bug check and correcting code (Error Checking and Correcting Code for the corresponding data that this writes instruction with correcting circuit 256, ECC Code), and memory management circuitry 202 can write to corresponding these data that write instruction in duplicative nonvolatile memory module 106 with corresponding bug check and correcting code.Afterwards, when memory management circuitry 202 can read bug check corresponding to these data and correcting code when reading out data from duplicative nonvolatile memory module 106 simultaneously, and bug check and correcting circuit 256 can be according to this bug check and correcting code to read data execution error inspection and correction programs.Specifically, bug check and correcting circuit 256 can be designed to proofread and correct the error bit (hereinafter referred to as maximum correctable error bit number) of a number.For example, maximum correctable error bit number is 24.Be not more than at 24 o'clock if occur in the number of the error bit of read data, bug check and correcting circuit 256 just can correct back to correct value by error bit according to error-correcting code.Otherwise bug check and correcting circuit 256 will be returned the information that error recovery failure and memory management circuitry 202 can lose designation data and send host computer system 1000 to.
In exemplary embodiment of the present invention, Memory Controller 104 (or memory management circuitry 202) can be monitored the degree of wear of duplicative nonvolatile memory module 106, and repairs duplicative nonvolatile memory module 106.Specifically, in exemplary embodiment of the present invention, Memory Controller 104 (or memory management circuitry 202) can record the erasing times of duplicative nonvolatile memory chip with the degree of wear of identification duplicative nonvolatile memory module 106.In addition, Memory Controller 104 (or memory management circuitry 202) can judge whether the erasing times of duplicative nonvolatile memory chip is greater than a threshold value (hereinafter referred to as erasing times threshold value).If when the erasing times of duplicative nonvolatile memory chip is greater than erasing times threshold value, Memory Controller 104 (or memory management circuitry 202) can heat duplicative nonvolatile memory chip to repair the memory cell of duplicative nonvolatile memory chip by corresponding well heater.In this exemplary embodiment, in the time carrying out erasing instruction, the erasing times of duplicative nonvolatile memory chip can be added 1, and erasing times threshold value can be set according to the type of duplicative nonvolatile memory chip, to reflect whether the degree of wear of duplicative nonvolatile memory chip has reached the critical point that can affect data storing.
For example, if when the erasing times of the first duplicative nonvolatile memory chip 106-1 is greater than erasing times threshold value, Memory Controller 104 (or memory management circuitry 202) can will be stored in data Replica in the first duplicative nonvolatile memory chip 106-1 to the second duplicative nonvolatile memory chip 106-2, control heater 108-1 heats the first duplicative nonvolatile memory chip 106-1 to repair the memory cell of the first duplicative nonvolatile memory chip 106-1 and afterwards the data that copied to be returned to the first duplicative nonvolatile memory chip 106-1.
It must be appreciated, although in this exemplary embodiment, the erasing times of duplicative nonvolatile memory chip can be used for weighing the degree of wear of duplicative nonvolatile memory chip, the invention is not restricted to this.For example, the degree of wear of duplicative nonvolatile memory chip also can be weighed according to write indegree, error bit number, error bit ratio or the reading times of duplicative nonvolatile memory chip.Or the degree of wear of duplicative nonvolatile memory chip also can erasing times, at least wherein combination of two parameters write among the parameters such as indegree, error bit number, error bit ratio and reading times is calculated.
Fig. 9 is the process flow diagram of the storage repairing method shown in the present invention's the first exemplary embodiment.
Please refer to Fig. 9, in step S901, the erasing times of duplicative nonvolatile memory module (chip) can be recorded and monitor.
In step S903, whether the erasing times of duplicative nonvolatile memory module (chip) is greater than erasing times threshold value can be judged.
If when the erasing times of duplicative nonvolatile memory module (chip) is not more than erasing times threshold value, flow process can be returned to step S901 to continue monitoring.If when the erasing times of duplicative nonvolatile memory module (chip) is greater than erasing times threshold value, in step S905, the data that are stored in this duplicative nonvolatile memory module (chip) can be copied to a working area.For example, in step S905, the data in duplicative nonvolatile memory module (chip) can be copied to another duplicative nonvolatile memory module (chip), but the invention is not restricted to this.In another exemplary embodiment of the present invention, the data in duplicative nonvolatile memory module (chip) also can temporarily be copied in memory buffer 252 or other storage devices.
Afterwards, in step S907, duplicative nonvolatile memory chip can be heated, to make the temperature increase of duplicative nonvolatile memory chip to 100° centigrade between 600 degree Celsius.For example, Memory Controller 104 (or memory management circuitry 202) can be by duplicative nonvolatile memory chip encapsulates together therewith well heater (for example, primary heater 180-1) heat this duplicative nonvolatile memory chip, spend and continue one pre-defined period (for example, 20 minutes) so that the temperature of this duplicative nonvolatile memory chip reaches Celsius 300.
Afterwards, in step S909, the data that are stored in working area can be replicated back in this duplicative nonvolatile memory module (chip), and then, the flow process of Fig. 9 can be terminated.
The second exemplary embodiment
The memorizer memory devices of the structure of the memorizer memory devices of the second exemplary embodiment and the first exemplary embodiment is similar, and its difference is that in the second exemplary embodiment each entity erase unit of duplicative nonvolatile memory module all disposes heater circuit and Memory Controller (or memory management circuitry) can heat entity erase unit by these a little heater circuits.To the difference part of the second exemplary embodiment and the first exemplary embodiment be described by the element numbers of the first exemplary embodiment below.
Figure 10 is the summary calcspar of the memorizer memory devices shown in the present invention's the second exemplary embodiment.
Please refer to Figure 10, memorizer memory devices 900 comprises connector 102, Memory Controller 104 and duplicative nonvolatile memory module 906.
The data that duplicative nonvolatile memory module 906 is electrically connected to Memory Controller 104 and writes in order to store host computer system 1000.Duplicative nonvolatile memory module 906 has entity erase unit 304 (0)～304 (R).For example, entity erase unit 304 (0)～304 (R) can belong to same memory crystal grain or belong to different memory crystal grain.Each entity erase unit has respectively a plurality of entity sequencing unit, and the entity sequencing unit that belongs to same entity erase unit can be write independently and side by side be wiped.For example, each entity erase unit is made up of 128 entity sequencing unit.But, it must be appreciated, the invention is not restricted to this, each entity erase unit also can be made up of 64 entity sequencing unit, 256 entity sequencing unit or other arbitrarily individual entity sequencing unit.
In more detail, entity erase unit is the least unit of wiping.That is, the memory cell being wiped free of in the lump that each entity erase unit contains minimal amount.The minimum unit that entity sequencing unit is sequencing.The minimum unit that, entity sequencing unit is data writing.Each entity sequencing unit generally includes data bit district and redundancy ratio special zone.Data bit district comprises multiple entities access address in order to store user's data, and redundancy ratio special zone for example, in order to the data (, control information and error correcting code) of stocking system.In this exemplary embodiment, in the data bit district of each entity sequencing unit, can comprise 4 entity access addresses, and the size of an entity access address is 512 bit groups (byte).But, in other exemplary embodiment, in data bit district, also can comprise the more or less entity access address of number, the present invention does not limit size and the number of entity access address.For example, in an exemplary embodiment, entity erase unit is physical blocks, and entity sequencing unit is physical page or entity sector, but the present invention is not as limit.
In this exemplary embodiment, duplicative nonvolatile memory module 906 is TLC NAND type flash memory module, in a memory cell, can store at least 3 Bit datas.But, the invention is not restricted to this, also SLC NAND type flash memory module, MLC NAND type flash memory module, other flash memory modules or other have the memory module of identical characteristics to duplicative nonvolatile memory module 906.
Particularly, each entity erase unit 304 (0)～304 (R) has heater circuit.For example, as shown in figure 11, a heater circuit is to be configured on the multiple memory cell that form an entity erase unit.
In this exemplary embodiment, Memory Controller 104 (or memory management circuitry 202) can record the erasing times with the each entity erase unit of monitoring, if and the erasing times of one of them entity erase unit is while being greater than erasing times threshold value, Memory Controller 104 (or memory management circuitry 202) can heat this entity erase unit by corresponding heater circuit, the temperature that promotes thus this entity erase unit to 100° centigrade between 600 degree Celsius to repair deteriorated memory cell in this entity erase unit.
For example, if when the erasing times of entity erase unit 304 (0) is greater than erasing times threshold value, Memory Controller 104 (or memory management circuitry 202) can will be stored in data Replica to empty entity erase unit in entity erase unit 304 (0) (for example, entity erase unit 304 (R)) in, control is configured in heater circuit in entity erase unit 304 (0) and heats entity erase unit 304 (0) and will copy to afterwards entity erase unit 304 (R) and restore in entity erase unit 304 (0).
Figure 12 is the process flow diagram of the storage repairing method shown in the present invention's the second exemplary embodiment.
Please refer to Figure 12, in step S1201, record and the erasing times of monitoring each entity erase unit.
In step S1203, judge whether that the erasing times of any entity erase unit is greater than erasing times threshold value.
If when the erasing times of each entity erase unit is not more than erasing times threshold value, flow process is returned to step S1201.If when the erasing times of one of them entity erase unit (hereinafter referred to as first instance erase unit) is greater than erasing times threshold value, in step S1205, be stored in another entity erase unit (hereinafter referred to as second instance erase unit) that data in first instance erase unit can be copied to storage data not.But, the invention is not restricted to this.For example, the data that are stored in first instance erase unit also can be copied to memory buffer 252.
Afterwards, in step S1207, first instance erase unit can be heated, to make the temperature rise of first instance erase unit to 100° centigrade between 600 degree Celsius.For example, the heater circuit of Memory Controller 104 (or memory management circuitry 202) meeting activation first instance erase unit, so that the temperature rise of first instance erase unit for example, to 450 degree Celsius and maintain a schedule time (, 10 minutes).
Afterwards, in step S1209, copy to second instance and wipe that single data can be restored to first instance erase unit and flow process can be back to step S1201.
It must be appreciated, although in this exemplary embodiment, heater circuit is the below that is configured in each entity erase unit, the invention is not restricted to this.In another exemplary embodiment, heater circuit be the configurable control lock at each entity erase unit above (as shown in figure 13).Moreover, in another exemplary embodiment, all configurable heater circuit in the below of entity erase unit and top.
It must be appreciated, although in this exemplary embodiment, the erasing times of entity erase unit can be used to weigh the degree of wear of entity erase unit, the invention is not restricted to this.For example, the degree of wear of entity erase unit also can be weighed according to write indegree, error bit number, error bit ratio or the reading times of entity erase unit.Or the degree of wear of entity erase unit also can erasing times, at least wherein combination of two parameters write among the parameters such as indegree, error bit number, error bit ratio and reading times is calculated.
In sum, storage repairing method of the present invention and controller and storage device can duplicative nonvolatile memory module may wear to a certain degree time, heating duplicative nonvolatile memory module.Base this, deteriorated memory cell can be repaired to recover its data hold capacity, extends thus the life-span of duplicative nonvolatile memory module.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to aforementioned each embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or some or all of technical characterictic is wherein equal to replacement; And these amendments or replacement do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (24)
1. a storage repairing method, for a duplicative nonvolatile memory module, is characterized in that, comprising:
Monitor a degree of wear of one of them part of this duplicative nonvolatile memory module; And
In the time that this degree of wear of this one of them part of this duplicative nonvolatile memory module is greater than a threshold value, heat this one of them part of this duplicative nonvolatile memory module.
2. storage repairing method according to claim 1, is characterized in that, a temperature of this one of them part of this duplicative nonvolatile memory module can be heated between 100° centigrade between 600 degree Celsius.
3. storage repairing method according to claim 1, it is characterized in that, this duplicative nonvolatile memory module comprises one first duplicative nonvolatile memory submodule group and one second duplicative nonvolatile memory submodule group, this the first duplicative nonvolatile memory submodule group is to be formed by one first duplicative nonvolatile memory chip and primary heater encapsulation, and this second duplicative nonvolatile memory submodule group is to be formed by one second duplicative nonvolatile memory chip and secondary heater encapsulation
The step of wherein monitoring the degree of wear of this duplicative nonvolatile memory module comprises a degree of wear value that records this first duplicative nonvolatile memory chip,
Wherein, in the time that this degree of wear of this duplicative nonvolatile memory module is greater than this threshold value, the step that heats this duplicative nonvolatile memory module comprises:
Whether this degree of wear value that judges this first duplicative nonvolatile memory chip is greater than this threshold value;
If when this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, the data Replica being stored on this first duplicative nonvolatile memory chip is heated to this first duplicative nonvolatile memory chip in this second duplicative nonvolatile memory chip and by this primary heater, and wherein this first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time; And
These data that copy to this second duplicative nonvolatile memory chip are restored in this first duplicative nonvolatile memory chip.
4. storage repairing method according to claim 1, it is characterized in that, this duplicative nonvolatile memory module comprises one first duplicative nonvolatile memory submodule group, and this first duplicative nonvolatile memory submodule group is to be formed by one first duplicative nonvolatile memory chip and primary heater encapsulation
The step of wherein monitoring the degree of wear of this duplicative nonvolatile memory module comprises a degree of wear value that records this first duplicative nonvolatile memory chip,
Wherein, in the time that this degree of wear of this duplicative nonvolatile memory module is greater than this threshold value, the step that heats this duplicative nonvolatile memory module comprises:
Whether this degree of wear value that judges this first duplicative nonvolatile memory chip is greater than this threshold value;
If when this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, the data Replica being stored on this first duplicative nonvolatile memory chip is heated to this first duplicative nonvolatile memory chip in a memory buffer and by this primary heater, and wherein this first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time; And
These data that copy to this memory buffer are restored in this first duplicative nonvolatile memory chip.
5. storage repairing method according to claim 1, is characterized in that, this duplicative nonvolatile memory module comprises that multiple entity erase units and each those entity erase unit dispose a heater circuit,
The step of wherein monitoring the degree of wear of this duplicative nonvolatile memory module comprises a degree of wear value that records each those entity erase unit,
Wherein, in the time that this degree of wear value of this duplicative nonvolatile memory module is greater than this threshold value, the step that heats this duplicative nonvolatile memory module comprises:
Whether a degree of wear value that judges the first instance erase unit among those entity erase units is greater than this threshold value;
If when this degree of wear value of this first instance erase unit is greater than this threshold value, to be stored in a data Replica on this first instance erase unit in the second instance erase unit among those entity erase units and by heater circuit that should first instance erase unit is heated to this first instance erase unit, wherein this first instance erase unit can be heated between 100° centigrade between 600 degree Celsius and maintain a Preset Time; And
These data that copy to this second instance erase unit are restored in this first instance erase unit.
6. storage repairing method according to claim 3, it is characterized in that, this degree of wear value of this first duplicative nonvolatile memory chip be according to an erasing times, of this first duplicative nonvolatile memory chip write indegree, an error bit number, an error bit ratio and a reading times at least one of them calculates.
7. storage repairing method according to claim 5, it is characterized in that, this degree of wear value of this first instance erase unit be according to an erasing times, of this first instance erase unit write indegree, an error bit number, an error bit ratio and a reading times at least one of them calculates.
8. storage repairing method according to claim 1, is characterized in that, this one of them part of this duplicative nonvolatile memory module is a memory crystal grain or a memory block face.
9. a Memory Controller, for controlling a duplicative nonvolatile memory module, is characterized in that, comprising:
One host interface, in order to be electrically connected to a host computer system;
One memory interface, in order to be electrically connected to this duplicative nonvolatile memory module;
One memory buffer; And
One memory management circuitry, is electrically connected to this host interface, this memory interface and this memory buffer, and in order to monitor the degree of wear of one of them part of this duplicative nonvolatile memory module,
Wherein in the time that this degree of wear of this one of them part of this duplicative nonvolatile memory module is greater than a threshold value, this one of them part of this this duplicative nonvolatile memory module of memory management circuitry instruction heating.
10. Memory Controller according to claim 9, is characterized in that, a temperature of this one of them part of this duplicative nonvolatile memory module can be heated between 100° centigrade between 600 degree Celsius.
11. Memory Controllers according to claim 9, it is characterized in that, this duplicative nonvolatile memory module comprises one first duplicative nonvolatile memory submodule group and one second duplicative nonvolatile memory submodule group, this the first duplicative nonvolatile memory submodule group is to be formed by one first duplicative nonvolatile memory chip and primary heater encapsulation, and this second duplicative nonvolatile memory submodule group is to be formed by one second duplicative nonvolatile memory chip and secondary heater encapsulation
Wherein, in the running of this degree of wear of this at least a portion of this duplicative nonvolatile memory module of above-mentioned monitoring, this memory management circuitry records a degree of wear value of this first duplicative nonvolatile memory chip,
Wherein at above-mentioned this when this duplicative nonvolatile memory module when at least one of them this degree of wear is greater than this threshold value, this that heats this duplicative nonvolatile memory module is at least in one of them running, this memory management circuitry can judge whether this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, if when wherein this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, this memory management circuitry can will be stored in a data Replica on this first duplicative nonvolatile memory chip in this second duplicative nonvolatile memory chip, heat this first duplicative nonvolatile memory chip by this primary heater, and these data that copy to this second duplicative nonvolatile memory chip are restored in this first duplicative nonvolatile memory chip,
Wherein this first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
12. Memory Controllers according to claim 9, it is characterized in that, this duplicative nonvolatile memory module comprises one first duplicative nonvolatile memory submodule group, and this first duplicative nonvolatile memory submodule group is to be formed by one first duplicative nonvolatile memory chip and primary heater encapsulation
Wherein, in the running of this degree of wear of this at least a portion of this duplicative nonvolatile memory module of above-mentioned monitoring, this memory management circuitry records a degree of wear value of this first duplicative nonvolatile memory chip,
Wherein at above-mentioned this when this duplicative nonvolatile memory module when at least one of them this degree of wear is greater than this threshold value, this that heats this duplicative nonvolatile memory module is at least in one of them running, this memory management circuitry can judge whether this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, if when wherein this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, this memory management circuitry can will be stored in a data Replica on this first duplicative nonvolatile memory chip in this memory buffer, heat this first duplicative nonvolatile memory chip by this primary heater, and these data that copy to this memory buffer are restored in this first duplicative nonvolatile memory chip,
Wherein this first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
13. Memory Controllers according to claim 9, is characterized in that, this duplicative nonvolatile memory module comprises that multiple entity erase units and each those entity erase unit dispose a heater circuit,
Wherein, in the running of the above-mentioned degree of wear at this duplicative nonvolatile memory module of monitoring, this memory management circuitry can record a degree of wear value of each those entity erase unit,
Wherein at above-mentioned this when this duplicative nonvolatile memory module when at least one of them this degree of wear is greater than this threshold value, this that heats this duplicative nonvolatile memory module is at least in one of them running, this memory management circuitry can judge whether a degree of wear value of the first instance erase unit among those entity erase units is greater than this threshold value, if when wherein this degree of wear value of this first instance erase unit is greater than this threshold value, this memory management circuitry can will be stored in a data Replica on this first instance erase unit in the second instance erase unit among those entity erase units, by heater circuit that should first instance erase unit is heated to this first instance erase unit, and these data that copy to this second instance erase unit are restored in this first instance erase unit,
Wherein this first instance erase unit can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
14. Memory Controllers according to claim 11, it is characterized in that, this degree of wear value of this first duplicative nonvolatile memory chip be according to an erasing times, of this first duplicative nonvolatile memory chip write indegree, an error bit number, an error bit ratio and a reading times at least one of them calculates.
15. Memory Controllers according to claim 13, it is characterized in that, this degree of wear value of this first instance erase unit be according to an erasing times, of this first instance erase unit write indegree, an error bit number, an error bit ratio and a reading times at least one of them calculates.
16. Memory Controllers according to claim 9, is characterized in that, this one of them part of this duplicative nonvolatile memory module is a memory crystal grain or a memory block face.
17. 1 kinds of memorizer memory devices, is characterized in that, comprising:
A connector, in order to be electrically connected to a host computer system;
One duplicative nonvolatile memory module; And
One Memory Controller, has a memory buffer and is electrically connected to this connector and this duplicative nonvolatile memory module,
Wherein this Memory Controller is in order to monitor the degree of wear of one of them part of this duplicative nonvolatile memory module,
Wherein in the time that this degree of wear of this one of them part of this duplicative nonvolatile memory module is greater than a threshold value, this one of them part of this this duplicative nonvolatile memory module of Memory Controller instruction heating.
18. memorizer memory devices according to claim 17, is characterized in that, a temperature of this one of them part of this duplicative nonvolatile memory module can be heated between 100° centigrade between 600 degree Celsius.
19. memorizer memory devices according to claim 17, it is characterized in that, this duplicative nonvolatile memory module comprises one first duplicative nonvolatile memory submodule group and one second duplicative nonvolatile memory submodule group, this the first duplicative nonvolatile memory submodule group is to be formed by one first duplicative nonvolatile memory chip and primary heater encapsulation, and this second duplicative nonvolatile memory submodule group is to be formed by one second duplicative nonvolatile memory chip and secondary heater encapsulation
Wherein, in the running of this degree of wear of this at least a portion of this duplicative nonvolatile memory module of above-mentioned monitoring, this Memory Controller records a degree of wear value of this first duplicative nonvolatile memory chip,
Wherein at above-mentioned this when this duplicative nonvolatile memory module when at least one of them this degree of wear is greater than this threshold value, this that heats this duplicative nonvolatile memory module is at least in one of them running, this Memory Controller can judge whether this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, if when wherein this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, this Memory Controller can will be stored in a data Replica on this first duplicative nonvolatile memory chip in this second duplicative nonvolatile memory chip, heat this first duplicative nonvolatile memory chip by this primary heater, and these data that copy to this second duplicative nonvolatile memory chip are restored in this first duplicative nonvolatile memory chip,
Wherein this first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
20. memorizer memory devices according to claim 17, it is characterized in that, this duplicative nonvolatile memory module comprises one first duplicative nonvolatile memory submodule group, and this first duplicative nonvolatile memory submodule group is to be formed by one first duplicative nonvolatile memory chip and primary heater encapsulation
Wherein, in the running of this degree of wear of this at least a portion of this duplicative nonvolatile memory module of above-mentioned monitoring, this Memory Controller records a degree of wear value of this first duplicative nonvolatile memory chip,
Wherein at above-mentioned this when this duplicative nonvolatile memory module when at least one of them this degree of wear is greater than this threshold value, this that heats this duplicative nonvolatile memory module is at least in one of them running, this Memory Controller can judge whether this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, if when wherein this degree of wear value of this first duplicative nonvolatile memory chip is greater than this threshold value, this Memory Controller can will be stored in a data Replica on this first duplicative nonvolatile memory chip in this memory buffer, heat this first duplicative nonvolatile memory chip by this primary heater, and these data that copy to this memory buffer are restored in this first duplicative nonvolatile memory chip,
Wherein this first duplicative nonvolatile memory chip can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
21. memorizer memory devices according to claim 17, is characterized in that, this duplicative nonvolatile memory module comprises that multiple entity erase units and each those entity erase unit dispose a heater circuit,
Wherein, in the running of the above-mentioned degree of wear at this duplicative nonvolatile memory module of monitoring, this Memory Controller can record a degree of wear value of each those entity erase unit,
Wherein at above-mentioned this when this duplicative nonvolatile memory module when at least one of them this degree of wear is greater than this threshold value, this that heats this duplicative nonvolatile memory module is at least in one of them running, this Memory Controller can judge whether a degree of wear value of the first instance erase unit among those entity erase units is greater than this threshold value, if when wherein this degree of wear value of this first instance erase unit is greater than this threshold value, this Memory Controller can will be stored in a data Replica on this first instance erase unit in the second instance erase unit among those entity erase units, by heater circuit that should first instance erase unit is heated to this first instance erase unit, and these data that copy to this second instance erase unit are restored in this first instance erase unit,
Wherein this first instance erase unit can be heated between 100° centigrade is spent to Celsius 600 and maintain a Preset Time.
22. memorizer memory devices according to claim 19, it is characterized in that, this degree of wear value of this first duplicative nonvolatile memory chip be according to an erasing times, of this first duplicative nonvolatile memory chip write indegree, an error bit number, an error bit ratio and a reading times at least one of them calculates.
23. memorizer memory devices according to claim 21, it is characterized in that, this degree of wear value of this first instance erase unit be according to an erasing times, of this first instance erase unit write indegree, an error bit number, an error bit ratio and a reading times at least one of them calculates.
24. memorizer memory devices according to claim 17, is characterized in that, this one of them part of this duplicative nonvolatile memory module is a memory crystal grain or a memory block face.
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Also Published As
| Publication number | Publication date |
|---|---|
| CN103871480B (en) | 2017-04-12 |
| TW201423757A (en) | 2014-06-16 |
| TWI506642B (en) | 2015-11-01 |
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