CN103839596A - Optimal method for correcting embedded memory - Google Patents

Optimal method for correcting embedded memory Download PDF

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CN103839596A
CN103839596A CN 201410098554 CN201410098554A CN103839596A CN 103839596 A CN103839596 A CN 103839596A CN 201410098554 CN201410098554 CN 201410098554 CN 201410098554 A CN201410098554 A CN 201410098554A CN 103839596 A CN103839596 A CN 103839596A
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embedded memory
gear
value
method
correction
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CN 201410098554
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Chinese (zh)
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CN103839596B (en )
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任栋梁
吴玮
桂伟
钱亮
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上海华虹宏力半导体制造有限公司
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Abstract

The invention provides an optimal method for correcting an embedded memory. The optimal method comprises the steps of correcting an electric parameter of the embedded memory, and determining a gear range; reducing a gear from the left side and the right side within the determined gear range. Each gear is reduced from the left side and the right side within the gear range, so that the value concentration degree of the electric parameter is increased, values which fluctuate near to a set value are reduced, and the phenomenon that the value fluctuation exceeds the set value caused by factors such as design, manufacturing and test is avoided; therefore, the stability of the performance of a device is improved; meanwhile, the electric parameter does not need to be re-measured, so that the test time cannot be prolonged, and the performance stability is improved on the basis of guaranteeing the test efficiency.

Description

一种嵌入式存储器修正的最优化方法 Correction of an embedded memory optimization method

技术领域 FIELD

[0001] 本发明涉及集成电路测试技术领域,特别涉及一种嵌入式存储器修正的最优化方法。 [0001] The present invention relates to testing integrated circuit technology, and particularly relates to a method for optimizing the correction of embedded memory.

背景技术 Background technique

[0002] 半导体存储器可分为挥发性存储器和非挥发性存储器两类,挥发性存储器断电后会失去记忆的数据,非挥发性存储器即使在切断电源的情况下也可以保护数据。 [0002] The semiconductor memory may be divided into the volatile memory and two types of non-volatile memory, the volatile memory lose power failure data memory, non-volatile memory can protect data even in the case of cutoff of the power supply. ROM是非挥发性存储器,ROM在类型上根据用户是否可以写入数据而分为两类,一类是用户可以写入的R0M,另一类是制造商在加工过程中写入的被称为Mask ROM。 ROM is non-volatile memory, ROM type based on whether the user can write data is divided into two categories, one user can write a R0M, and the other is referred to as Mask manufacturer written in the process ROM. 在用户可写入的ROM中,t匕较常用的有EEPROM (Electrically Erasable Programmable ROM,电可擦可编程只读存储器)和eflash (Embedded Flash Memory,嵌入式闪存)。 In the user-writable ROM, t is more commonly used dagger EEPROM (Electrically Erasable Programmable ROM, electrically erasable programmable read only memory) and eflash (Embedded Flash Memory, embedded flash).

[0003] Eflash是EEPROM走向成熟,半导体技术发展到亚微米技术,以及大容量电可擦写存储器需求的产物。 [0003] Eflash EEPROM is mature, the development of semiconductor technology sub-micron technology, and a mass memory electrically erasable product demand. 它存储数据的原理是以电荷的形成储存在浮栅电极上。 It is based on the principle of storing data formed on the charge stored in the floating gate electrode. 与EEPROM相t匕,eflash在集成度方面有无可比拟的优越性;它的单元面积仅为常规EEPROM的四分之一。 T phase and EEPROM dagger, eflash has incomparable superiority in terms of degree of integration; it is only a quarter of the conventional cell area of ​​the EEPROM. EEPROM由于成本高、需求量小、集成度低,有逐渐被eflash取代的趋势。 EEPROM due to the high cost, demand for small, low degree of integration, has gradually been replaced eflash trend.

[0004] 在eflash的制程中,有eflash测试这一步骤,目的是控制测试系统硬件以一定的方式保证被测eflash达到或超越它的一些具体定义在器件规格书里的设计指标。 [0004] In eflash manufacturing process, there eflash test this step, test system hardware is designed to control in a manner to ensure that the measured eflash meet or exceed some of its specific design specifications in the device defined in the specification.

[0005] 对于eflash器件,其擦除电压(VEE)和编程电压(VEP)的测试方法包括:在计算器(register)中载入一组数据,例如可以是编程电压,通常可以为16个,位于计算器的16个档位中;并通过在该档位下的值时烧断存储器中相应的保险丝,来不断调整到合适的电压(该过程称为trimming,即修正),在此过程中需要用到精确测试单元(precision measureunit, PMU)来测量,接着采用相应的计算机语言编写相关程序,从16个测得的值中选取最接近目标值的测得的值作为最终结果。 [0005] For eflash device, which erase voltage (VEE) and a programming voltage (VEP) test method comprising: loading a set of data in the calculator (register), for example, may be a programming voltage, typically it may be 16, the calculator 16 is located in the stalls; by blowing corresponding fuses in the memory when the value of said range, to continuously adjust to the appropriate voltage (a process known Trimming, i.e., correction), in this process We need to use accurate testing unit (precision measureunit, PMU) is measured, and then use the appropriate computer language-related programs, selecting a value measured closest to the target 16 from the measured values ​​as the final result. 图1为现有技术中嵌入式存储器修正后最终结果的正态分布示意图,如图1所示,在规格值(spec)之内的有5个档位的数值。 Figure 1 is a schematic view of the final result of the normal prior art embedded memory correction, shown in Figure 1, there are five values ​​within the range of the standard value (spec).

[0006] 从图1可以看出,还是有一部分数值,例如档位I与档位5的数值在规格值附近,eflash器件形成过程中微小的波动(例如设计方面、制造过程或者测试方面的波动)可能造成这一部分数值发生波动超出规格值,因此减少或消除在规格值附近分布的数值,增大数值分布的集中程度,提高嵌入式存储器性能的稳定性是很有必要的。 [0006] As can be seen from Figure 1, there are still some value, for example during minor fluctuations (e.g. fluctuation design, manufacture or testing of the gear shift values ​​I 5 is formed in the vicinity of the specified value, the device eFlash ) this part may cause fluctuation value exceeds the standard value, thus reducing or eliminating the distribution of values ​​in the vicinity of the specification value, increasing the degree of concentration distribution value, to improve the stability of embedded memory performance is necessary.

发明内容 SUMMARY

[0007] 本发明提供了一种嵌入式存储器修正的最优化方法,以解决现有技术中嵌入式存储器修正之后会有一部分电参数的数值在规格值附近波动造成器件性能不稳定的问题。 [0007] The present invention provides a method for the optimization of embedded memory correction to solve the problem will be part of the electrical parameters of the prior art, after the correction values ​​embedded memory instability in device performance specifications fluctuate around value.

[0008] 本发明提供的嵌入式存储器修正的最优化方法,包括: [0008] The present invention provides a correction of embedded memory optimization method, comprising:

[0009] 对嵌入式存储器的电参数进行修正,确定档位范围; [0009] The electrical parameters of the embedded memory is corrected, gear range is determined;

[0010] 将确定的档位范围左右各减少一个档位。 [0010] The gear range is determined around each of a reduction gear.

[0011] 进一步的,所述嵌入式存储器是eflash。 [0011] Further, the embedded memory is eflash. [0012] 进一步的,所述电参数为写入电压和/或擦除电压。 [0012] Further, the electrical parameter is the write voltage and / or erase voltage.

[0013] 进一步的,所述电参数的数据最多为16个。 [0013] Further, the electrical parameter data up to 16.

[0014] 进一步的,所述电参数载入在计算器中,位于所述计算器的16个档位中。 [0014] Further, in loading the electrical parameter calculator, the calculator 16 is located in the stalls.

[0015] 进一步的,采用精确测试单元对所述电参数进行测量。 [0015] Further, the test unit using the precise measurement of electrical parameters.

[0016] 进一步的,最终的档位范围中档位不少于3个。 [0016] Further, the final gear position gear range no less than three.

[0017] 与现有技术相比,本发明具有以下优点: [0017] Compared with the prior art, the present invention has the following advantages:

[0018] 1、本发明对嵌入式存储器的电参数进行修正,确定档位范围之后,通过将档位范围左右各减少一档,提高电参数的数值集中程度,减少在规格值附近波动的数值,防止因设计、制造或者测试等因素造成的数值波动超出规格值的情况发生,以此提高器件性能的稳定性; [0018] 1, the electrical parameters of the present invention, the embedded memory is corrected, after determining the gear range, the left and right by the respective reduction gear range of a file, the values ​​are concentrated to improve the degree of electrical parameters, reduction in size value fluctuates around the value , designed to prevent, or in the case of manufacturing a test value fluctuations caused by factors outside the specification values ​​occurs, in order to improve the stability of device performance;

[0019] 2、本发明只是增加一个减少档位的过程,并不需要重新对电参数进行测量,不会增加测试时间,从而在保证测试效率的基础上提高了性能的稳定性。 [0019] 2, but the present invention is a process of reducing gear increases, it does not need to re-measure the electrical parameters, without increasing the test time, thus ensuring the stability of improving performance based on the testing efficiency.

附图说明 BRIEF DESCRIPTION

[0020] 图1为现有技术中嵌入式存储器修正后最终公结果的正态分布示意图。 [0020] FIG. 1 is a schematic view of the normal distribution of the final result of the known prior art embedded memory correction.

[0021] 图2为本发明一实施例所提供的嵌入式存储器修正的最优化方法的流程示意图。 [0021] FIG 2 a schematic flow chart of the optimization method according to the modified embedded memory provided in an embodiment of the invention.

[0022] 图3为本发明一实施例所提供的嵌入式存储器修正的最优化方法的最终结果的正态分布示意图。 [0022] Fig 3 a schematic view of an embedded memory device according to a normal distribution to provide the final correction result to an embodiment of the optimization method of the present invention.

具体实施方式 detailed description

[0023] 以下结合附图和具体实施例对本发明提出的嵌入式存储器修正的最优化方法做进一步详细说明。 [0023] The following specific embodiments in conjunction with the accompanying drawings and described in further detail a method for optimizing the correction of embedded memory proposed by the invention. 根据下面说明和权利要求书,本发明的优点和特征将更清楚,需说明的是,附图均采用非常简化的形式且均使用非精准的比率,仅用于方便、明晰地辅助说明本发明实施例的目的。 The following description and the appended claims, features and advantages of the present invention will become more apparent, should be noted that the drawings are a very simplified form and using a non-precise ratios are only for convenience, the present invention is of assistance in explaining lucid the purpose of the embodiment.

[0024] 图2为本发明一实施例所提供的嵌入式存储器修正的最优化方法的流程示意图,如图2所示,本发明提出的一种嵌入式存储器修正的最优化方法,包括以下步骤: [0024] FIG. 2 is a schematic flowchart of embedded memory optimization method embodiment provided by a correction of the embodiment of the invention, shown in Figure 2, an embedded memory of the present invention, the modified proposed optimization method, comprising the steps of :

[0025] 步骤SOl:对嵌入式存储器的电参数进行修正,确定档位范围; [0025] Step SOl: the electrical parameters of the embedded memory is corrected, gear range is determined;

[0026] 步骤S02:将确定的档位范围左右各减少一档。 [0026] Step S02: the determined gear range around each reduced one step.

[0027] 图3为本发明一实施例所提供的嵌入式存储器修正的最优化方法的最终结果的正态分布示意图,请参考图2所示,并结合图3,详细说明本发明提出的嵌入式存储器修正的最优化方法: [0027] Fig 3 a schematic view of an embedded memory device according to a normal distribution to provide the final correction result to an embodiment of the optimization method of the present invention, refer to FIG. 2 and FIG. 3 in conjunction with the detailed description of the present invention proposed embedded correction memory optimization methods:

[0028] 步骤SOl:对嵌入式存储器的电参数进行修正,确定与电参数的目标值最接近档位范围。 [0028] Step SOl: the electrical parameters of the embedded memory is corrected, determine the closest gear range and the target value of the electrical parameter.

[0029] 本实施例中,所述嵌入式存储器是eflash,所述电参数为写入电压和/或擦除电压,即对eflash的写入电压和/或擦除电压进行修正,在其他实施例中,也可以是其他的eflash中需要修正的参数。 [0029] In this embodiment, the embedded memory is eFlash, the electrical parameter is the write voltage and / or erase voltage, i.e. the voltage eFlash write and / or erase voltage is corrected, in other embodiments embodiment, may be required in other eflash correction parameter.

[0030] 所述电参数的数据个数最多为16个;在计算器中载入一组写入电压或擦除电压的数据,通常为16个,位于计算器的16个档位中,并通过在该档位下的值时烧断存储器中相应的保险丝,来不断调整到合适的电压,在此过程中需要用到精确测试单元(precisionmeasure unit,PMU)来测量,接着采用相应的计算机语言编写相关程序,从16个测得的数值中选取最接近目标值的数值作为最终结果,即确定最接近目标值的档位范围,例如:从16个档位选择了5个档位作为合适的档位范围,比如档位I到档位5,可以参考图1所示。 [0030] The electrical parameters of the number of data up to 16; loading a set of write voltage or a data erase voltage in the calculator, typically 16, is located in the calculator 16 gears, and by blowing corresponding fuses in the memory when the value of said range, to continuously adjust to the appropriate voltage, in this process need to use precise testing unit (precisionmeasure unit, PMU) is measured, and then use the appropriate computer language preparation of procedures, to select the value closest to the target 16 from the measured values ​​as a final result, i.e., closest to the target gear range is determined, for example: from the 16 selected gear shift position as appropriate 5 gear range, such as the gear shift position I to 5, refer to FIG. 1.

[0031] 步骤S02:将确定的档位范围左右各减少一档。 [0031] Step S02: the determined gear range around each reduced one step.

[0032] 上一步骤中电参数修正之后的数值呈正态分布,为了较少或者消除正态分布中在规格值附近分布的数值,增大数值分布的集中程度,将步骤SOl中确定的档位范围左右各减少一档,例如,原先适合的档位是档位I到档位5,左右各减少一档,变为档位2到档位4 ;档位数的减少使得写入电压或擦除电压的数值集中在规格值之内的位置,如图3所示。 [0032] After the value of the electrical parameter modification step, a normal distribution, normal values ​​in order to eliminate or less in the vicinity of the distribution specification value, increasing the value of the degree of concentration distribution, determined in the step SOl profile each bit range around a reduction gear, e.g., the original gear position is a position suitable to I gear 5, about the reduced one step, 2 to the gear shift becomes 4; reduction in the number of gears such that the write voltage or erase voltage values ​​are concentrated within the specification value of the position, as shown in FIG.

[0033] 从图3可以看出,写入电压或擦除电压的数值集中在档位2、档位3与档位4,距离规格值的边缘还有一定的距离,即使在eflash的研发、制作以及测试过程中,由于工艺波动或者其他的因素造成写入电压或擦除电压的数值发生波动,也不会超出规格值,从而保证器件性能的稳定性。 [0033] As can be seen from FIG. 3, the write voltage or erase voltage value is concentrated in the 2, 3 and the gear 4, there is a certain distance from the standard values ​​of the shift position from the edge, even in research and development of eflash, production and testing process, since the process fluctuations or other factors causing the voltage value of the write or erase voltage fluctuation, does not exceed the specified value, thus ensuring the stability of device performance.

[0034] 需要说明的是,最终确定的档位的范围中档位要不少于3个,即在步骤SOl中确定的合适的档位范围需要不少于5个。 [0034] Incidentally, the range of the final determined gear shift position to not less than 3, i.e., the appropriate gear range determined in step SOl requires not less than 5.

[0035] 综上所述,本发明对嵌入式存储器的电参数进行修正,确定档位范围之后,通过将档位范围左右各减少一档,提高电参数的数值集中程度,减少在规格值附近波动的数值,防止因设计、制造或者测试等因素造成的数值波动超出规格值的情况发生,以此提高器件性能的稳定性;本发明只是增加一个减少档位的过程,并不需要重新对电参数进行测量,不会增加测试时间,从而在保证测试效率的基础上提高了性能的稳定性。 [0035] In summary, the present invention is the electrical parameters of the embedded memory is corrected, after determining the gear range, the left and right by the respective reduction gear range of a file, the values ​​are concentrated to improve the degree of electrical parameters, near the specified value decrease value fluctuation, fluctuation in the value prevented due to the design, testing, manufacture or caused by factors outside the specification values ​​occurs, in order to improve the stability of device performance; the present invention is a reduction gear only increases the process, does not need to re-power parameters were measured, the test time will not increase, thus ensuring the stability of improving performance based on the testing efficiency.

[0036] 上述描述仅是对本发明较佳实施例的描述,并非对本发明范围的任何限定,本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰,均属于权利要求书的保护范围。 [0036] The above description is a description of the preferred embodiments of the present invention, and are not in any limiting the scope of the present invention, the art of the present invention of ordinary skill in the art to make according to the above disclosure of any change, modification, all fall within the scope of the claims .

Claims (7)

  1. 1.一种嵌入式存储器修正的最优化方法,其特征在于,包括: 对嵌入式存储器的电参数进行修正,确定档位范围; 将确定的档位范围左右各减少一个档位。 An embedded memory optimization correction method, characterized by comprising: an electrical parameter of the embedded memory is corrected, it is determined gear range; gear range around each of the determined one gear reduction.
  2. 2.如权利要求1所述的嵌入式存储器修正的最优化方法,其特征在于,所述嵌入式存储器是eflash。 2. The method of optimizing the correction of embedded memory as claimed in claim, wherein the embedded memory is eflash.
  3. 3.如权利要求1所述的嵌入式存储器修正的最优化方法,其特征在于,所述电参数为写入电压和/或擦除电压。 Correcting embedded memory optimization method as claimed in claim 1, wherein said electrical parameter is a voltage write and / or erase voltage.
  4. 4.如权利要求3所述的嵌入式存储器修正的最优化方法,其特征在于,所述电参数的数据最多为16个。 4. The optimization method of claim 3 embedded memory amended claim, wherein said electrical parameter data up to 16.
  5. 5.如权利要求4所述的嵌入式存储器修正的最优化方法,其特征在于,所述电参数载入在计算器中,位于所述计算器的16个档位中。 5. The method of optimizing the embedded memory 4 amended claim, wherein said electrical parameter in loading calculator, the calculator 16 is located in the stalls.
  6. 6.如权利要求5所述的嵌入式存储器修正的最优化方法,其特征在于,采用精确测试单元对所述电参数进行测量。 6. The method of optimizing the correction of the embedded memory as claimed in claim, characterized in that the test unit using the precise measurement of the electrical parameter.
  7. 7.如权利要求1所述的嵌入式存储器修正的最优化方法,其特征在于,最终的档位范围中档位不少于3个。 7. The method of optimizing the correction of embedded memory as claimed in claim, wherein the final gear position gear range no less than three.
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