CN103795344A - Oscillator circuit with temperature compensation function - Google Patents

Abstract

The invention discloses an oscillator circuit with a temperature compensation function. The oscillator circuit comprises a reference current generation circuit, a reference source, a VH voltage generation circuit, a voltage adding circuit for adding a reference voltage to a VH voltage, and a charging and discharging control unit. The charging and discharging control unit takes a threshold voltage VT as a charging and discharging threshold value, and controls a current IREF to charge or discharge a capacitor C between the threshold voltage and the ground. When the capacitor C is charged to reach the threshold voltage, logic output reverse is triggered and repeatedly conducted. By means of the oscillator circuit, the output clock frequency is compensated for along with the change of the temperature through a resistor with the positive temperature coefficient, the temperature coefficient of the output clock frequency is small, the discreteness is small, the temperature compensation effect is improved, transfer between different processes is facilitated, and the oscillator circuit is suitable for large-scale mass production and application; meanwhile, an output clock can still have a good duty ratio at the high frequency.

Description

With the pierce circuit of temperature-compensating

Technical field

The invention belongs to circuit field, particularly a kind of pierce circuit.

Background technology

On traditional sheet, oscillator generally adopts RC oscillator structure, and frequency of oscillation is relevant with RC.Because resistance R on sheet has larger temperature coefficient conventionally, therefore the output clock frequency of RC oscillator also has larger temperature coefficient.Conventionally adopt two kinds of resistance with the temperature coefficient of contrary sign to merge into a resistance with zero-temperature coefficient (normally first approximation is zero), thereby clock frequency and temperature are had nothing to do.But while carrying out compensation temperature coefficient with the resistance of temperature coefficient with contrary sign, these two kinds of resistance do not have technique correlation conventionally, and therefore one of them resistance is with respect to another resistance, and the variation of its resistance is conventionally very large, for example, can reach +/-30% more than; And between different types of resistance, cannot do to mate, also cause the uncertainty of its resistance proportionate relationship; And the variation of two kinds of resistance relations will directly cause the skew of temperature-compensating, cause compensating rear oscillator output clock frequency-temperature coefficient still larger.In a word, while carrying out compensation temperature coefficient with two kinds of resistance, have with technique change large, the problem such as discreteness is large, and compensation effect is undesirable.

In patent application 201110289103.0, announce a kind of the oscillator with temperature-compensating that adopts a kind of temperature coefficient of resistance to realize, avoid mating inaccurate problem between two kinds of different temperature coefficients devices, but the structure qualification of announcing in this application adopt resistance must there is negative temperature coefficient, therefore limited the range of choice of resistance; In addition the structural circuit of announcing in this application, is at V _uPPER, V _lOWERtwo voltages discharge and recharge, and the coupling of charging and discharging currents will definitely not cause oscillator duty ratio variation in the time of the clock signal of output frequency higher (as >10MHz).

Summary of the invention

For addressing the above problem, the object of the present invention is to provide a kind of pierce circuit with temperature-compensating, adopt a kind of device with positive temperature coefficient that the variation with temperature of its output clock clock frequency is compensated with this pierce circuit, the effect of compensation is little with technique change, discreteness is little, and the oscillator duty ratio that can have when high frequency clock in output.

For achieving the above object, technical scheme of the present invention is:

With a pierce circuit for temperature-compensating, it is characterized in that this pierce circuit comprises:

A reference current generating circuit, for generation of an electric current I REF with single order positive temperature coefficient Ki;

An a reference source, for providing a reference voltage V REF;

A VH voltage generation circuit, provides a voltage VH with single order positive temperature coefficient Kv;

A voltage adder circuit, for reference voltage and VH voltage are added, produces a threshold V T;

One discharges and recharges control unit, and it is controlled electric current I REF capacitor C is discharged and recharged between threshold voltage and ground using threshold V T as discharging and recharging threshold value, in the time that capacitor C charges to above-mentioned threshold voltage, triggers logic output reversion, goes round and begins again.

The logical signal of described this pierce circuit output is exactly the output clock of oscillator.

Described reference current generating circuit is bandgap voltage reference, and IREF electric current is produced by bandgap voltage reference; Bandgap voltage reference series connection two divider resistance R1, R2, VREF is by bandgap voltage reference output voltage by divider resistance R1, and R2 produces; VH voltage generation circuit is to be made up of resistance R 3, and VH produces by the IREF resistance R 3 of flowing through; Voltage adder circuit is to be made up of buffer register, and VT is produced by voltage adder circuit, and it is by being connected to the cold end of R3, therefore VT=VH+VREF after buffer register by VREF; Discharge and recharge control unit by five metal-oxide-semiconductors 303～307, capacitor C 1, C2, comparator 310,311, rest-set flip-flop 312 forms, one of them metal-oxide-semiconductor 303 is connected to power input, and four metal-oxide-semiconductors are divided into two groups and are connected in parallel on the above-mentioned metal-oxide-semiconductor 303 that is connected to power input; Metal-oxide- semiconductor 304 and 305 is cascaded, and metal-oxide- semiconductor 306 and 307 is cascaded, and capacitor C 1, C2 are connected on respectively every group of metal-oxide-semiconductor: the centre of metal-oxide- semiconductor 304 and 305, metal-oxide- semiconductor 306 and 307, is connected to comparator 310,311 and rest-set flip-flop 312 after metal-oxide-semiconductor.

The above-mentioned pierce circuit with temperature-compensating, it also includes mirrored cabinet circuit source, and mirror image circuit source is three PMOS pipes 301,302,303 that are parallel to power input, and its electric current flowing through is all IREF.

Described IREF obtains by following formula: wherein R4 is the resistance in bandgap voltage reference.

Described R3, R4 is same type resistance.And R3, R4 is the resistance with positive temperature coefficient Kr.

Generally speaking, the frequency of output clock if T0 is reference temperature point, as room temperature 300K, T is arbitrary temp point, and frequency is respectively

$F\left(T0\right)=\frac{\mathrm{IREF}\left(T0\right)}{C\·(\mathrm{VH}\left(T0\right)+\mathrm{VREF})}---\left(1\right)$

$F\left(T\right)=\frac{\mathrm{IREF}\left(T\right)}{C\·(\mathrm{VH}\left(T\right)+\mathrm{VREF})}---\left(2\right)$

$\frac{F\left(T0\right)}{F\left(T\right)}=\frac{\mathrm{IREF}\left(T0\right)\·\mathrm{VH}\left(T\right)+\mathrm{VREF}}{\mathrm{IREF}\left(T\right)\·\mathrm{VH}\left(T0\right)+\mathrm{VREF}}---\left(3\right)$

Output clock frequency-temperature coefficient is 0 o'clock, F (T0)/F (T)=1,

$\frac{\mathrm{IREF}\left(T0\right)}{\mathrm{IREF}\left(T\right)}=\frac{\mathrm{VH}\left(T0\right)+\mathrm{VREF}}{\mathrm{VH}\left(T\right)+\mathrm{VREF}}---\left(4\right)$

Thus

$\mathrm{VREF}=\frac{\mathrm{IREF}\left(T0\right)\·(\mathrm{VH}\left(T\right)-\mathrm{VH}\left(T0\right))}{\mathrm{IREF}\left(T\right)-\mathrm{IREF}\left(T0\right)}-\mathrm{VH}\left(T0\right)---\left(5\right)$

Because

VH(T)＝VH(T0)(1+Kv(T-T0)) (6)

I(T)＝I(T0)(1+Ki(T-T0)) (7)

So

$\mathrm{VREF}=\frac{\mathrm{Kv}-\mathrm{Ki}}{\mathrm{Ki}}\mathrm{VH}\left(T0\right)=\frac{\mathrm{Kr}+\mathrm{Ki}-\mathrm{Ki}}{\mathrm{Ki}}\mathrm{VH}\left(T0\right)=\frac{\mathrm{Kr}}{\mathrm{Ki}}\mathrm{VH}\left(T0\right)---\left(8\right)$

The single order positive temperature coefficient that wherein Kr is resistance; In the time regulating VREF to make it to satisfy condition (8), the single order temperature coefficient of oscillator output clock frequency is 0, has realized temperature-compensating.Can find out from (8) formula,

Due to Ki be on the occasion of, in order to guarantee that VREF is one on the occasion of (facilitate circuit realize), Kr be also one on the occasion of.

The employing of the pierce circuit of the present invention design a kind of resistance with positive temperature coefficient output clock frequency variation with temperature is compensated, the temperature coefficient of output clock frequency is little, and the variation with technique is little, discreteness is little, improve effect temperature compensation, be conducive to move between different process, be applicable to scale of mass production application; Output clock still can have good duty ratio in the time that frequency is higher simultaneously.

Accompanying drawing explanation

Fig. 1 is the pierce circuit schematic diagram with temperature-compensating that the present invention implements.

Fig. 2 is the circuit diagram of the pierce circuit with temperature-compensating implemented of the present invention.

Fig. 3 is that the present invention implements bandgap physical circuit.

The workflow diagram discharging and recharging that Fig. 4 implements for the present invention.

Embodiment

In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.

Shown in Fig. 1, the pierce circuit with temperature-compensating that the present invention realizes, its circuit theory diagrams at least comprise:

A reference current generating circuit, for generation of an electric current I REF with single order temperature coefficient Ki;

An a reference source, for providing a reference voltage V REF;

A VH voltage generation circuit, provides a voltage VH with single order positive temperature coefficient Kv;

A voltage adder circuit 100, for reference voltage and VH voltage are added, produces a threshold V T;

A charging and discharging circuit 200, it is controlled electric current I REF capacitor C is discharged and recharged between threshold voltage and ground using threshold V T as discharging and recharging threshold value, in the time that capacitor C charges to above-mentioned threshold voltage, triggers logic output reversion, goes round and begins again.The logical signal of circuit output is exactly the output clock of oscillator.

As shown in Figure 2, IREF electric current is produced by bandgap voltage reference Bandgap320 a kind of implementation of physical circuit, and VREF is by Bangap320 output voltage by divider resistance R1, and R2 produces; PMOS pipe 301,302,303 is mirror image circuit source, and its electric current flowing through is all IREF; VH produces by the IREF resistance R 3 of flowing through; VT is produced by voltage adder circuit 330, and its principle is by being connected to the cold end of R3, therefore VT=VH+VREF after Buffer308 by VREF; Charging and discharging circuit is by metal-oxide-semiconductor 303～307, capacitor C 1, C2, and comparator 310,311, rest-set flip-flop 312 forms.

Shown in Fig. 3, it is the physical circuit of bandgap320 in Fig. 2.Triode 3201,3202 has different areas, and the resistance that resistance R 4 and resistance R 3 are same type is convenient to do to mate, and resistance R 4 and resistance R 3 all have positive temperature coefficient Kr, easily obtains according to Fig. 2

$\mathrm{IREF}=\frac{\mathrm{\ΔVbe}}{R4}---\left(9\right)$

Therefore

$\mathrm{VH}=\mathrm{\ΔVbe}\·\frac{R3}{R4}---\left(10\right)$

$\mathrm{VT}=\mathrm{\ΔVbe}\·\frac{R3}{R4}+\mathrm{VREF}---\left(11\right)$

Be illustrated in figure 4 the operation principle of charging and discharging circuit.When step S101, G1 is low, and G2 is high, and IREF charges to capacitor C 1; Capacitor C 2 is discharged to 0 simultaneously; Then enter step S102, in the time that VC1 reaches VT, comparator 310 output switching activities are low, so G1 uprises G2 step-down; Then enter step S103, now G1 is low, and when G2 is high, IREF charges to capacitor C 1; Capacitor C 2 is discharged to 0 simultaneously; Then enter step S104, in the time that VC2 reaches VT, comparator 311 output switching activities are low, and G2 uprises G1 step-down.So go round and begin again, G1 or G2 are output clock.

Because IREF is to C1, C2 alternately charging defines respectively output clock high level and low level time, and on sheet the coupling of electric capacity C1, C2 can accomplish very accurately, therefore this structure can have extraordinary duty ratio by output clock.Good duty ratio is extremely important for ADC sampling clock.

Can obtain according to formula (9), (10), circuit I REF single order temperature coefficient Ki is:

$\mathrm{Ki}=\frac{1}{T0}-\mathrm{Kr}---\left(12\right)$

Kr is the single order temperature coefficient of resistance R 4, and T0 reference temperature, as room temperature 300K; Ki is generally greater than 0, i.e. Kr<1/T0.

The temperature coefficient Kv of voltage VH is:

$\mathrm{Kv}=\frac{1}{T0}---\left(13\right)$

Therefore bringing formula (12), (13) into formula (8) can obtain

$\mathrm{VREF}=\frac{\mathrm{Kr}}{1/T0-\mathrm{Kr}}\mathrm{VH}\left(T0\right)---\left(14\right)$

Wherein

$\mathrm{VH}\left(T0\right)=\mathrm{\&Delta;Vbe}\left(T0\right)\&CenterDot;\frac{R3}{R4}---\left(15\right)$

From formula (14), (15), VREF only and Kr and VH (T0) relevant, these two parameters are not subject to the impact of resistance or metal-oxide-semiconductor process corner; Therefore compensation establishment equation (14) has technique independence.Simultaneously, in order to guarantee that VREF is greater than 0, require Kr to be greater than 0, therefore require for the temperature coefficient of the resistance of temperature-compensating be on the occasion of.

Table 1 is depicted as the temperature coefficient of output clock frequency under certain technique.

Visible its single order temperature coefficient is offset completely ,-40C ^.～85C ^。temperature range, second-order temperature coefficient is 100ppm; Clock duty cycle is in the time that output clock frequency is greater than 10MHz, still more than 49% simultaneously.

Table 2 is depicted as the result of variations of output clock frequency-temperature coefficient with different process angle.

Under 5 kinds of extreme process corner, temperature coefficient all near 100ppm, has verified that the oscillator compensation effect with temperature compensation structure proposed by the invention is little with technique change as seen from the above table.

In a word, the foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims (6)

1. with a pierce circuit for temperature-compensating, it is characterized in that this pierce circuit comprises:

A reference current generating circuit, for generation of an electric current I REF with single order positive temperature coefficient Ki;

An a reference source, for providing a reference voltage V REF;

A VH voltage generation circuit, provides a voltage VH with single order positive temperature coefficient Kv;

A voltage adder circuit, for reference voltage and VH voltage are added, produces a threshold V T;

One discharges and recharges control unit, and it is controlled electric current I REF capacitor C is discharged and recharged between threshold voltage and ground using threshold V T as discharging and recharging threshold value, in the time that capacitor C charges to above-mentioned threshold voltage, triggers logic output reversion, goes round and begins again.

2. the pierce circuit with temperature-compensating as claimed in claim 1, is characterized in that described reference current generating circuit is bandgap voltage reference, and IREF electric current is produced by bandgap voltage reference; Bandgap voltage reference series connection two divider resistance R1, R2, VREF is by bandgap voltage reference output voltage by divider resistance R1, and R2 produces; VH voltage generation circuit is to be made up of resistance R 3, and VH produces by the IREF resistance R 3 of flowing through; Voltage adder circuit is to be made up of buffer register, and VT is produced by voltage adder circuit, and it is by being connected to the cold end of R3, therefore VT=VH+VREF after buffer register by VREF; Discharge and recharge control unit by five metal-oxide-semiconductors, capacitor C 1, C2, comparator, rest-set flip-flop composition, one of them metal-oxide-semiconductor is connected to power input, and four metal-oxide-semiconductors are divided into two groups and are connected in parallel on the above-mentioned metal-oxide-semiconductor that is connected to power input; Capacitor C 1, C2 are connected on respectively on every group of metal-oxide-semiconductor: after every group of metal-oxide-semiconductor, be connected to comparator and rest-set flip-flop.

3. the pierce circuit with temperature-compensating as claimed in claim 2, is characterized in that the above-mentioned pierce circuit with temperature-compensating, and its VH voltage generation circuit is to be same type resistance by resistance R 3 and band-gap reference resistance R 4, has positive temperature coefficient Kr.

4. the pierce circuit with temperature-compensating as claimed in claim 1, is characterized in that the logical signal of this pierce circuit output is exactly the output clock of oscillator.

5. the pierce circuit with temperature-compensating as claimed in claim 1, is characterized in that IREF single order temperature coefficient Ki is:

$\mathrm{Ki}=\frac{1}{T0}-\mathrm{Kr}$

Kr is the single order positive temperature coefficient of resistance R 4 in bandgap voltage reference, and T0 reference temperature, as room temperature 300K; Ki is generally greater than 0, i.e. Kr<1/T0.

The temperature coefficient Kv of voltage VH is:

$\mathrm{Kv}=\frac{1}{T0}.$

6. the pierce circuit with temperature-compensating as claimed in claim 5, is characterized in that when regulating VREF to make it to meet following

$\mathrm{VREF}=\frac{\mathrm{Kr}}{\mathrm{Ki}}\mathrm{VH}\left(T0\right)$

When condition, the single order temperature coefficient of oscillator output clock frequency is 0, has realized temperature-compensating, the single order positive temperature coefficient that wherein Kr is resistance.

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