CN103746002B - A kind of step groove-field limiting ring composite terminal structure - Google Patents
A kind of step groove-field limiting ring composite terminal structure Download PDFInfo
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- CN103746002B CN103746002B CN201310695830.6A CN201310695830A CN103746002B CN 103746002 B CN103746002 B CN 103746002B CN 201310695830 A CN201310695830 A CN 201310695830A CN 103746002 B CN103746002 B CN 103746002B
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- 239000002131 composite material Substances 0.000 title claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 230000002093 peripheral effect Effects 0.000 claims abstract description 4
- 238000002161 passivation Methods 0.000 claims description 6
- 239000004642 Polyimide Substances 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 229920001721 polyimide Polymers 0.000 claims description 3
- 239000000741 silica gel Substances 0.000 claims description 3
- 229910002027 silica gel Inorganic materials 0.000 claims description 3
- 230000005684 electric field Effects 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 4
- 239000012141 concentrate Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
Abstract
The invention discloses a kind of step groove-field limiting ring composite terminal structure, is active area at the middle section of chip, and outer peripheral areas is termination environment, active area and the common n in termination environment
-n-shaped FS layer, p is followed successively by below substrate
+anode region and anode thereof, FS layer refers to the field stop layer of GCT; In active area, n
-the unit of multiple parallel connection is provided with, in each unit and n in base
-what base was adjacent is wavy p base, is p above p base
+base, p
+base central authorities are provided with a negative electrode n
+emitter region, each n
+negative electrode is provided with above emitter region; p
+a gate pole is provided with above base; At the n of termination environment
-in substrate, be provided with the two-stage field limiting ring be connected with main knot, above field limiting ring, have step-like groove.Composite terminal structure of the present invention can make terminal puncture voltage reach more than 95% of ideal body puncture voltage.
Description
Technical field
The invention belongs to power semiconductor device technical field, relate to a kind of step groove-field limiting ring composite terminal structure.
Background technology
In the development process of power semiconductor device, the selection of terminal structure can directly affect the withstand voltage of power semiconductor device and stability thereof.Door pole stream-exchanging thyristor (GCT) is a kind of novel high-power semiconductor device of the exploitation based on gate level turn-off thyristor (GTO), in order to improve GCT terminal puncture voltage, usually adopt the table top terminal structure or variety lateral doping (VLD) structure that are similar to triode thyristor.Table top terminal structure adopts mechanical angle lap and etching process to be formed, manufacture craft comparative maturity, but the terminal puncture voltage that it can realize only has 80% of puncture voltage in its body, and its high-temperature current leakage and the chip area shared by terminal very large, and be only applicable to circular chip, be not suitable for square chip.Variety lateral doping structure adopts the diffusion window of gradual change to carry out aluminium to inject formation, the terminal puncture voltage of device can be made to reach 90% of puncture voltage in its body, but the chip area shared by terminal is also very large, and forms the more difficult control of photoetching window needed for gradient doping.
Visible, existing terminal technology all can not improve the terminal puncture voltage of device and the utilance of chip effectively, thus limits the exploitation of high-power GCT device.
Summary of the invention
The object of this invention is to provide a kind of step groove-field limiting ring composite terminal structure, solve existing high pressure dark junction device knot end voltage low and high temperature poor stability and the large problem of terminal chip occupying area.
The technical solution adopted in the present invention is, a kind of step groove-field limiting ring composite terminal structure, using the middle section of chip as active area, using active area outer peripheral areas as termination environment, and active area and the common n in termination environment
-be provided with N-shaped FS layer below substrate, below N-shaped FS layer, be provided with p
+anode region and anode thereof;
In active area, n
-the unit of multiple parallel connection is provided with, in each unit and n in base
-what base was adjacent is wavy p base, is p above p base
+base, p
+base central authorities are provided with a negative electrode n
+emitter region, each n
+negative electrode is provided with above emitter region; p
+be provided with gate pole above base, and whole gate pole is looped around surrounded negative electrode n
+around emitter region;
In active area, n
-the unit of multiple parallel connection is provided with, in each unit and n in base
-what base was adjacent is wavy p base, is p above p base
+base, p
+base central authorities are provided with a negative electrode n
+emitter region, each n
+cathode electrode is provided with above emitter region; p
+be provided with gate pole above base, and whole gate electrode is looped around around surrounded cathodic region;
At the n of termination environment
-in substrate, set gradually two field limiting rings that width is identical, spacing is different in main knot outside, optionally removed the p of high concentration above field limiting ring
+district, makes to pass through p between main knot and two field limiting rings
+district is connected, and makes p above simultaneously
+district's groove becomes step shape, and step lowest surfaces is positioned at p
+the final position in district, groove depth capacity and p
+district's thickness is identical, and trench area is filled with passivation layer.
Step groove of the present invention-field limiting ring composite terminal structure, is further characterized in that:
There is two-stage field limiting ring termination environment, and the spacing of main knot and first order field limiting ring is 240 ~ 250 μm, and the spacing of first order field limiting ring and second level field limiting ring is 310 ~ 350 μm.
Have a step groove above the field limiting ring of termination environment, first order gash depth is 35 ~ 39 μm, and first order groove width is 1250 ~ 1300 μm.
Surface passivation layer is polyimides or silica gel.
The invention has the beneficial effects as follows, in wavy base GCT device, this composite terminal structure can utilize the electric field in less terminal size unconnected terminal district effectively to concentrate, and realizes the bulk breakdown voltage of 95.6%.In addition, this composite terminal structure is not only applicable to disk, is also applicable to square piece, can also be generalized in other high tension apparatus deeply tied such as inverse conductivity type GCT and fast recovery diode FRD etc.
Accompanying drawing explanation
Fig. 1 is the schematic cross-section of step of the present invention groove-field limiting ring composite terminal structure;
Fig. 2 is the three-dimensional electric field distributed mode graphoid of composite terminal structure of the present invention when puncturing;
Fig. 3 is the space charge region broadening profile of composite terminal structure of the present invention;
Fig. 4 is the wavy base GCT breakdown characteristic of device simulation curve adopting composite terminal structure of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
With reference to Fig. 1, step groove of the present invention-field limiting ring composite terminal structure, its concrete structure arranges and is:
Using the middle section of chip as active area, using active area outer peripheral areas as termination environment, active area and the common n in termination environment
-be provided with N-shaped FS layer below substrate, below N-shaped FS layer, be provided with p
+anode region and anode (i.e. bottom position) thereof;
In active area, n
-the unit of multiple parallel connection is provided with, in each unit and n in base
-what base was adjacent is wavy p base, is p above p base
+base, p
+base central authorities are provided with a negative electrode n
+emitter region, each n
+negative electrode is provided with above emitter region; p
+be provided with gate pole above base, and whole gate pole is looped around surrounded negative electrode n
+around emitter region;
In active area, n
-the unit of multiple parallel connection is provided with, in each unit and n in base
-what base was adjacent is wavy p base, is p above p base
+base, p
+base central authorities are provided with a negative electrode n
+emitter region, each n
+cathode electrode is provided with above emitter region; p
+be provided with gate pole above base, and whole gate electrode is looped around around surrounded cathodic region; (noticing that the gate pole of each unit connects together to be looped around around cathodic region)
At the n of termination environment
-in substrate, set gradually two field limiting rings that width is identical, spacing is different in main knot outside, optionally (part) removes the p of high concentration above field limiting ring
+district, makes to pass through p between main knot and two field limiting rings
+district is connected, and makes p above simultaneously
+district's groove becomes step shape, and step lowest surfaces is positioned at p
+the final position in district, groove depth capacity and p
+district's thickness is identical, and trench area is filled with passivation layer, and this passivation material is polyimides or silica gel.
The wavy base of field limiting ring and active area is formed simultaneously; There is two-stage field limiting ring termination environment, the distance s of main knot and first order field limiting ring
1be 240 ~ 250 μm, the distance s of first order field limiting ring and second level field limiting ring
2it is 310 ~ 350 μm; A step groove is had, first order gash depth d above the field limiting ring of termination environment
1be 35 ~ 39 μm, first order groove width 1250 ~ 1300 μm.
Composite terminal structure of the present invention, it is withstand voltage, and mechanism is:
Substantially identical with the withstand voltage mechanism of field limiting ring terminal structure, utilize field limiting ring break-through effectively to disperse electric field near main knot to concentrate, remove heavily doped p above field limiting ring simultaneously
+district, effectively controls the space charge region quantity of electric charge, forces its depletion layer to further expand, to reduce surface field.Further, main knot with there is the high concentration p be communicated with between field limiting ring
+district, is equivalent to the extension area of main knot, and the surface field being conducive to alleviating main knot place is concentrated, and improves terminal puncture voltage.Fig. 2 is the Electric Field Distribution curve chart of composite terminal structure of the present invention when puncturing, as seen from Figure 2, there are three peak value electric fields closely in X direction successively, wherein the 1st peak value is positioned at (x=110 μm) place near main knot end, 2nd peak value is positioned at the 1st field limiting ring end (x=455 μm) place, and the 3rd peak value is positioned at the 2nd field limiting ring end (x=895 μm) place.Wherein the electric field at main knot and first field limiting ring place is slightly low, and the electric field at the second field limiting ring place is slightly high, punctures and will occur at this place.
Withstand voltage in order to improve, need to make strict control to the ring spacing of junction depth and field limiting ring, under the prerequisite ensureing puncture voltage, make to puncture and first betide in body, to reduce the impact withstand voltage on terminal of surperficial unfavorable factor, reduce terminal size as much as possible simultaneously.Fig. 3 is the broadening simulated section of composite terminal structure space charged region of the present invention.As seen from Figure 3, when the diffusion window width w of field limiting ring is 100 μm, the mask width s between main knot and first order field limiting ring
1be 245 μm, the mask width s between the first order and second level field limiting ring
2be 330 μm, first order gash depth d
1be 37 μm, when first order groove width is 1295 μm, now space charge region is from 100 μm of broadenings to 1680 μm, and corresponding terminal size is 1.58mm, and puncture voltage reaches as high as 5050V.
Composite terminal structure of the present invention, its device property evaluation is:
Fig. 4 is the simulation curve of the wavy GCT device breakdown characteristics under normal temperature (300K) and high temperature (420K) adopting above-mentioned step groove-field limiting ring composite terminal structure.As seen from Figure 4, in device body, the puncture voltage of parallel plane knot is about 5290V, adopting the obtainable terminal puncture voltage of this composite terminal structure to be about 5050V, is approximately 95.6% of parallel plane junction breakdown voltage in its body, and its high-temperature current leakage density close proximity to body punctures.Visible, adopt composite terminal structure of the present invention under less terminal size, to make terminal puncture voltage reach ideal breakdown voltage 95% more than.
Claims (4)
1. step groove-field limiting ring composite terminal structure, is characterized in that:
Using the middle section of chip as active area, using active area outer peripheral areas as termination environment, active area and the common n in termination environment
-be provided with N-shaped FS layer below substrate, FS layer refers to the field stop layer of GCT, below N-shaped FS layer, be provided with p
+anode region and anode thereof;
In active area, n
-the unit of multiple parallel connection is provided with, in each unit and n in base
-what base was adjacent is wavy p base, is p above p base
+base, p
+base central authorities are provided with a negative electrode n
+emitter region, each n
+negative electrode is provided with above emitter region; p
+be provided with gate pole above base, and whole gate pole is looped around surrounded negative electrode n
+around emitter region;
In active area, n
-the unit of multiple parallel connection is provided with, in each unit and n in base
-what base was adjacent is wavy p base, is p above p base
+base, p
+base central authorities are provided with a negative electrode n
+emitter region, each n
+cathode electrode is provided with above emitter region; p
+be provided with gate pole above base, and whole gate electrode is looped around around surrounded cathodic region;
At the n of termination environment
-in substrate, set gradually two field limiting rings that width is identical, spacing is different in main knot outside, optionally removed the p of high concentration above field limiting ring
+district, makes to pass through p between main knot and two field limiting rings
+district is connected, and makes p above simultaneously
+district's groove becomes step shape, and step lowest surfaces is positioned at p
+the final position in district, groove depth capacity and p
+district's thickness is identical, and trench area is filled with passivation layer.
2. step groove according to claim 1-field limiting ring composite terminal structure, it is characterized in that: there is two-stage field limiting ring termination environment, the spacing of main knot and first order field limiting ring is 240 ~ 250 μm, and the spacing of first order field limiting ring and second level field limiting ring is 310 ~ 350 μm.
3. step groove according to claim 1-field limiting ring composite terminal structure, it is characterized in that: have a step groove above the field limiting ring of termination environment, first order gash depth is 35 ~ 39 μm, and first order groove width is 1250 ~ 1300 μm.
4. step groove according to claim 1-field limiting ring composite terminal structure, is characterized in that: surface passivation layer is polyimides or silica gel.
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| CN201310695830.6A CN103746002B (en) | 2013-12-17 | 2013-12-17 | A kind of step groove-field limiting ring composite terminal structure |
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| CN201310695830.6A CN103746002B (en) | 2013-12-17 | 2013-12-17 | A kind of step groove-field limiting ring composite terminal structure |
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| CN104051547B (en) * | 2014-06-18 | 2017-04-19 | 江苏润奥电子制造股份有限公司 | High-voltage rapid-soft-recovery diode and manufacturing method thereof |
| CN104392994B (en) * | 2014-10-31 | 2017-02-08 | 西安理工大学 | Dual-core GCT of corrugated base regions and transparent short circuit anodes and preparation method thereof |
| CN104795450B (en) * | 2015-03-19 | 2018-07-06 | 北京时代民芯科技有限公司 | A kind of novel high current density fast recovery diode structure and preparation method thereof |
| CN105932046B (en) * | 2016-06-01 | 2019-03-01 | 清华大学 | Edge junction termination structures towards silicon carbide high pressure high power device |
| CN109964319B (en) * | 2016-11-24 | 2022-06-07 | 日立能源瑞士股份公司 | Power semiconductor device with floating field ring termination |
| US10418356B2 (en) * | 2017-12-21 | 2019-09-17 | Nanya Technology Corporation | Diode structure and electrostatic discharge protection device including the same |
| CN109326637B (en) * | 2018-10-17 | 2021-08-24 | 杭州电子科技大学 | Stepped junction terminal extension structure of high-voltage power device |
| CN109686783A (en) * | 2018-12-27 | 2019-04-26 | 清华大学 | A kind of device with reversed through-flow function |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0661753A1 (en) * | 1994-01-04 | 1995-07-05 | Motorola, Inc. | Semiconductor structure with field limiting ring and method for making |
| CN102034856A (en) * | 2009-09-29 | 2011-04-27 | 富士电机控股株式会社 | Semiconductor device |
| CN202523715U (en) * | 2012-03-27 | 2012-11-07 | 大连理工大学 | High-density slowly varying field limiting ring structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4024990B2 (en) * | 2000-04-28 | 2007-12-19 | 株式会社ルネサステクノロジ | Semiconductor device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0661753A1 (en) * | 1994-01-04 | 1995-07-05 | Motorola, Inc. | Semiconductor structure with field limiting ring and method for making |
| CN102034856A (en) * | 2009-09-29 | 2011-04-27 | 富士电机控股株式会社 | Semiconductor device |
| CN202523715U (en) * | 2012-03-27 | 2012-11-07 | 大连理工大学 | High-density slowly varying field limiting ring structure |
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Effective date of registration: 20170705 Address after: 3, No. 22, Zhenxing East Road, Yuhang economic and Technological Development Zone, Zhejiang, Hangzhou 311100, China Patentee after: Hangzhou zephyr Semiconductor Co., Ltd. Address before: 710048 Shaanxi city of Xi'an Province Jinhua Road No. 5 Patentee before: Xi'an University of Technology |
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