CN103715201A - Array substrate, manufacturing method of array substrate, GOA unit and display apparatus - Google Patents

Array substrate, manufacturing method of array substrate, GOA unit and display apparatus Download PDF

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CN103715201A
CN103715201A CN 201310713416 CN201310713416A CN103715201A CN 103715201 A CN103715201 A CN 103715201A CN 201310713416 CN201310713416 CN 201310713416 CN 201310713416 A CN201310713416 A CN 201310713416A CN 103715201 A CN103715201 A CN 103715201A
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substrate
array
layer
channel
drain
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CN 201310713416
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Chinese (zh)
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CN103715201B (en )
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崔承镇
金熙哲
宋泳锡
刘聖烈
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京东方科技集团股份有限公司
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Abstract

An embodiment of the invention provides an array substrate, a manufacturing method of the array substrate, a GOA unit and a display apparatus, and relates to the display technical field. The array substrate comprises a gate electrode formed on the surface of a substrate, a gate insulation layer, an active layer and a source drain metal layer. The source drain metal layer is used for forming source and drain electrodes and channel regions of TFTs. The array substrate comprises a plurality of first TFTs and a plurality of second TFTs, wherein the length of the channel region of the first TFT is smaller than the length of the channel region of the second TFT. The array substrate in the invention is capable of preventing the poor open circuit due to the disconnection of the TFT channel regions in the GOA unit.

Description

—种阵列基板及其制造方法、GOA单元以及显示装置 - Species array substrate and a manufacturing method, GOA unit and a display device

技术领域 FIELD

[0001] 本发明涉及显示技术领域,尤其涉及一种阵列基板及其制造方法、GOA单元以及显 [0001] The present invention relates to display technology, and particularly relates to a method of manufacturing an array substrate, and substantially the GOA unit

示装置。 Display device.

背景技术 Background technique

[0002] 为了提高显示装置的显示效果,越来越多的人开始将注意力投向显示装置的窄边框设计,现有技术对于窄边框显示器的制作通常是将工艺边际量压缩至极限的方法来实现,其中一项非常重要的技术就是阵列基板行驱动(Gate Driver on Array,简称GOA)的技术量产化的实现。 [0002] In order to improve the display effect of the display device, more and more people begin to show attention toward the narrow frame design of the device, the prior art for the production of a narrow border of the display process of the margin is typically compressed to a method to limit production of the implemented realization, which is a very important technology array substrate row driver (Gate driver on array, referred GOA) technology amount. 利用GOA技术将栅极开关电路集成在显示面板的阵列基板上以形成对显示面板的扫描驱动,从而可以省掉栅极驱动集成电路部分,其不仅可以从材料成本和制作工艺两方面降低产品成本,而且显示面板可以做到两边对称和窄边框的美观设计。 GOA technology using a gate switch circuit is integrated to form a display panel, a scan driver, so that the gate driving integrated circuit portion can be omitted, which can not only reduce the cost of the product from both the material cost and manufacturing process on the array substrate of the display panel and the display panel may be done on both sides and narrow border aesthetic design.

[0003] 在GOA单元中通常形成有大小与形状多样的TFT(Thin Film Transistor,薄膜场效应晶体管),这样在通过构图工艺形成TFT的源漏极的过程中,源漏电极灰化工艺中所使用的半色调掩膜板(Half Tone Mask,HTM)的透光率需要根据TFT大小产生变化,HTM透光率的变化将引起灰化工艺中不同的TFT的沟道对应位置处的光刻胶的厚度不一致,从而最终导致后续刻蚀后光刻胶相对薄弱的TFT中的沟道发生断开不良。 Process [0003] generally formed of various size and shape TFT (Thin Film Transistor, thin film transistor) in GOA unit, so that the source and drain of the TFT is formed through a patterning process, the source-drain electrode as an ashing process half tone mask (half tone mask, HTM) used according to the light transmittance required to produce a change the size of TFT, the change in light transmittance caused by HTM photoresist ashing process at the different positions corresponding to the channel of the TFT inconsistent thickness, thereby resulting in the subsequent etching of the photoresist is relatively weak in the TFT channel disconnection failure occurs.

[0004] 在GOA单元中,通常包括位于不同区域的两种TFT,这两种TFT的大小并不相同,其的剖面图可以分别如图1和图2所示,其中两种TFT的结构和形成过程相同,均包括依次形成在透明基板I表面的栅极2、栅绝缘层(图中未示出)、有源层3以及源漏金属层4,为了形成沟道,源漏金属层的表面形成有光刻胶层5,当使用HTM曝光显影后,TFT沟道位置对应的源漏金属层4上方的光刻胶层5所保留的光刻胶的厚度并不相同,可以看到,图1所示TFT结构中对应沟道区域的光刻胶层5厚度为hl,图2所示TFT结构中对应沟道区域的光刻胶层5厚度为h2,hl <h2。 [0004] In GOA unit generally comprises two kinds of different areas of TFT, the TFT size of the two are not the same, it may be a sectional view in Figures 1 and 2, respectively, in which two kinds of TFT structures and the same formation process are sequentially formed on the gate comprising a surface of the transparent substrate I 2, a gate insulating layer (not shown), an active layer 3 and the source-drain metal layer 4, in order to form a channel, source-drain metal layer the photoresist layer is formed on the surface 5, after exposure and development using HTM, the TFT source-drain channel position corresponding to the thickness of the photoresist resist layer 5 over the retained metal layer 4 is not the same, it can be seen the TFT structure shown in figure 1 corresponding to the channel region of the photoresist layer 5 having a thickness of hl, TFT structure shown in FIG. 2 corresponding to the channel region of the photoresist layer 5 having a thickness of h2, hl <h2. 由于hi的厚度较小,在进一步通过构图工艺形成沟道的过程中,可能会对有源层3产生不必要的刻蚀,这将导致TFT中沟道区域断开,产生不良,使得TFT无法实现相应的功能。 Due to the small thickness hi, and the channel is formed in the process by further patterning process, the active layer 3 may be unnecessary etching, which will result in the TFT channel region is disconnected, adversely, so that TFT can not achieve the corresponding functions.

发明内容 SUMMARY

[0005] 本发明的实施例提供一种阵列基板及其制造方法、GOA单元以及显示装置,可以避免GOA单元中TFT沟道区域断开而导致的断路不良。 Example [0005] The present invention provides a method of manufacturing the array substrate, and a display device unit GOA, GOA avoid undesirable breaking unit OFF the TFT channel region caused.

[0006] 本发明实施例的一方面,提供一种阵列基板,包括形成在基板表面的栅极、栅绝缘层、有源层以及源漏金属层,所述源漏金属层用于形成TFT的源漏极和沟道区域,所述阵列基板包括多个第一TFT和多个第二TFT,所述第一TFT的沟道区域的长度小于所述第二TFT的沟道区域的长度。 [0006] In an aspect of embodiments of the present invention, there is provided an array substrate comprising a gate electrode formed on the surface of the substrate, a gate insulating layer, an active layer and source-drain metal layer, the metal layer for forming the source and drain of the TFT source drain and channel region of the TFT array substrate includes a first plurality and a second plurality of TFT, the TFT channel length of the first region is less than the length of the second TFT channel region.

[0007] 具体的,在形成TFT的源漏极和沟道区域之前,所述源漏金属层的表面还形成有光刻胶层。 [0007] Specifically, prior to formation of the source and drain regions and a channel TFT, the source-drain metal layer further formed on the surface of the photoresist layer.

[0008] 其中,所述光刻胶层对应TFT的沟道区域的厚度小于对应TFT的源漏极区域的厚度。 [0008] wherein, the photoresist layer corresponding to the channel region of the TFT corresponding to a thickness less than the thickness of the source and drain regions of the TFT.

[0009] 所述光刻胶层对应所述第一TFT的沟道区域的厚度与对应所述第二TFT的沟道区域的厚度相等。 [0009] The photoresist layer corresponding to the thickness equal to the thickness corresponding to the channel region of the second TFT channel region of the first TFT.

[0010] 在本发明实施例中,所述光刻胶层采用灰色调掩膜板曝光显影形成。 [0010] In an embodiment of the present invention, the photoresist layer using a gray-tone mask exposure and development are formed.

[0011] 其中,所述灰色调掩膜板包括灰色调膜层,所述灰色调膜层包括多个第一区域和多个第二区域,所述第一区域对应所述第一TFT的沟道区域,所述第二区域对应所述第二TFT的沟道区域。 [0011] wherein, the gray-tone mask include a gray-tone film layer, said layer comprising a plurality of gray-tone of the first region and a second plurality of regions, corresponding to the first region of the first TFT groove channel region, the second region corresponding to a channel region of the second TFT.

[0012] 位于所述第一区域的灰色调膜层的厚度大于位于所述第二区域的灰色调膜层的厚度。 [0012] The thickness of the region in the first gray tone film layer in the second region greater than the thickness of gray film layer.

[0013] 具体的,位于所述第一区域的灰色调膜层的厚度与位于所述第二区域的灰色调膜层的厚度差为1500-2000 A。 [0013] Specifically, in the first region of the gray-tone film layer thickness of the second layer is located in the gray-tone region thickness difference of 1500-2000 A.

[0014] 所述第一TFT的沟道区域的长度为4.0〜5.0 μ m。 Length of the channel region [0014] of the first TFT is 4.0~5.0 μ m.

[0015] 所述第二TFT的沟道区域的长度为5.0〜6.0 μ m。 Length of the channel region [0015] of the second TFT is 5.0~6.0 μ m.

[0016] 本发明实施例还提供一种阵列基板,包括多个如上所述的第一TFT和第二TFT。 Example [0016] The present invention further provides an array substrate comprising a plurality of a first TFT and a second TFT as described above.

[0017] 另一方面,本发明实施例还提供一种显示装置,包括如上所述的阵列基板或包括如上所述的GOA单元。 [0017] On the other hand, embodiments of the present invention further provides a display device comprising an array substrate as described above or the unit as described above comprises GOA.

[0018] 此外,本发明实施例还提供一种阵列基板的制造方法,包括: [0018] Further, embodiments of the present invention further provides a method of manufacturing an array substrate, comprising:

[0019] 在基板的表面依次形成栅极、栅绝缘层、有源层以及源漏金属层。 [0019] The gate electrode are sequentially formed on the surface of the substrate, a gate insulating layer, an active layer and source-drain metal layer.

[0020] 在形成有所述源漏金属层的基板的表面通过构图工艺处理形成多个第一TFT和第二TFT的源漏极和沟道区域,所述第一TFT的沟道区域的长度小于所述第二TFT的沟道区域的长度。 [0020] In the surface of the substrate formed with the source drain metal layer forming the source and drain regions and a plurality of first channel TFT and the second TFT by the patterning process, the length of the channel region of the first TFT less than the length of the channel region of the second TFT.

[0021] 本发明实施例提供的阵列基板及其制造方法、GOA单元以及显示装置,在形成TFT沟道的过程中,当第一TFT沟道区域的光刻胶层的厚度小于第二TFT沟道区域的光刻胶层的厚度时,通过降低第一TFT的沟道区域的长度,相应的将减少第一TFT沟道区域的光刻胶层的曝光量,从而可以有效实现第一TFT沟道区域的光刻胶层的厚度与第二TFT沟道区域的光刻胶层的厚度之间无明显段差。 [0021] The method of manufacturing the array substrate according to an embodiment of the present invention, the GOA unit and a display device, the process of forming the TFT channel, when the thickness of the photoresist layer of the first TFT channel region is smaller than the second TFT groove when the thickness of the photoresist layer of the channel region, by reducing the length of the channel region of the first TFT, the TFT corresponding to reduce the exposure amount of the photoresist layer, a first channel region, so as to effectively implement the first TFT groove no thickness between the photoresist layer and the second channel region of the TFT channel region of the photoresist layer significant difference section. 通过这样一种补偿的方法,可以使得在使用HTM形成TFT沟道区域的过程中,不同大小或形状的TFT在形成沟道区域时,沟道区域所对应的光刻胶的厚度不会因HTM光透过率较大而变得较薄,从而避免了GOA单元中TFT在形成沟道区域时因刻蚀厚度过大而引起的沟道区域断开,从而避免了TFT沟道区域的断路不良,显著提闻了广品的质量。 By such a method of compensation can be made using the TFT channel region is formed HTM process, TFT different sizes or shapes in forming the channel region, the channel region corresponding to the thickness of the photoresist will not HTM larger light transmittance becomes thinner, thus avoiding the channel region when the TFT GOA unit is formed by etching the thickness of the channel region caused by excessive off, thus avoiding the undesirable breaking of the TFT channel region , significantly improve the quality of smell wide products.

附图说明 BRIEF DESCRIPTION

[0022] 为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。 [0022] In order to more clearly illustrate the technical solutions in the embodiments or the prior art embodiment of the present invention, briefly introduced hereinafter, embodiments are described below in the accompanying drawings or described in the prior art needed to be used in describing the embodiments the drawings are only some embodiments of the present invention, those of ordinary skill in the art is concerned, without creative efforts, can derive from these drawings other drawings.

[0023] 图1为现有技术中一种阵列基板的结构示意图; [0023] FIG. 1 is a schematic diagram of one prior art structure of the substrate of the array;

[0024] 图2为现有技术中另一阵列基板的结构不意图; [0024] FIG. 2 is a configuration of another prior art is not intended array substrate;

[0025] 图3为本发明实施例提供的一种阵列基板中第一TFT的形成结构示意图;[0026] 图4为本发明实施例提供的一种阵列基板中第二TFT的形成结构示意图; [0025] FIG. 3 is a schematic structure of the first TFT is formed of an array substrate provided in the embodiment of the invention; [0026] FIG. 4 is a schematic structure forming an array substrate provided in the embodiment of the invention the second TFT;

[0027] 图5为形成本发明实施例提供的阵列基板的一种灰色调掩膜板的结构示意图; A schematic structural diagram of an array substrate gray-tone mask is provided in [0027] FIG. 5 is formed embodiment of the present invention;

[0028] 图6为本发明实施例中TFT的沟道区域的长度L与灰色调膜层50的厚度T的关系不意图; [0028] FIG. 6 is not intended relation embodiment the length L of the channel region of the TFT and the film thickness T of the gray tones of the embodiment 50 of the present invention;

[0029] 图7为本发明实施例提供的一种阵列基板制造方法的流程示意图; [0029] FIG. 7 is a schematic flow An array substrate manufacturing method according to an embodiment of the present invention;

[0030] 图8为形成TFT沟道区域的方法流程示意图。 [0030] FIG. 8 is a TFT channel region is formed flowchart of a method.

具体实施方式 detailed description

[0031] 下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。 [0031] below in conjunction with the present invention in the accompanying drawings, technical solutions of embodiments of the present invention are clearly and completely described, obviously, the described embodiments are merely part of embodiments of the present invention, but not all embodiments example. 基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。 Based on the embodiments of the present invention, all other embodiments of ordinary skill in the art without any creative effort shall fall within the scope of the present invention.

[0032] 本发明实施例提供的阵列基板,如图3和图4所示,包括形成在基板30表面的栅极31、栅绝缘层(图中未示出)、有源层32以及源漏金属层33,该源漏金属层33用于形成TFT的源漏极和沟道区域,其中,阵列基板包括多个第一TFT和多个第二TFT,第一TFT的结构可以如图3所示,第二TFT的结构可以如图4所示,其中第一TFT的沟道区域的长度L1小于第二TFT的沟道区域的长度L2。 [0032] The array substrate according to an embodiment of the present invention, shown in FIGS. 3 and 4, comprises a gate electrode 30 is formed on the surface of the substrate 31, a gate insulating layer (not shown), an active layer 32 and the source and drain metal layer 33, the source-drain metal layer 33 to form source drain and channel regions of the TFT, wherein the TFT array substrate includes a plurality of a first plurality and a second TFT, the first TFT structure shown in Figure 3 can be shows, the second TFT structures may be shown in Figure 4, wherein the length of the channel region of the first TFT is L1 shorter than the length L2 of the channel region of the second TFT.

[0033] 其中,基板30具体可以采用包括玻璃或透明树脂等材料制成的透明基板,栅极31、栅绝缘层32以及有源层可以分别通过构图工艺依次形成在透明基板30的表面。 [0033] wherein, the substrate 30 may be employed specifically include a transparent substrate made of glass or a transparent resin material, the gate 31, the gate insulating layer and an active layer 32, respectively, may be sequentially formed on the transparent substrate 30 by a patterning process. 源漏金属层33可以通过一次构图工艺处理分别形成TFT的源漏极和沟道区域,其中源漏金属层34在对应有源层位置处断开,从而形成TFT的沟道区域。 Source-drain metal layer 33 may be formed by a patterning process and a channel region of the TFT source and drain, respectively, wherein the source-drain metal layer 34 is opened at a position corresponding to the active layer, thereby forming a channel region of the TFT.

[0034] 需要说明的是,第一TFT和第二TFT均可以位于G0A单元中,且第一TFT与第二TFT的大小或形状不同。 [0034] Incidentally, the first TFT and the second TFT can be located G0A unit, and the first TFT and the second TFT of a different size or shape. 在本发明实施例中,是以第一TFT的尺寸大小小于第二TFT为例进行的说明,当第一TFT的尺寸大小小于第二TFT时,第一TFT在形成沟道区域时通常因刻蚀厚度过大较容易出现沟道区域断开的情况。 In an embodiment of the present invention, the first TFT is smaller than the size of the second TFT for an example, when the first TFT is smaller than the size of the second TFT, the first TFT is formed generally in the moment when the channel region due to where the channel thickness is too large etched area are more prone to disconnection. 当然,本发明实施例在此也仅仅是举例说明,而并非对本发明所做的限制,在本发明实施例中,第一TFT可以包括在形成沟道区域时因刻蚀厚度过大而出现沟道区域断开的这样一类的TFT。 Of course, in this embodiment of the invention it is only illustrative and do not limit the present invention, in the embodiment of the invention, the first TFT may include a large thickness due to etching occurs when the groove is formed in the channel region such a TFT channel region off class.

[0035] 本发明实施例提供的阵列基板,在形成TFT沟道的过程中,当第一TFT沟道区域的光刻胶层的厚度小于第二TFT沟道区域的光刻胶层的厚度时,通过降低第一TFT的沟道区域的长度,相应的将减少第一TFT沟道区域的光刻胶层的曝光量,从而可以有效实现第一TFT沟道区域的光刻胶层的厚度与第二TFT沟道区域的光刻胶层的厚度之间无明显段差。 [0035] In the process of forming the TFT channel, when the thickness of the photoresist layer of the first TFT channel region is smaller than the thickness of the photoresist layer in the second channel region when the TFT array substrate according to an embodiment of the present invention, by reducing the length of the channel region of the first TFT, the TFT corresponding to reduce the exposure amount of the photoresist layer, a first channel region, so as to effectively achieve a first thickness of the photoresist layer and the TFT channel region no between the thickness of the photoresist layer in the second region of the TFT channel section significant difference. 通过这样一种补偿的方法,可以使得在使用HTM形成TFT沟道区域的过程中,不同大小或形状的TFT在形成沟道区域时,沟道区域所对应的光刻胶的厚度不会因HTM光透过率较大而变得较薄,从而避免了G0A单元中TFT在形成沟道区域时因刻蚀厚度过大而引起的沟道区域断开,从而避免了TFT沟道区域的断路不良,显著提高了产品的质量。 By such a method of compensation can be made using the TFT channel region is formed HTM process, TFT different sizes or shapes in forming the channel region, the channel region corresponding to the thickness of the photoresist will not HTM larger light transmittance becomes thinner, thus avoiding the channel region when the TFT G0A unit is formed by etching the thickness of the channel region caused by excessive off, thus avoiding the undesirable breaking of the TFT channel region significantly improved the quality of the product.

[0036] 进一步地,如图3或图4所示,在形成TFT的源漏极和沟道区域之前,源漏金属层33的表面还可以形成有光刻胶层34。 [0036] Further, as shown in FIG. 3 or FIG. 4, before forming the source drain and channel region of the TFT, the surface of the metal layer 33 may be formed with a source-drain layer 34 of photoresist.

[0037] 其中,光刻胶层34对应TFT的沟道区域的厚度小于对应TFT的源漏极区域的厚度。 [0037] wherein a thickness corresponding to the channel region of the TFT is less than the thickness of the photoresist layer 34 corresponding to the source and drain regions of the TFT. [0038] 优选的,在如图3和图4所示的阵列基板结构中,光刻胶层34对应第一TFT的沟道区域的厚度tl与对应第二TFT的沟道区域的厚度t2可以相等。 [0038] Preferably, in the array substrate shown in FIG. 3 and FIG. 4, the photoresist layer 34 corresponding to the thickness tl and the thickness t2 of the second TFT corresponds to the channel region of the channel region of the first TFT may be equal. 这样一来,可以进一步保证第一TFT在形成沟道区域时不会因刻蚀厚度过大而引起沟道区域断开,从而避免了TFT沟道区域的断路不良。 As a result, the first TFT may further ensure that when the channel region is formed by etching is not caused by excessive thickness of the channel region is disconnected, thereby avoiding undesirable disconnection of the TFT channel region.

[0039] 进一步地,光刻胶层34可以采用灰色调掩膜板曝光显影形成。 [0039] Further, the gray-tone photoresist layer 34 may be formed by mask exposure and development.

[0040] 其中,灰色调掩膜板的结构可以如图5所示,包括灰色调膜层50,其中,灰色调膜层50又包括多个第一区域51和多个第二区域52,该第一区域51对应第一TFT的沟道区域,第二区域52对应第二TFT的沟道区域。 [0040] wherein the structure may be gray-tone mask shown in Figure 5, comprises a film layer 50 gray, wherein the gray-tone film 50 in turn comprises a plurality of first regions 51 and a plurality of second regions 52, the a first region 51 corresponding to the channel region of the first TFT, a second region 52 corresponding to the channel region of the second TFT.

[0041] 位于第一区域51的灰色调膜层50的厚度Tl大于位于第二区域52的灰色调膜层50的厚度T2。 [0041] The gray-tone layer in the first region 51 is greater than the thickness Tl 50 located in the second region of the gray-tone film layer 52 of a thickness of 50 T2.

[0042] 需要说明的是,在TFT的制作过程中,TFT的沟道区域的长度越小,在进行构图工艺以形成沟道区域时,应当相应的减少TFT沟道区域的光刻胶层的曝光量。 [0042] Incidentally, in the production process of the TFT, the length of the channel region of the TFT is smaller, a patterning process is performed to form a photoresist layer of the channel region, it should be a corresponding decrease in the TFT channel region exposure. 当采用灰色调掩膜板时,随着灰色调膜层厚度的增加,掩膜板的透光率也将逐渐下降,相应的对于TFT沟道区域的光刻胶层的曝光量也会减少。 When the gray-tone mask, gray tone with increasing film thickness, the transmittance of the mask plate will gradually decrease, corresponding to the TFT channel region of the photoresist layer exposure will be reduced.

[0043] 具体的,在其他外界条件不变的情况下,TFT的沟道区域的长度L与灰色调膜层50的厚度T的关系可以如图6所示,其中TFT的沟道区域的长度L的单位为μ m,灰色调膜层50的厚度T的单位为A。 [0043] Specifically, in the case of other external conditions remain unchanged, the relationship between the length L of the channel region of the TFT and the film thickness T of the gray tone 50 may be as shown in FIG 6, wherein the length of the channel region of the TFT L is in μ m, the unit gray film thickness T is 50 A. 可以看到,随着TFT沟道区域的长度L的增加,所需要的透光率也随之增加,相应的灰色调膜层50的厚度T随之减少以实现透光率的增加,当TFT沟道区域的长度L增加到6 μ m以上时,灰色调膜层50的厚度T将不再随着TFT沟道区域的长度L的增加而减少。 It can be seen as increasing the length L of the TFT channel region, the light transmittance required also increases, the corresponding gray-tone of the film thickness T 50 be reduced to achieve increased light transmittance, when the TFT the length L to the channel region is 6 μ m or more, the film thickness T 50 gray tones will no longer with increasing length L of the channel region of the TFT is reduced.

[0044] 作为一种优选的实施例,位于第一区域51的灰色调膜层50的厚度Tl与位于第二区域52的灰色调膜层50的厚度T2差可以为丨500〜2000 A。 [0044] As a preferred embodiment, the thickness of the gray area 51 at the first film layer 50 with a thickness Tl, T2 gray-tone difference is located in the second region 52 of the layer 50 may be Shu 500~2000 A. 相应的,第一TFT的沟道区域的长度LI可以为4.0〜5.0 μ m,第二TFT的沟道区域的长度L2可以为5.0〜6.0 μ m。 Accordingly, the length LI of the first TFT channel region may be 4.0~5.0 μ m, the length L2 of the second TFT channel region may be 5.0~6.0 μ m. 例如,LI具体可以选取4.5 μ m,L2具体可以选取5.5 μ m。 For example, LI can select particular 4.5 μ m, L2 may be selected specifically 5.5 μ m. 采用这样一种尺寸的TFT的沟道长度设计,可以有效减少第一TFT沟道区域的光刻胶层的曝光量,从而可以有效实现第一TFT沟道区域的光刻胶层的厚度与第二TFT沟道区域的光刻胶层的厚度之间无明显段差。 With such a size of the TFT channel length designed to reduce exposure of the photoresist layer of the first TFT channel region, which can effectively achieve a thickness of the first resist layer of the first TFT channel region no thickness of the photoresist layer between two distinct segments of the channel region of TFT difference.

[0045] 通过这样一种补偿的方法,可以使得在使用HTM形成TFT沟道区域的过程中,不同大小或形状的TFT在形成沟道区域时,沟道区域所对应的光刻胶的厚度不会因HTM光透过率较大而变得较薄,从而避免了GOA单元中TFT在形成沟道区域时因刻蚀厚度过大而引起的沟道区域断开,从而避免了TFT沟道区域的断路不良,显著提高了产品的质量。 [0045] By such a method of compensation can be made using the TFT channel region is formed HTM process, TFT different sizes or shapes in forming the channel region, the channel region corresponding to the thickness of the photoresist is not HTM light transmittance due to the larger becomes thinner, thus avoiding the channel region when the TFT GOA unit is formed by etching the thickness of the channel region caused by excessive off, thus avoiding the TFT channel region bad break, significantly improved the quality of the product.

[0046] 需要说明的是,以上所述的TFT均是以底栅结构为例进行的说明,本发明实施例提供的这样一种结构的阵列基板同样可以采用顶栅结构的TFT。 [0046] Incidentally, the above-described TFT is a bottom gate structure is described as an example of a configuration of an array substrate according to an embodiment of the present invention is also a top-gate structure TFT may be employed. 与底栅结构的TFT的不同之处在于,在顶栅结构的TFT中,包括依次形成在基板表面的源漏金属层、有源层、栅绝缘层以及栅极,源漏金属层用于形成TFT的源漏极以及TFT的沟道区域。 And a bottom gate TFT structure differs from that in the TFT of the top gate structure, including a drain are sequentially formed on the surface of the metal layer of the source substrate, an active layer, a gate insulating layer and a gate metal layer for forming the source and drain source and drain of the TFT channel region of the TFT. 为了避免TFT在形成沟道区域时因刻蚀厚度过大而引起沟道区域断开,同样可以采用第一TFT的沟道区域的长度LI小于第二TFT的沟道区域的长度L2的这样一种设计。 In order to avoid the formation of a channel region of a TFT is etched by a thickness of the channel region caused by excessive disconnected, may also be employed in the region of the channel length L2 of the first length LI TFT channel region is smaller than a second TFT so kinds of design.

[0047] 本发明实施例提供的GOA单元,包括多个如上所述的第一TFT和第二TFT。 GOA unit provided in the [0047] embodiment of the present invention, as described above, comprising a plurality of a first TFT and a second TFT.

[0048] 这样一种结构的GOA单元,在形成TFT沟道的过程中,当第一TFT沟道区域的光刻胶层的厚度小于第二TFT沟道区域的光刻胶层的厚度时,通过降低第一TFT的沟道区域的长度,相应的将减少第一TFT沟道区域的光刻胶层的曝光量,从而可以有效实现第一TFT沟道区域的光刻胶层的厚度与第二TFT沟道区域的光刻胶层的厚度之间无明显段差。 [0048] GOA unit of such a configuration, the process of forming the TFT channel, when the thickness of the photoresist layer of the first TFT channel region is smaller than the thickness of the photoresist layer when the second TFT channel region, by reducing the length of the channel region of the first TFT, corresponding to reduce the exposure of the photoresist layer of the first TFT channel region, which can effectively achieve a thickness of the first resist layer of the first TFT channel region no thickness of the photoresist layer between two distinct segments of the channel region of TFT difference. 通过这样一种补偿的方法,可以使得在使用HTM形成TFT沟道区域的过程中,不同大小或形状的TFT在形成沟道区域时,沟道区域所对应的光刻胶的厚度不会因HTM光透过率较大而变得较薄,从而避免了GOA单元中TFT在形成沟道区域时因刻蚀厚度过大而引起的沟道区域断开,从而避免了TFT沟道区域的断路不良,显著提高了产品的质量。 By such a method of compensation can be made using the TFT channel region is formed HTM process, TFT different sizes or shapes in forming the channel region, the channel region corresponding to the thickness of the photoresist will not HTM larger light transmittance becomes thinner, thus avoiding the channel region when the TFT GOA unit is formed by etching the thickness of the channel region caused by excessive off, thus avoiding the undesirable breaking of the TFT channel region significantly improved the quality of the product.

[0049] 此外,本发明实施例还提供一种显示装置,具体的,该显示装置可以包括如上所述的阵列基板或包括如上所述的GOA单元。 [0049] Further, embodiments of the present invention further provides a display apparatus, particularly, the display device includes an array substrate as described above may comprise or GOA unit described above.

[0050] 需要说明的是本发明所提供的显示装置可以为:液晶面板、电子纸、OLED面板、液晶电视、液晶显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件。 [0050] Note that a display device of the present invention may be provided: a liquid crystal panel, an electronic-paper, OLED panels, liquid crystal TVs, liquid crystal display, digital photo frame, a mobile phone, a tablet computer or any product means having a display function.

[0051] 由于阵列基板或GOA单元的结构已在前述实施例中做了详细的描述,此处不再赘述。 [0051] Since the structure of the array substrate or a GOA unit has made a detailed description of the embodiments is not repeated here.

[0052] 本发明实施例提供的阵列基板的制造方法,如图7所示,包括: [0052] A method for manufacturing an array substrate according to an embodiment of the present invention, shown in Figure 7, comprising:

[0053] S701、在基板的表面依次形成栅极、栅绝缘层、有源层以及源漏金属层。 [0053] S701, sequentially forming a gate electrode on the surface of the substrate, a gate insulating layer, an active layer and source-drain metal layer.

[0054] S702、在形成有源漏金属层的基板的表面通过构图工艺处理形成多个第一TFT和第二TFT的源漏极和沟道区域,该第一TFT的沟道区域的长度小于第二TFT的沟道区域的长度。 [0054] S702, a plurality of the first TFT and the source drain and channel regions of the second TFT active surface of the substrate is formed by forming a drain metal layer patterning process, the length of the first TFT channel region is less than length of the channel region of the second TFT.

[0055] 需要说明的是,第一TFT和第二TFT均可以位于GOA单元中,且第一TFT与第二TFT的大小或形状不同。 [0055] Incidentally, the first TFT and the second TFT can be located GOA unit, and the first TFT and the second TFT of a different size or shape. 在本发明实施例中,是以第一TFT的尺寸大小小于第二TFT为例进行的说明,当第一TFT的尺寸大小小于第二TFT时,第一TFT在形成沟道区域时通常因刻蚀厚度过大较容易出现沟道区域断开的情况。 In an embodiment of the present invention, the first TFT is smaller than the size of the second TFT for an example, when the first TFT is smaller than the size of the second TFT, the first TFT is formed generally in the moment when the channel region due to where the channel thickness is too large etched area are more prone to disconnection. 当然,本发明实施例在此也仅仅是举例说明,而并非对本发明所做的限制,在本发明实施例中,第一TFT可以包括在形成沟道区域时因刻蚀厚度过大而出现沟道区域断开的这样一类的TFT。 Of course, in this embodiment of the invention it is only illustrative and do not limit the present invention, in the embodiment of the invention, the first TFT may include a large thickness due to etching occurs when the groove is formed in the channel region such a TFT channel region off class.

[0056] 本发明实施例提供的阵列基板制造方法,在形成TFT沟道的过程中,当第一TFT沟道区域的光刻胶层的厚度小于第二TFT沟道区域的光刻胶层的厚度时,通过降低第一TFT的沟道区域的长度,相应的将减少第一TFT沟道区域的光刻胶层的曝光量,从而可以有效实现第一TFT沟道区域的光刻胶层的厚度与第二TFT沟道区域的光刻胶层的厚度之间无明显段差。 [0056] photoresist layer producing method of an array substrate according to an embodiment of the present invention, in the process of forming the TFT channel, when the thickness of the photoresist layer of the first TFT channel region is smaller than the second TFT channel region thickness, by reducing the length of the channel region of the first TFT, the TFT corresponding to reduce the exposure amount of the photoresist layer, a first channel region, so that the first photoresist layer can be effectively achieved TFT channel region no thickness between the photoresist layer and the second TFT channel region significant difference section. 通过这样一种补偿的方法,可以使得在使用HTM形成TFT沟道区域的过程中,不同大小或形状的TFT在形成沟道区域时,沟道区域所对应的光刻胶的厚度不会因HTM光透过率较大而变得较薄,从而避免了GOA单元中TFT在形成沟道区域时因刻蚀厚度过大而引起的沟道区域断开,从而避免了TFT沟道区域的断路不良,显著提高了产品的质量。 By such a method of compensation can be made using the TFT channel region is formed HTM process, TFT different sizes or shapes in forming the channel region, the channel region corresponding to the thickness of the photoresist will not HTM larger light transmittance becomes thinner, thus avoiding the channel region when the TFT GOA unit is formed by etching the thickness of the channel region caused by excessive off, thus avoiding the undesirable breaking of the TFT channel region significantly improved the quality of the product.

[0057] 进一步地,如图8所示,所述在形成有源漏金属层的基板的表面通过构图工艺处理形成多个第一TFT和第二TFT的源漏极和沟道区域具体可以包括: [0057] Further, as shown in FIG. 8, formed on the active surface of the substrate a plurality of drain metal layer forming a first TFT and a drain of the second TFT and the channel region by a patterning process may specifically include :

[0058] S801、在源漏金属层的表面形成光刻胶层。 [0058] S801, a photoresist layer is formed on source-drain metal layer on the surface.

[0059] S802、采用灰色调掩膜板对光刻胶层进行曝光显影,以使得光刻胶层对应TFT的沟道区域的厚度小于对应TFT的源漏极区域的厚度,且光刻胶层对应第一TFT的沟道区域的厚度与对应第二TFT的沟道区域的厚度相等。 [0059] S802, gray-tone mask for exposing and developing the photoresist layer so that the thickness of the photoresist layer corresponding to the channel region of the TFT is less than the thickness corresponding to the source and drain regions of the TFT, and the photoresist layer equal to the thickness corresponding to the channel region of the first TFT channel region corresponding to the thickness of the second TFT.

[0060] 其中,灰色调掩膜板的结构可以如图5所示,包括灰色调膜层50,其中,灰色调膜层50又包括多个第一区域51和多个第二区域52,该第一区域51对应第一TFT的沟道区域,第二区域52对应第二TFT的沟道区域。 [0060] wherein the structure may be gray-tone mask shown in Figure 5, comprises a film layer 50 gray, wherein the gray-tone film 50 in turn comprises a plurality of first regions 51 and a plurality of second regions 52, the a first region 51 corresponding to the channel region of the first TFT, a second region 52 corresponding to the channel region of the second TFT. 位于第一区域51的灰色调膜层50的厚度T1大于位于第二区域52的灰色调膜层50的厚度T2。 Gray film thickness 51 located in the first region 50 of the gray-tone T1 is greater than the film thickness of the second region 52 of the 50 T2.

[0061] S803、刻蚀掉TFT的沟道区域对应的光刻胶层,剥离剩余的光刻胶层,形成多个第一TFT和第二TFT的源漏极和沟道区域。 [0061] S803, etching away the photoresist layer corresponding to the channel region of the TFT, stripping of the remaining photoresist layer, forming a plurality of source and drain regions and a channel of the first TFT and the second TFT.

[0062] 作为一种优选的实施例,位于第一区域的灰色调膜层的厚度T1与位于第二区域的灰色调膜层的厚度差可以为1500~2000 A。 [0062] As a preferred embodiment, the thickness of the film layer at the first gray region with the gray-tone T1 film thickness difference in the second region may be 1500 ~ 2000 A. 相应的,第一TFT的沟道区域的长度可以为4.0~5.ΟμίΉ,第二TFT的沟道区域的长度可以为5.0~6.Ομπι。 Accordingly, the length of the first TFT channel region may be 4.0 ~ 5.ΟμίΉ, the length of the channel region of the second TFT may be 5.0 ~ 6.Ομπι. 例如,第一TFT的沟道区域的长度具体可以选取4.5 μ m,第二TFT的沟道区域的长度具体可以选取5.5 μ m。 For example, the length of the channel region of the first TFT may be selected in particular 4.5 μ m, the length of the channel region of the second TFT may be selected specifically 5.5 μ m. 采用这样一种尺寸的TFT的沟道长度设计,可以有效减少第一TFT沟道区域的光刻胶层的曝光量,从而可以有效实现第一TFT沟道区域的光刻胶层的厚度与第二TFT沟道区域的光刻胶层的厚度之间无明显段差。 With such a size of the TFT channel length designed to reduce exposure of the photoresist layer of the first TFT channel region, which can effectively achieve a thickness of the first resist layer of the first TFT channel region no thickness of the photoresist layer between two distinct segments of the channel region of TFT difference.

[0063] 通过这样一种补偿的方法,可以使得在使用HTM形成TFT沟道区域的过程中,不同大小或形状的TFT在形成沟道区域时,沟道区域所对应的光刻胶的厚度不会因HTM光透过率较大而变得较薄,从而避免了G0A单元中TFT在形成沟道区域时因刻蚀厚度过大而引起的沟道区域断开,从而避免了TFT沟道区域的断路不良,显著提高了产品的质量。 [0063] By such a method of compensation can be made using the TFT channel region is formed HTM process, TFT different sizes or shapes in forming the channel region, the channel region corresponding to the thickness of the photoresist is not HTM light transmittance due to the larger becomes thinner, thus avoiding the channel region when the TFT G0A unit is formed by etching the thickness of the channel region caused by excessive off, thus avoiding the TFT channel region bad break, significantly improved the quality of the product.

[0064] 以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。 [0064] The above are only specific embodiments of the present invention, but the scope of the present invention is not limited thereto, any skilled in the art in the art within the technical scope of the present invention is disclosed, variations may readily occur or Alternatively, it shall fall within the protection scope of the present invention. 因此,本发明的保护范围应以所述权利要求的保护范围为准。 Accordingly, the scope of the present invention should be defined by the scope of the claims.

Claims (11)

  1. 1.一种阵列基板,包括形成在基板表面的栅极、栅绝缘层、有源层以及源漏金属层,所述源漏金属层用于形成TFT的源漏极和沟道区域,其特征在于,所述阵列基板包括多个第一TFT和多个第二TFT,所述第一TFT的沟道区域的长度小于所述第二TFT的沟道区域的长度。 1. An array substrate, comprising a gate electrode formed on the surface of the substrate, a gate insulating layer, an active layer and source-drain metal layer, the source-drain metal layer for forming the source drain and channel region of the TFT, wherein wherein the array substrate comprises a plurality of TFT and a first plurality of the second TFT, the TFT channel length of the first region is less than the length of the channel region of the second TFT.
  2. 2.根据权利要求1所述的阵列基板,其特征在于,在形成TFT的源漏极和沟道区域之前,所述源漏金属层的表面还形成有光刻胶层;所述光刻胶层对应TFT的沟道区域的厚度小于对应TFT的源漏极区域的厚度;所述光刻胶层对应所述第一TFT的沟道区域的厚度与对应所述第二TFT的沟道区域的厚度相等。 2. The array substrate according to claim 1, wherein, prior to forming the source drain and channel region of the TFT, the source and drain surface of the metal layer further formed with a photoresist layer; the photoresist TFT layer corresponding to the channel region is less than a thickness corresponding to the thickness of the source and drain regions of the TFT; corresponding to the thickness of the photoresist layer corresponding to the channel region of the second TFT channel region of the first TFT of equal thickness.
  3. 3.根据权利要求2所述的阵列基板,所述光刻胶层采用灰色调掩膜板曝光显影形成;所述灰色调掩膜板包括灰色调膜层,所述灰色调膜层包括多个第一区域和多个第二区域,所述第一区域对应所述第一TFT的沟道区域,所述第二区域对应所述第二TFT的沟道区域;位于所述第一区域的灰色调膜层的厚度大于位于所述第二区域的灰色调膜层的厚度。 The array substrate of claim 2, wherein said photoresist layer using a gray-tone mask is formed exposing and developing; the gray-tone mask include a gray-tone film layer, said layer comprising a plurality of gray-tone a first region and a plurality of second regions, said first region corresponding to a channel region of the first TFT, the second region corresponding to a channel region of the second TFT; a first region of the gray the thickness of the film is greater than the thickness adjusting gray film layer in the second region.
  4. 4.根据权利要求3所述的阵列基板,其特征在于,位于所述第一区域的灰色调膜层的厚度与位于所述第二区域的灰色调膜层的厚度差为丨500~2000 A。 4. The array substrate of claim 3, wherein, in the first gray region is located in the film thickness difference between the thickness of the gray region of the second film layer is 500 ~ 2000 A Shu .
  5. 5.根据权利要求1-4任一所述的阵列基板,其特征在于,所述第一TFT的沟道区域的长度为4.0~5.0 μ m ;所述第二TFT的沟道区域的长度为5.0~6.0 μ m。 The array substrate according to any one of claims 1-4, characterized in that the length of the channel region of the first TFT is 4.0 ~ 5.0 μ m; length of the channel region of the second TFT is 5.0 ~ 6.0 μ m.
  6. 6.一种GOA单元,其特征在于,包括多个如权利要求1-5任一所述的第一TFT和第二TFT。 A GOA unit comprising a plurality of any of claims 1-5 as a first TFT and a second TFT of the claims.
  7. 7.—种显示装置,其特征在于,包括如权利要求1-5任一所述的阵列基板或包括如权利要求6所述的G0A单元。 7.- species display device comprising an array substrate as claimed in any one of claims 1-5 or comprising G0A unit according to claim 6.
  8. 8.—种阵列基板的制造方法,其特征在于,包括:在基板的表面依次形成栅极、栅绝缘层、有源层以及源漏金属层;在形成有所述源漏金属层的基板的表面通过构图工艺处理形成多个第一TFT和第二TFT的源漏极和沟道区域,所述第一TFT的沟道区域的长度小于所述第二TFT的沟道区域的长度。 8.- method of manufacturing an array substrate, comprising: sequentially forming a gate electrode, a gate insulating layer, an active layer and source-drain metal layer on the surface of the substrate; the substrate formed with the source-drain metal layer a first surface forming a plurality of TFT source and drain and channel regions of the second TFT by the patterning process, a first length of the channel region of the TFT is less than the length of the channel region of the second TFT.
  9. 9.根据权利要求8所述的阵列基板的制造方法,其特征在于,所述在形成有所述源漏金属层的基板的表面通过构图工艺处理形成多个第一TFT和第二TFT的源漏极和沟道区域包括:在所述源漏金属层的表面形成光刻胶层;采用灰色调掩膜板对所述光刻胶层进行曝光显影,以使得所述光刻胶层对应TFT的沟道区域的厚度小于对应TFT的源漏极区域的厚度,且所述光刻胶层对应所述第一TFT的沟道区域的厚度与对应所述第二TFT的沟道区域的厚度相等;刻蚀掉TFT的沟道区域对应的所述光刻胶层,剥离剩余的光刻胶层,形成多个第一TFT和第二TFT的源漏极和沟道区域。 9. A method of manufacturing an array substrate according to claim 8, wherein said source is formed with a plurality of the first TFT and the second TFT substrate surface of the source-drain metal layer is formed by a patterning process drain and channel region comprises: forming a photoresist layer on the surface of source-drain metal layer; gray-tone mask using the photoresist layer is exposed and developed such that the photoresist layer corresponding to the TFT thickness less than the thickness of the channel region corresponding to the source and drain regions of the TFT, and corresponds to the thickness of the photoresist layer corresponding to the channel region of the first TFT is equal to the thickness of the channel region of the second TFT, ; etching away the photoresist layer corresponding to the channel region of the TFT, stripping the remaining photoresist layer, forming a first plurality of TFT source and drain and channel regions of the second TFT.
  10. 10.根据权利要求9所述的阵列基板的制造方法,其特征在于,所述第一区域的灰色调膜层的厚度与位于所述第二区域的灰色调膜层的厚度差为丨50(K2000 A。 10. A method of manufacturing an array substrate according to claim 9, wherein the first gray region film thickness and the difference between the gray layer thickness located in the second region 50 of Shu ( K2000 A.
  11. 11.根据权利要求8-10任一所述的阵列基板的制造方法,其特征在于, 所述第一TFT的沟道区域的长度为4.0~5.0 μ m ; 所述第二TFT的沟道区·域的长度为5.0~6.0 μ m。 11. The method of any of 8-10 manufacturing an array substrate according to one of the preceding claims, wherein the length of the channel region of the first TFT is 4.0 ~ 5.0 μ m; the channel region of the second TFT field length and is 5.0 ~ 6.0 μ m.
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