CN103714421A - Information management system applicable to group long-distance running activities - Google Patents
Information management system applicable to group long-distance running activities Download PDFInfo
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- CN103714421A CN103714421A CN201310680699.6A CN201310680699A CN103714421A CN 103714421 A CN103714421 A CN 103714421A CN 201310680699 A CN201310680699 A CN 201310680699A CN 103714421 A CN103714421 A CN 103714421A
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Abstract
The invention discloses an information management system applicable to group long-distance running activities. The information management system comprises a power module, a card reading module, a liquid crystal display module, a card reading terminal wireless module, a first controller module and a data base station, wherein the power module includes a 5V voltage conversion circuit and a 3.3V voltage conversion circuit, and the data base station includes a power module, a wireless module, a network card module and a second controller module. The information management system can automatically record the number of times, distance and time of long-distance running and automatically identify the identity of a testee, long-distance running can be completed on a specified road instead of in a stadium, the test efficiency is significantly improved, and the equipment is low in cost, convenient to use and easy to popularize.
Description
Technical field
The invention belongs to embedded system technology field, relate to a kind of information management system that is applicable to colony's long-distance running activity.
Background technology
For implement party's educational policy comprehensively, earnestly implement the guiding theory of " healthy first ", in national hundreds of millions students, start the upsurge that mass sport is taken exercise, conscientiously improve physical fitness state, the Ministry of Education, General Administration of Sport, the Central Committee of the Communist Young League determine jointly, since 2007, in conjunction with implementing in full of < < student physical health standard > >, in the national schools of various levels and categories, extensively and in-depth carry out national hundreds of millions student's sunlight sports.
Each universities, middle and primary schools of the whole nation extensively carry out running exercise, require student to complete the running exercise of certain number of times an ingredient using long-distance running achievement as sports performance per term.
Up to the present, the record that each school completes long-distance running situation to student is still used artificial writing-method.Because number of student is many, often, data volume is larger, be inconvenient to add up in long-distance running.And paper using notes record, efficiency is low, and personnel labor intensity is large, easily makes mistakes.Although some school has adopted hand-held machine for punching the card to record student's student number, has reduced certain workload, to the record of swiping the card of collecting, need equally complicate statistics to gather, efficiency is not very high equally.
Summary of the invention
The present invention is directed to the deficiencies in the prior art, a kind of information management system that is applicable to colony's long-distance running activity has been proposed, this system adopts wireless radio-frequency as signal collecting device, can record accurately and conveniently long-distance running participant and arrive the time that each is swiped the card a little, add up everyone long-distance running distance and long-distance running number of times, can greatly reduce long-distance running activity management person's workload.
A kind of information management system that is applicable to colony's long-distance running activity of the present invention, comprises power module, card reading module, LCD MODULE, card-reading terminal wireless module, the first controller module and data basestation;
Described power module comprises 5V voltage conversion circuit and 3.3V voltage conversion circuit;
5V voltage conversion circuit comprises power management chip U1 LM2596S, the first polar capacitor C1, the second polar capacitor C2, the first inductance L 1 and voltage stabilizing diode D1, the positive pole of the first polar capacitor C1 is connected with 12V power supply with 1 pin of power management chip U1 LM2596S, the negative pole of the first polar capacitor C1, 3 pins of power management chip U1LM2596S, 5 pins of power management chip U1LM2596S, the minus earth of the anode of voltage stabilizing diode D1 and the second polar capacitor C2, 4 pins of power management chip U1LM2596S, one end of the first inductance L 1, the positive pole of the second polar capacitor C2 is connected with voltage output end VCC5.0.2 pins of power management chip U1LM2596S, the other end of the first inductance L 1 are connected with the negative electrode of voltage stabilizing diode D1.
3.3V voltage conversion circuit comprises the first filter capacitor C4, the 3rd polar capacitor C3, power management chip U2 LM1117, quadripolarity capacitor C 5, the second filter capacitor C6 and the first light emitting diode DS1, one end of the first filter capacitor C4 and VCC5.0 voltage output end, 3 pins of the positive pole of the 3rd polar capacitor C3 and power management chip U2LM1117 are connected, the negative pole of the other end of the first filter capacitor C4 and the 3rd polar capacitor C3, 1 pin of power management chip U2 LM1117, the negative pole of quadripolarity capacitor C 5, the negative electrode of one end of the second filter capacitor C6 and the first light emitting diode DS1 is connected and ground connection, 2 pins of power management chip U2 LM1117 and the positive pole of quadripolarity capacitor C 5, the other end of the second filter capacitor C6, the anodic bonding of the first light emitting diode DS1 also connects VCC3.3 voltage output end.
1 pin of described card reading module, 2 pin, 3 pin, 4 pin, 7 pin are connected with 29 pin, 30 pin, 31 pin, 32 pin, 33 pin of the first control chip U7 STM32F103VCT6 respectively, and 5 foot rests are empty, 6 pin ground connection, and 8 pin connect 3.3V power supply; The model of card reading module is MF522-AN;
Described LCD MODULE comprises the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first matching capacitance C7, the second matching capacitance C8, the 3rd matching capacitance C9, the 4th matching capacitance C10, the 5th matching capacitance C11, the 6th matching capacitance C12, the 7th matching capacitance C13, LCDs LCD160160, metal-oxide-semiconductor UM1;
1 pin of LCDs LCD160160 is connected with one end of the first matching capacitance C7, one end of the other end of the first matching capacitance C7 and the 3rd matching capacitance C9, one end of the 4th matching capacitance C10, 6 pin of LCDs LCD160160 connect and ground connection, the other end of the 3rd matching capacitance C9, the other end of the 4th matching capacitance C10 respectively with 4 pin of LCDs LCD160160, 7 pin connect, 2 pin of LCDs LCD160160 are connected with one end of the second matching capacitance C8, the other end of the second matching capacitance C8 is connected with 3 pin of LCDs LCD160160, 10 pin of LCDs LCD160160 and one end of the first resistance R 1, one end of the second resistance R 2 connects, the other end of the second resistance R 2 is as power input VCC-LCD, the other end ground connection of the first resistance R 1, 5 pin of LCDs LCD160160,8 pin are as power input VCC-LCD, 9 pin, 11 pin, 12 pin, 13 pin, 14 pin, 15 pin, 16 pin, 17 pin, 18 pin, 19 pin, 20 pin, 21 pin, 22 pin are connected with 78 pin, 79 pin, 80 pin, 81 pin, 82 pin, 83 pin, 84 pin, 85 pin, 86 pin, 87 pin, 88 pin, 91 pin, 92 pin of the first control chip U7 STM32F103VCT6 respectively, 0 pin ground connection,
One end of the 3rd resistance R 3 is connected with one end of the 5th matching capacitance C11, the drain electrode of metal-oxide-semiconductor UM1 and meets power supply VCC3.3, the other end of the 3rd resistance R 3 and the grid of metal-oxide-semiconductor UM1 are connected and connect 93 pin of the first control chip U7 STM32F103VCT6, the other end ground connection of the 5th matching capacitance C11, the source electrode of metal-oxide-semiconductor UM1 with one end of the 6th matching capacitance C12, one end of the 7th matching capacitance C13 is connected and as the power output end of VCC-LCD, the other end of the 6th matching capacitance C12 is connected with the other end of the 7th matching capacitance C13 and ground connection;
3 pin of described card-reading terminal wireless module, 4 pin, 5 pin, 6 pin, 7 pin, 8 pin, 9 pin, 18 pin, 19 pin are connected with 67 pin, 68 pin, 69 pin, 70 pin, 71 pin, 65 pin, 66 pin, 64 pin, 63 pin of the first control chip U7 STM32F103VCT6 respectively, 10 pin of wireless module, 11 pin, 16 pin, 17 pin connect 5V power supply, 1 pin of wireless module, 12 pin, 13 pin, 14 pin, 15 pin ground connection, 2 pin are connected with the positive pole of the 5th polar capacitor C14 and meet power supply VCC3.3, the minus earth of the 5th polar capacitor C14.Described wireless module model is PowerUCT-4432;
Described data basestation, comprises power module, wireless module, network interface card module and second controller module.
The power module of described base station portion is identical with the power module structure of card-reading terminal.
3 pin of described base station portion wireless module, 4 pin, 5 pin, 6 pin, 7 pin, 8 pin, 9 pin, 18 pin, 19 pin are connected with 91 pin, 86 pin, 87 pin, 89 pin, 90 pin, 81 pin, 82 pin, 83 pin, 84 pin of the second control chip U8 STM32F107VCT6 respectively, 10 pin of base station portion wireless module, 11 pin, 16 pin, 17 pin connect 5V power supply, 1 pin of base station portion wireless module, 12 pin, 13 pin, 14 pin, 15 pin ground connection, 2 pin are connected with the positive pole of sextupole capacitor C RF2 and meet power supply VCC3.3, the minus earth of sextupole capacitor C RF2.Described base station portion wireless module model is PowerUCT-4432;
Described base station portion network interface card module comprises ethernet physical layer chip U4 DM9161AEP, network transformer U5 H1102, network interface RJ-45, active crystal oscillator XET1, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 15 resistance R 15 the 16 resistance R 16, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 20 resistance R 20, the 21 resistance R 21, the 22 resistance R 22, the 23 resistance R 23, the 8th matching capacitance C16, the 9th matching capacitance C17, the tenth matching capacitance C18, the 11 matching capacitance C19, the 12 matching capacitance C20, the 13 matching capacitance C21, the 14 matching capacitance C22, the 15 matching capacitance C23, the second light emitting diode DS2, the 3rd light emitting diode DS3, the 4th light emitting diode DS4,
19 pin of ethernet physical layer chip U4 DM9161AEP, 20 pin, 21 pin, 28 pin, 29 pin, 37 pin, 24 pin, 25 pin, 32 pin, 40 pin are connected with 52 pin, 51 pin, 48 pin, 34 pin, 33 pin, 32 pin, 16 pin, 25 pin, 35 pin, 14 pin of the second control chip U8 STM32F107VCT6 respectively, 36 pin connect one end of the 7th resistance R 7, another termination VCC3.3 of the 7th resistance R 7, 25 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the 6th resistance R 6, the other end of the 6th resistance R 6 is connected with one end of the 5th resistance R 5 and meets VCC3.3, 32 pin of another termination ethernet physical layer chip U4 DM9161AEP of the 5th resistance R 5, 39 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the 4th resistance R 4, the other end ground connection of the 4th resistance R 4, 11 pin of ethernet physical layer chip U4 DM9161AEP, 12 pin, 13 pin respectively with the second light emitting diode DS2, the 3rd light emitting diode DS3, the negative pole of the 4th light emitting diode DS4 connects, the second light emitting diode DS2, the 3rd light emitting diode DS3, the positive pole of the 4th light emitting diode DS4 connects respectively the 14th resistance R 14, the 13 resistance R 13, one end of the 12 resistance R 12, the 14th resistance R 14, the 13 resistance R 13, another termination VCC3.3 of the 12 resistance R 12, 48 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the tenth resistance R 10, 47 pin of the other end of the tenth resistance R 10 and ethernet physical layer chip U4 DM9161AEP, 46 pin, 6 pin, 5 pin connect and ground connection, 31 pin of ethernet physical layer chip U4 DM9161AEP are connected with one end of the 11 resistance R 11, another termination 3.3V power supply of the 11 resistance R 11, 1 pin of ethernet physical layer chip U4 DM9161AEP, 2 pin connect one end of the second inductance L 2, the other end of the second inductance L 2, one end of the 13 matching capacitance C21, one end of the 14 matching capacitance capacitor C 22 is connected with 9 pin of ethernet physical layer chip U4 DM9161AEP and connects 2.5V power supply, the other end of capacitor C 21 is connected with the other end of capacitor C 22 and ground connection, 4 pin of ethernet physical layer chip U4 DM9161AEP and 8 pin of network transformer U5 H1102, one end of the 15 resistance R 15 connects, 3 pin of ethernet physical layer chip U4 DM9161AEP and 6 pin of network transformer U5 H1102, one end of the 16 resistance R 16 connects, the other end of the 15 resistance R 15, the other end of the 16 resistance R 16, one end of the tenth matching capacitance C18 connects, the other end ground connection of the tenth matching capacitance C18, 42 pin of ethernet physical layer chip U4 DM9161AEP connect 3 pin of crystal oscillator XET1, the 2 pin ground connection of crystal oscillator XET1, 1 pin of crystal oscillator XET1 connects one end of the 9th resistance R 9, one end of the other end of the 9th resistance R 9 and the 8th matching capacitance C16, 4 pin of crystal oscillator XET1 connect and meet VCC3.3, the other end ground connection of the 8th matching capacitance C16, 7 pin of ethernet physical layer chip U4 DM9161AEP are connected with 1 pin of network transformer U5 H1102, one end of the 18 resistance R 18, the other end of the 18 resistance R 18 is connected with the 9th one end of matching capacitance C17, one end of the 17 resistance R 17, the other end ground connection of the 9th matching capacitance C17, the other end of the 17 resistance R 17 is connected with 8 pin of ethernet physical layer chip U4 DM9161AEP, 3 pin of network transformer U5 H1102, 23 pin, 30 pin, 41 pin of ethernet physical layer chip U4 DM9161AEP connect 3.3V power supply, 10 pin, 15 pin, 33 pin, 44 pin ground connection, 17 pin, 18 pin, 22 pin, 26 pin, 27 pin, 34 pin, 16 pin, 38 pin, 35 pin, 43 pin, 14 pin, 45 foot rests skies,
2 pin of network transformer U5 H1102, one end of 7 pin and the 11 matching capacitance C19, one end of the 12 matching capacitance C20, one end of the 19 resistance R 19 connects, another termination 2.5V power supply of the 19 resistance R 19, the other end of the 11 matching capacitance C19, the other end ground connection of the 12 matching capacitance C20, 9 pin of network transformer U5 H1102, 11 pin, 14 pin, 16 pin respectively with 6 pin of network interface RJ-45, 3 pin, 2 pin, 1 pin connects, 10 pin of network transformer U5 H110, 15 pin respectively with one end of the 20 resistance R 20, one end of the 21 resistance R 21 connects, the other end of the 20 resistance R 20, the other end of the 21 resistance, one end of the 15 matching capacitance C23 connects, the other end ground connection of the 15 matching capacitance C23, 4 pin of network transformer U5 H110, 5 pin, 12 pin, 13 pin are unsettled.
4 pin of network interface RJ-45,5 pin connect one end of the 22 resistance R 22,7 pin, 8 pin connect one end of the 23 resistance R 23, and the other end of the 20 resistance R 20, the 21 other end of resistance R 21 and the other end of the 22 resistance R 22, the 23 other end of resistance R 23, one end of the 15 matching capacitance C23 are connected;
The first described control module comprises the first control chip U7 STM32F103VCT6, the 24 resistance R 24, keyswitch K1, the 15 matching capacitance C24, the 16 matching capacitance C25, the 17 matching capacitance C26, the 18 matching capacitance C27, the 19 matching capacitance C28, the first crystal oscillator Y1 and the second crystal oscillator Y2
14 pin of the first control chip U7 STM32F103VCT6 and one end of the 24 electric capacity R24, one end of keyswitch K1, one end of the 15 matching capacitance C24 connects, the other end of keyswitch K1 is connected with the other end of the 15 matching capacitance C24 and ground connection, another termination VCC3.3 of the 24 resistance R 24, the first 13 pin of control chip U7 STM32F103VCT6 and one end of the first crystal oscillator Y1, one end of the 16 matching capacitance C25 connects, first other end of crystal oscillator Y1 and one end of the 17 matching capacitance C26, 12 pin of the first control chip U7 STM32F103VCT6 connect, and the 16 other end of matching capacitance C25 and the other end of the 17 matching capacitance C26 are connected and ground connection, the first 9 pin of control chip U7 STM32F103VCT6 and one end of the second crystal oscillator Y2, one end of the 18 matching capacitance C27 connects, second other end of crystal oscillator Y2 and one end of the 19 matching capacitance C28, 8 pin of the first control chip U7 STM32F103VCT6 connect, and the 18 other end of matching capacitance C27 and the other end of the 19 matching capacitance C28 are connected and ground connection, 6 pin of the first control chip U7 STM32F103VCT6, 11 pin, 21 pin, 22 pin, 28 pin, 50 pin, 75 pin, 100 pin connect 3.3V power supply, 10 pin, 19 pin, 20 pin, 27 pin, 37 pin, 49 pin, 74 pin, 94 pin, 99 pin ground connection,
1 pin of the first control chip U7 STM32F103VCT6, 2 pin, 3 pin, 4 pin, 5 pin, 7 pin, 15 pin, 16 pin, 17 pin, 18 pin, 23 pin, 24 pin, 25 pin, 26 pin, 34 pin, 35 pin, 36 pin, 38 pin, 39 pin, 40 pin, 41 pin, 42 pin, 43 pin, 44 pin, 45 pin, 46 pin, 47 pin, 48 pin, 51 pin, 52 pin, 53 pin, 54 pin, 55 pin, 56 pin, 57 pin, 58 pin, 59 pin, 60 pin, 61 pin, 62 pin, 72 pin, 73 pin, 76 pin, 77 pin, 89 pin, 90 pin, 95 pin, 96 pin, 97 pin, 98 pin are unsettled.
Described control module comprises the second control chip U8 STM32F107VCT6, the 25 resistance R the 25, the 26 resistance R the 26, the 27 resistance R the 27, the 28 resistance R the 28, the 29 resistance R the 29, the 20 matching capacitance C29, the 21 matching capacitance C30, the 22 matching capacitance C31, the 23 matching capacitance C32, the 24 matching capacitance C33, the 3rd crystal oscillator Y3, the 4th crystal oscillator Y4
The second 13 pin of control chip U8 STM32F107VCT6 and one end of the 3rd crystal oscillator Y3, the 23 matching capacitance C32 connects, the 3rd other end of crystal oscillator Y3 and one end of the 24 matching capacitance C33, 12 pin of the second control chip U8 STM32F107VCT6 connect, the 23 other end of matching capacitance C32 and the other end of the 24 matching capacitance C33 are connected and ground connection, the second 9 pin of control chip U8 STM32F107VCT6 and one end of the 4th crystal oscillator Y4, one end of the 21 matching capacitance C30 connects, the 4th other end of crystal oscillator Y4 and one end of the 22 matching capacitance C31, 8 pin of the second control chip U8 STM32F107VCT6 connect, the 21 other end of matching capacitance C30 and the other end of the 22 matching capacitance C31 are connected and ground connection, 14 pin of the second control chip U8 STM32F107VCT6 and one end of the 29 resistance R 29, one end of the 20 matching capacitance C29 connects, another termination VCC3.3 of the 29 resistance, the other end ground connection of the 20 matching capacitance C29, 94 pin of the second control chip U8 STM32F107VCT6 and one end of the 26 resistance R 26, one end of the 28 resistance R 28 connects, 37 pin of the second control chip U8 STM32F107VCT6 and one end of the 25 resistance R 25, one end of the 27 resistance R 27 connects, the 25 other end of resistance R 25 and the other end of the 26 resistance R 26 are connected and meet VCC3.3, the other end ground connection of the other end of the 27 resistance R 27 and the 28 resistance R 28, 76 pin of the second control chip U8 STM32F107VCT6, run in respectively 2 pin of pin JP1 of 72 pin, 3 pin, the 1 pin ground connection of row's pin JP1, 6 pin of the second control chip U8 STM32F107VCT6,21 pin, 22 pin, 11 pin, 28 pin, 100 pin, 75 pin, 50 pin, meet VCC3.3,49 pin, 74 pin, 99 pin, 27 pin, 10 pin, 19 pin, 20 pin ground connection, 1 pin of the second control chip U8 STM32F107VCT6, 2 pin, 3 pin, 4 pin, 5 pin, 7 pin, 15 pin, 17 pin, 18 pin, 23 pin, 24 pin, 26 pin, 29 pin, 30 pin, 31 pin, 36 pin, 38 pin, 39 pin, 40 pin, 41 pin, 42 pin, 43 pin, 44 pin, 45 pin, 46 pin, 47 pin, 53 pin, 54 pin, 55 pin, 56 pin, 57 pin, 58 pin, 59 pin, 60 pin, 61 pin, 62 pin, 63 pin, 64 pin, 65 pin, 66 pin, 67 pin, 68 pin, 69 pin, 70 pin, 71 pin, 73 pin, 77 pin, 78 pin, 79 pin, 80 pin, 85 pin, 88 pin, 92 pin, 93 pin, 95 pin, 96 pin, 97 pin, 98 pin are unsettled.
During long-distance running, everyone carries the radio-frequency card long-distance running arbitrarily between each card swiping terminal in appointed area of oneself participant, and the local time that card swiping terminal is installed when arrival is swiped the card.System automatically record long-distance runner's card using information and by wireless module and base-station transmission to background server, server is according to the long-distance running rule of setting, and automatically calculates long-distance runner's the information such as distance, speed.System can be added up the data of the long period interior (for example: a week, month) of a setting, and can automatically derive the long-distance running activation record table of the Excel form of standard.Long-distance runner or supvr can, by computer Website login inquiry long-distance running information, also can install Android client query by mobile phone-downloaded.System manager can Website login arranges the rules such as each distance between swiping the card a little and long-distance running route.
To achieve these goals, technical scheme of the present invention is as follows:
Colony's long-distance running action message management system, is comprised of card-reading terminal, data basestation, server and software systems, and STM32 single-chip microcomputer is as the main control chip of card-reading terminal and base station.
Wherein, card-reading terminal comprises power module, RFID card reading module, display module and UTC4432 wireless module.RFID card reading module adopts MFRC522 contactless (13.56MHz) read-write card chip, and its Card Reader distance is 0～60mm.The frequency of operation of UTC4432 wireless module is 430 ~ 450 MHz, and transmission range is 2000m.Software systems comprise data processor, database, WEB website and Android client software.
Data basestation carries out poll to card-reading terminal, receives successively the data of sending from card-reading terminal.RFID card reading module reads after card number, by UTC4432 wireless module, card number and terminal number is sent to data basestation.Data basestation is connected to by netting twine on the switch of company or school, with the server that sets up website in same LAN (Local Area Network).
Beneficial effect of the present invention: can automatically record long-distance running number of times, distance, time, automatically identify testee's identity, needn't go to stadium and can complete long-distance running in particular link, significantly improve testing efficiency, equipment cost is low, easy to use, is convenient to penetration and promotion.
Accompanying drawing explanation
Fig. 1 is 5V voltage conversion circuit figure of the present invention;
Fig. 2 is 3.3V voltage conversion circuit figure of the present invention;
Fig. 3 is card reading module circuit diagram;
Fig. 4 is the circuit diagram of LCD MODULE;
Fig. 5 is the circuit diagram of card-reading terminal wireless module;
Fig. 6 is the circuit diagram of base station portion network interface card module;
Fig. 7 is the circuit diagram of base station portion network interface card module;
Fig. 8 is the first control module circuit diagram;
Fig. 9 is the second control module circuit diagram.
Embodiment
A kind of information management system that is applicable to colony's long-distance running activity of the present invention, comprises power module, card reading module, LCD MODULE, wireless module, data basestation and the first controller module;
Described power module comprises 5V voltage conversion circuit and 3.3V voltage conversion circuit;
As shown in Figure 1, 5V voltage conversion circuit comprises power management chip U1 LM2596S, the first polar capacitor C1, the second polar capacitor C2, the first inductance L 1 and voltage stabilizing diode D1, the positive pole of the first polar capacitor C1 is connected with 12V power supply with 1 pin of power management chip U1 LM2596S, the negative pole of the first polar capacitor C1, 3 pins of power management chip U1LM2596S, 5 pins of power management chip U1LM2596S, the minus earth of the anode of voltage stabilizing diode D1 and the second polar capacitor C2, 4 pins of power management chip U1LM2596S, one end of the first inductance L 1, the positive pole of the second polar capacitor C2 is connected with voltage output end VCC5.0.2 pins of power management chip U1LM2596S, the other end of the first inductance L 1 are connected with the negative electrode of voltage stabilizing diode D1.
As shown in Figure 2, 3.3V voltage conversion circuit comprises the first filter capacitor C4, the 3rd polar capacitor C3, power management chip U2 LM1117, quadripolarity capacitor C 5, the second filter capacitor C6 and the first light emitting diode DS1, one end of the first filter capacitor C4 and VCC5.0 voltage output end, 3 pins of the positive pole of the 3rd polar capacitor C3 and power management chip U2LM1117 are connected, the negative pole of the other end of the first filter capacitor C4 and the 3rd polar capacitor C3, 1 pin of power management chip U2 LM1117, the negative pole of quadripolarity capacitor C 5, the negative electrode of one end of the second filter capacitor C6 and the first light emitting diode DS1 is connected and ground connection, 2 pins of power management chip U2 LM1117 and the positive pole of quadripolarity capacitor C 5, the other end of the second filter capacitor C6, the anodic bonding of the first light emitting diode DS1 also connects VCC3.3 voltage output end.
As shown in Figure 3,1 pin of described card reading module, 2 pin, 3 pin, 4 pin, 7 pin are connected with 29 pin, 30 pin, 31 pin, 32 pin, 33 pin of the first control chip U7 STM32F103VCT6 respectively, and 5 foot rests are empty, 6 pin ground connection, and 8 pin connect 3.3V power supply; The model of card reading module is MF522-AN;
As shown in Figure 4, described LCD MODULE comprises the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first matching capacitance C7, the second matching capacitance C8, the 3rd matching capacitance C9, the 4th matching capacitance C10, the 5th matching capacitance C11, the 6th matching capacitance C12, the 7th matching capacitance C13, LCDs LCD160160, metal-oxide-semiconductor UM1;
1 pin of LCDs LCD160160 is connected with one end of the first matching capacitance C7, one end of the other end of the first matching capacitance C7 and the 3rd matching capacitance C9, one end of the 4th matching capacitance C10, 6 pin of LCDs LCD160160 connect and ground connection, the other end of the 3rd matching capacitance C9, the other end of the 4th matching capacitance C10 respectively with 4 pin of LCDs LCD160160, 7 pin connect, 2 pin of LCDs LCD160160 are connected with one end of the second matching capacitance C8, the other end of the second matching capacitance C8 is connected with 3 pin of LCDs LCD160160, 10 pin of LCDs LCD160160 and one end of the first resistance R 1, one end of the second resistance R 2 connects, the other end of the second resistance R 2 is as power input VCC-LCD, the other end ground connection of the first resistance R 1, 5 pin of LCDs LCD160160,8 pin are as power input VCC-LCD, 9 pin, 11 pin, 12 pin, 13 pin, 14 pin, 15 pin, 16 pin, 17 pin, 18 pin, 19 pin, 20 pin, 21 pin, 22 pin are connected with 78 pin, 79 pin, 80 pin, 81 pin, 82 pin, 83 pin, 84 pin, 85 pin, 86 pin, 87 pin, 88 pin, 91 pin, 92 pin of the first control chip U7 STM32F103VCT6 respectively, 0 pin ground connection,
One end of the 3rd resistance R 3 is connected with one end of the 5th matching capacitance C11, the drain electrode of metal-oxide-semiconductor UM1 and meets power supply VCC3.3, the other end of the 3rd resistance R 3 and the grid of metal-oxide-semiconductor UM1 are connected and connect 93 pin of the first control chip U7 STM32F103VCT6, the other end ground connection of the 5th matching capacitance C11, the source electrode of metal-oxide-semiconductor UM1 with one end of the 6th matching capacitance C12, one end of the 7th matching capacitance C13 is connected and as the power output end of VCC-LCD, the other end of the 6th matching capacitance C12 is connected with the other end of the 7th matching capacitance C13 and ground connection;
As shown in Figure 5,3 pin of described wireless module, 4 pin, 5 pin, 6 pin, 7 pin, 8 pin, 9 pin, 18 pin, 19 pin are connected with 67 pin, 68 pin, 69 pin, 70 pin, 71 pin, 65 pin, 66 pin, 64 pin, 63 pin of the first control chip U7 STM32F103VCT6 respectively, 10 pin of wireless module, 11 pin, 16 pin, 17 pin connect 5V power supply, 1 pin of wireless module, 12 pin, 13 pin, 14 pin, 15 pin ground connection, 2 pin are connected with the positive pole of the 5th polar capacitor C14 and meet power supply VCC3.3, the minus earth of the 5th polar capacitor C14.Described wireless module model is PowerUCT-4432;
Described data basestation, comprises power module, wireless module, network interface card module and second controller module.
The power module of described base station portion is identical with the power module structure of card-reading terminal.
As shown in Figure 6, 3 pin of described base station portion wireless module, 4 pin, 5 pin, 6 pin, 7 pin, 8 pin, 9 pin, 18 pin, 19 pin respectively with 91 pin of the second control chip U8 STM32F107VCT6, 86 pin, 87 pin, 89 pin, 90 pin, 81 pin, 82 pin, 83 pin, 84 pin connect, 10 pin of base station portion wireless module, 11 pin, 16 pin, 17 pin connect 5V power supply, 1 pin of base station portion wireless module, 12 pin, 13 pin, 14 pin, 15 pin ground connection, 2 pin are connected with the positive pole of sextupole capacitor C RF2 and meet power supply VCC3.3, the minus earth of sextupole capacitor C RF2.Described base station portion wireless module model is PowerUCT-4432;
As shown in Figure 7, described base station portion network interface card module comprises ethernet physical layer chip U4 DM9161AEP, network transformer U5 H1102, network interface RJ-45, active crystal oscillator XET1, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 15 resistance R 15 the 16 resistance R 16, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 20 resistance R 20, the 21 resistance R 21, the 22 resistance R 22, the 23 resistance R 23, the 8th matching capacitance C16, the 9th matching capacitance C17, the tenth matching capacitance C18, the 11 matching capacitance C19, the 12 matching capacitance C20, the 13 matching capacitance C21, the 14 matching capacitance C22, the 15 matching capacitance C23, the second light emitting diode DS2, the 3rd light emitting diode DS3, the 4th light emitting diode DS4,
19 pin of ethernet physical layer chip U4 DM9161AEP, 20 pin, 21 pin, 28 pin, 29 pin, 37 pin, 24 pin, 25 pin, 32 pin, 40 pin are connected with 52 pin, 51 pin, 48 pin, 34 pin, 33 pin, 32 pin, 16 pin, 25 pin, 35 pin, 14 pin of the second control chip U8 STM32F107VCT6 respectively, 36 pin connect one end of the 7th resistance R 7, another termination VCC3.3 of the 7th resistance R 7, 25 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the 6th resistance R 6, the other end of the 6th resistance R 6 is connected with one end of the 5th resistance R 5 and meets VCC3.3, 32 pin of another termination ethernet physical layer chip U4 DM9161AEP of the 5th resistance R 5, 39 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the 4th resistance R 4, the other end ground connection of the 4th resistance R 4, 11 pin of ethernet physical layer chip U4 DM9161AEP, 12 pin, 13 pin respectively with the second light emitting diode DS2, the 3rd light emitting diode DS3, the negative pole of the 4th light emitting diode DS4 connects, the second light emitting diode DS2, the 3rd light emitting diode DS3, the positive pole of the 4th light emitting diode DS4 connects respectively the 14th resistance R 14, the 13 resistance R 13, one end of the 12 resistance R 12, the 14th resistance R 14, the 13 resistance R 13, another termination VCC3.3 of the 12 resistance R 12, 48 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the tenth resistance R 10, 47 pin of the other end of the tenth resistance R 10 and ethernet physical layer chip U4 DM9161AEP, 46 pin, 6 pin, 5 pin connect and ground connection, 31 pin of ethernet physical layer chip U4 DM9161AEP are connected with one end of the 11 resistance R 11, another termination 3.3V power supply of the 11 resistance R 11, 1 pin of ethernet physical layer chip U4 DM9161AEP, 2 pin connect one end of the second inductance L 2, the other end of the second inductance L 2, one end of the 13 matching capacitance C21, one end of the 14 matching capacitance capacitor C 22 is connected with 9 pin of ethernet physical layer chip U4 DM9161AEP and connects 2.5V power supply, the other end of capacitor C 21 is connected with the other end of capacitor C 22 and ground connection, 4 pin of ethernet physical layer chip U4 DM9161AEP and 8 pin of network transformer U5 H1102, one end of the 15 resistance R 15 connects, 3 pin of ethernet physical layer chip U4 DM9161AEP and 6 pin of network transformer U5 H1102, one end of the 16 resistance R 16 connects, the other end of the 15 resistance R 15, the other end of the 16 resistance R 16, one end of the tenth matching capacitance C18 connects, the other end ground connection of the tenth matching capacitance C18, 42 pin of ethernet physical layer chip U4 DM9161AEP connect 3 pin of crystal oscillator XET1, the 2 pin ground connection of crystal oscillator XET1, 1 pin of crystal oscillator XET1 connects one end of the 9th resistance R 9, one end of the other end of the 9th resistance R 9 and the 8th matching capacitance C16, 4 pin of crystal oscillator XET1 connect and meet VCC3.3, the other end ground connection of the 8th matching capacitance C16, 7 pin of ethernet physical layer chip U4 DM9161AEP are connected with 1 pin of network transformer U5 H1102, one end of the 18 resistance R 18, the other end of the 18 resistance R 18 is connected with the 9th one end of matching capacitance C17, one end of the 17 resistance R 17, the other end ground connection of the 9th matching capacitance C17, the other end of the 17 resistance R 17 is connected with 8 pin of ethernet physical layer chip U4 DM9161AEP, 3 pin of network transformer U5 H1102, 23 pin, 30 pin, 41 pin of ethernet physical layer chip U4 DM9161AEP connect 3.3V power supply, 10 pin, 15 pin, 33 pin, 44 pin ground connection, 17 pin, 18 pin, 22 pin, 26 pin, 27 pin, 34 pin, 16 pin, 38 pin, 35 pin, 43 pin, 14 pin, 45 foot rests skies,
2 pin of network transformer U5 H1102, one end of 7 pin and the 11 matching capacitance C19, one end of the 12 matching capacitance C20, one end of the 19 resistance R 19 connects, another termination 2.5V power supply of the 19 resistance R 19, the other end of the 11 matching capacitance C19, the other end ground connection of the 12 matching capacitance C20, 9 pin of network transformer U5 H1102, 11 pin, 14 pin, 16 pin respectively with 6 pin of network interface RJ-45, 3 pin, 2 pin, 1 pin connects, 10 pin of network transformer U5 H110, 15 pin respectively with one end of the 20 resistance R 20, one end of the 21 resistance R 21 connects, the other end of the 20 resistance R 20, the other end of the 21 resistance, one end of the 15 matching capacitance C23 connects, the other end ground connection of the 15 matching capacitance C23, 4 pin of network transformer U5 H110, 5 pin, 12 pin, 13 pin are unsettled.
4 pin of network interface RJ-45,5 pin connect one end of the 22 resistance R 22,7 pin, 8 pin connect one end of the 23 resistance R 23, and the other end of the 20 resistance R 20, the 21 other end of resistance R 21 and the other end of the 22 resistance R 22, the 23 other end of resistance R 23, one end of the 15 matching capacitance C23 are connected;
As shown in Figure 8, the first described control module comprises the first control chip U7 STM32F103VCT6, the 24 resistance R 24, keyswitch K1, the 15 matching capacitance C24, the 16 matching capacitance C25, the 17 matching capacitance C26, the 18 matching capacitance C27, the 19 matching capacitance C28, the first crystal oscillator Y1 and the second crystal oscillator Y2
14 pin of the first control chip U7 STM32F103VCT6 and one end of the 24 electric capacity R24, one end of keyswitch K1, one end of the 15 matching capacitance C24 connects, the other end of keyswitch K1 is connected with the other end of the 15 matching capacitance C24 and ground connection, another termination VCC3.3 of the 24 resistance R 24, the first 13 pin of control chip U7 STM32F103VCT6 and one end of the first crystal oscillator Y1, one end of the 16 matching capacitance C25 connects, first other end of crystal oscillator Y1 and one end of the 17 matching capacitance C26, 12 pin of the first control chip U7 STM32F103VCT6 connect, and the 16 other end of matching capacitance C25 and the other end of the 17 matching capacitance C26 are connected and ground connection, the first 9 pin of control chip U7 STM32F103VCT6 and one end of the second crystal oscillator Y2, one end of the 18 matching capacitance C27 connects, second other end of crystal oscillator Y2 and one end of the 19 matching capacitance C28, 8 pin of the first control chip U7 STM32F103VCT6 connect, and the 18 other end of matching capacitance C27 and the other end of the 19 matching capacitance C28 are connected and ground connection, 6 pin of the first control chip U7 STM32F103VCT6, 11 pin, 21 pin, 22 pin, 28 pin, 50 pin, 75 pin, 100 pin connect 3.3V power supply, 10 pin, 19 pin, 20 pin, 27 pin, 37 pin, 49 pin, 74 pin, 94 pin, 99 pin ground connection,
1 pin of the first control chip U7 STM32F103VCT6, 2 pin, 3 pin, 4 pin, 5 pin, 7 pin, 15 pin, 16 pin, 17 pin, 18 pin, 23 pin, 24 pin, 25 pin, 26 pin, 34 pin, 35 pin, 36 pin, 38 pin, 39 pin, 40 pin, 41 pin, 42 pin, 43 pin, 44 pin, 45 pin, 46 pin, 47 pin, 48 pin, 51 pin, 52 pin, 53 pin, 54 pin, 55 pin, 56 pin, 57 pin, 58 pin, 59 pin, 60 pin, 61 pin, 62 pin, 72 pin, 73 pin, 76 pin, 77 pin, 89 pin, 90 pin, 95 pin, 96 pin, 97 pin, 98 pin are unsettled.
As shown in Figure 9, the second described control module comprises the second control chip U8 STM32F107VCT6, the 25 resistance R the 25, the 26 resistance R the 26, the 27 resistance R the 27, the 28 resistance R the 28, the 29 resistance R the 29, the 20 matching capacitance C29, the 21 matching capacitance C30, the 22 matching capacitance C31, the 23 matching capacitance C32, the 24 matching capacitance C33, the 3rd crystal oscillator Y3, the 4th crystal oscillator Y4
The second 13 pin of control chip U8 STM32F107VCT6 and one end of the 3rd crystal oscillator Y3, the 23 matching capacitance C32 connects, the 3rd other end of crystal oscillator Y3 and one end of the 24 matching capacitance C33, 12 pin of the second control chip U8 STM32F107VCT6 connect, the 23 other end of matching capacitance C32 and the other end of the 24 matching capacitance C33 are connected and ground connection, the second 9 pin of control chip U8 STM32F107VCT6 and one end of the 4th crystal oscillator Y4, one end of the 21 matching capacitance C30 connects, the 4th other end of crystal oscillator Y4 and one end of the 22 matching capacitance C31, 8 pin of the second control chip U8 STM32F107VCT6 connect, the 21 other end of matching capacitance C30 and the other end of the 22 matching capacitance C31 are connected and ground connection, 14 pin of the second control chip U8 STM32F107VCT6 and one end of the 29 resistance R 29, one end of the 20 matching capacitance C29 connects, another termination VCC3.3 of the 29 resistance, the other end ground connection of the 20 matching capacitance C29, 94 pin of the second control chip U8 STM32F107VCT6 and one end of the 26 resistance R 26, one end of the 28 resistance R 28 connects, 37 pin of the second control chip U8 STM32F107VCT6 and one end of the 25 resistance R 25, one end of the 27 resistance R 27 connects, the 25 other end of resistance R 25 and the other end of the 26 resistance R 26 are connected and meet VCC3.3, the other end ground connection of the other end of the 27 resistance R 27 and the 28 resistance R 28, 76 pin of the second control chip U8 STM32F107VCT6, run in respectively 2 pin of pin JP1 of 72 pin, 3 pin, the 1 pin ground connection of row's pin JP1, 6 pin of the second control chip U8 STM32F107VCT6,21 pin, 22 pin, 11 pin, 28 pin, 100 pin, 75 pin, 50 pin, meet VCC3.3,49 pin, 74 pin, 99 pin, 27 pin, 10 pin, 19 pin, 20 pin ground connection, 1 pin of the second control chip U8 STM32F107VCT6, 2 pin, 3 pin, 4 pin, 5 pin, 7 pin, 15 pin, 17 pin, 18 pin, 23 pin, 24 pin, 26 pin, 29 pin, 30 pin, 31 pin, 36 pin, 38 pin, 39 pin, 40 pin, 41 pin, 42 pin, 43 pin, 44 pin, 45 pin, 46 pin, 47 pin, 53 pin, 54 pin, 55 pin, 56 pin, 57 pin, 58 pin, 59 pin, 60 pin, 61 pin, 62 pin, 63 pin, 64 pin, 65 pin, 66 pin, 67 pin, 68 pin, 69 pin, 70 pin, 71 pin, 73 pin, 77 pin, 78 pin, 79 pin, 80 pin, 85 pin, 88 pin, 92 pin, 93 pin, 95 pin, 96 pin, 97 pin, 98 pin are unsettled.
Below in conjunction with foregoing, describe the workflow of colony's long-distance running action message management system with reference to the accompanying drawings:
Long-distance runner swipes the card in arbitrary card-reading terminal, and card-reading terminal first saves information.When base station is polled to this terminal, terminal is crossed antenna transmission to base station by information exchange, and base station is by the communication receiving to server process, and server calculates long-distance running time, distance, speed and these information are imported to database.Long-distance runner and supvr can inquire about by Website login the information such as long-distance running number of times, time.
Claims (1)
1. be applicable to an information management system for colony's long-distance running activity, comprise power module, card reading module, LCD MODULE, card-reading terminal wireless module, the first controller module and data basestation;
Described power module comprises 5V voltage conversion circuit and 3.3V voltage conversion circuit;
It is characterized in that: 5V voltage conversion circuit comprises power management chip U1 LM2596S, the first polar capacitor C1, the second polar capacitor C2, the first inductance L 1 and voltage stabilizing diode D1, the positive pole of the first polar capacitor C1 is connected with 12V power supply with 1 pin of power management chip U1 LM2596S, the negative pole of the first polar capacitor C1, 3 pins of power management chip U1LM2596S, 5 pins of power management chip U1LM2596S, the minus earth of the anode of voltage stabilizing diode D1 and the second polar capacitor C2, 4 pins of power management chip U1LM2596S, one end of the first inductance L 1, the positive pole of the second polar capacitor C2 is connected with voltage output end VCC5.0, 2 pins of power management chip U1LM2596S, the other end of the first inductance L 1 are connected with the negative electrode of voltage stabilizing diode D1,
3.3V voltage conversion circuit comprises the first filter capacitor C4, the 3rd polar capacitor C3, power management chip U2 LM1117, quadripolarity capacitor C 5, the second filter capacitor C6 and the first light emitting diode DS1, one end of the first filter capacitor C4 and VCC5.0 voltage output end, 3 pins of the positive pole of the 3rd polar capacitor C3 and power management chip U2LM1117 are connected, the negative pole of the other end of the first filter capacitor C4 and the 3rd polar capacitor C3, 1 pin of power management chip U2 LM1117, the negative pole of quadripolarity capacitor C 5, the negative electrode of one end of the second filter capacitor C6 and the first light emitting diode DS1 is connected and ground connection, 2 pins of power management chip U2 LM1117 and the positive pole of quadripolarity capacitor C 5, the other end of the second filter capacitor C6, the anodic bonding of the first light emitting diode DS1 also connects VCC3.3 voltage output end,
1 pin of described card reading module, 2 pin, 3 pin, 4 pin, 7 pin are connected with 29 pin, 30 pin, 31 pin, 32 pin, 33 pin of the first control chip U7 STM32F103VCT6 respectively, and 5 foot rests are empty, 6 pin ground connection, and 8 pin connect 3.3V power supply; The model of card reading module is MF522-AN;
Described LCD MODULE comprises the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first matching capacitance C7, the second matching capacitance C8, the 3rd matching capacitance C9, the 4th matching capacitance C10, the 5th matching capacitance C11, the 6th matching capacitance C12, the 7th matching capacitance C13, LCDs LCD160160, metal-oxide-semiconductor UM1;
1 pin of LCDs LCD160160 is connected with one end of the first matching capacitance C7, one end of the other end of the first matching capacitance C7 and the 3rd matching capacitance C9, one end of the 4th matching capacitance C10, 6 pin of LCDs LCD160160 connect and ground connection, the other end of the 3rd matching capacitance C9, the other end of the 4th matching capacitance C10 respectively with 4 pin of LCDs LCD160160, 7 pin connect, 2 pin of LCDs LCD160160 are connected with one end of the second matching capacitance C8, the other end of the second matching capacitance C8 is connected with 3 pin of LCDs LCD160160, 10 pin of LCDs LCD160160 and one end of the first resistance R 1, one end of the second resistance R 2 connects, the other end of the second resistance R 2 is as power input VCC-LCD, the other end ground connection of the first resistance R 1, 5 pin of LCDs LCD160160,8 pin are as power input VCC-LCD, 9 pin, 11 pin, 12 pin, 13 pin, 14 pin, 15 pin, 16 pin, 17 pin, 18 pin, 19 pin, 20 pin, 21 pin, 22 pin are connected with 78 pin, 79 pin, 80 pin, 81 pin, 82 pin, 83 pin, 84 pin, 85 pin, 86 pin, 87 pin, 88 pin, 91 pin, 92 pin of the first control chip U7 STM32F103VCT6 respectively, 0 pin ground connection,
One end of the 3rd resistance R 3 is connected with one end of the 5th matching capacitance C11, the drain electrode of metal-oxide-semiconductor UM1 and meets power supply VCC3.3, the other end of the 3rd resistance R 3 and the grid of metal-oxide-semiconductor UM1 are connected and connect 93 pin of the first control chip U7 STM32F103VCT6, the other end ground connection of the 5th matching capacitance C11, the source electrode of metal-oxide-semiconductor UM1 with one end of the 6th matching capacitance C12, one end of the 7th matching capacitance C13 is connected and as the power output end of VCC-LCD, the other end of the 6th matching capacitance C12 is connected with the other end of the 7th matching capacitance C13 and ground connection;
3 pin of described card-reading terminal wireless module, 4 pin, 5 pin, 6 pin, 7 pin, 8 pin, 9 pin, 18 pin, 19 pin are connected with 67 pin, 68 pin, 69 pin, 70 pin, 71 pin, 65 pin, 66 pin, 64 pin, 63 pin of the first control chip U7 STM32F103VCT6 respectively, 10 pin of wireless module, 11 pin, 16 pin, 17 pin connect 5V power supply, 1 pin of wireless module, 12 pin, 13 pin, 14 pin, 15 pin ground connection, 2 pin are connected with the positive pole of the 5th polar capacitor C14 and meet power supply VCC3.3, the minus earth of the 5th polar capacitor C14; Described wireless module model is PowerUCT-4432;
Described data basestation, comprises power module, wireless module, network interface card module and second controller module;
The power module of described base station portion is identical with the power module structure of card-reading terminal;
3 pin of described base station portion wireless module, 4 pin, 5 pin, 6 pin, 7 pin, 8 pin, 9 pin, 18 pin, 19 pin are connected with 91 pin, 86 pin, 87 pin, 89 pin, 90 pin, 81 pin, 82 pin, 83 pin, 84 pin of the second control chip U8 STM32F107VCT6 respectively, 10 pin of base station portion wireless module, 11 pin, 16 pin, 17 pin connect 5V power supply, 1 pin of base station portion wireless module, 12 pin, 13 pin, 14 pin, 15 pin ground connection, 2 pin are connected with the positive pole of sextupole capacitor C RF2 and meet power supply VCC3.3, the minus earth of sextupole capacitor C RF2; Described base station portion wireless module model is PowerUCT-4432;
Described base station portion network interface card module comprises ethernet physical layer chip U4 DM9161AEP, network transformer U5 H1102, network interface RJ-45, active crystal oscillator XET1, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 15 resistance R 15 the 16 resistance R 16, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 20 resistance R 20, the 21 resistance R 21, the 22 resistance R 22, the 23 resistance R 23, the 8th matching capacitance C16, the 9th matching capacitance C17, the tenth matching capacitance C18, the 11 matching capacitance C19, the 12 matching capacitance C20, the 13 matching capacitance C21, the 14 matching capacitance C22, the 15 matching capacitance C23, the second light emitting diode DS2, the 3rd light emitting diode DS3, the 4th light emitting diode DS4,
19 pin of ethernet physical layer chip U4 DM9161AEP, 20 pin, 21 pin, 28 pin, 29 pin, 37 pin, 24 pin, 25 pin, 32 pin, 40 pin are connected with 52 pin, 51 pin, 48 pin, 34 pin, 33 pin, 32 pin, 16 pin, 25 pin, 35 pin, 14 pin of the second control chip U8 STM32F107VCT6 respectively, 36 pin connect one end of the 7th resistance R 7, another termination VCC3.3 of the 7th resistance R 7, 25 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the 6th resistance R 6, the other end of the 6th resistance R 6 is connected with one end of the 5th resistance R 5 and meets VCC3.3, 32 pin of another termination ethernet physical layer chip U4 DM9161AEP of the 5th resistance R 5, 39 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the 4th resistance R 4, the other end ground connection of the 4th resistance R 4, 11 pin of ethernet physical layer chip U4 DM9161AEP, 12 pin, 13 pin respectively with the second light emitting diode DS2, the 3rd light emitting diode DS3, the negative pole of the 4th light emitting diode DS4 connects, the second light emitting diode DS2, the 3rd light emitting diode DS3, the positive pole of the 4th light emitting diode DS4 connects respectively the 14th resistance R 14, the 13 resistance R 13, one end of the 12 resistance R 12, the 14th resistance R 14, the 13 resistance R 13, another termination VCC3.3 of the 12 resistance R 12, 48 pin of ethernet physical layer chip U4 DM9161AEP connect one end of the tenth resistance R 10, 47 pin of the other end of the tenth resistance R 10 and ethernet physical layer chip U4 DM9161AEP, 46 pin, 6 pin, 5 pin connect and ground connection, 31 pin of ethernet physical layer chip U4 DM9161AEP are connected with one end of the 11 resistance R 11, another termination 3.3V power supply of the 11 resistance R 11, 1 pin of ethernet physical layer chip U4 DM9161AEP, 2 pin connect one end of the second inductance L 2, the other end of the second inductance L 2, one end of the 13 matching capacitance C21, one end of the 14 matching capacitance capacitor C 22 is connected with 9 pin of ethernet physical layer chip U4 DM9161AEP and connects 2.5V power supply, the other end of capacitor C 21 is connected with the other end of capacitor C 22 and ground connection, 4 pin of ethernet physical layer chip U4 DM9161AEP and 8 pin of network transformer U5 H1102, one end of the 15 resistance R 15 connects, 3 pin of ethernet physical layer chip U4 DM9161AEP and 6 pin of network transformer U5 H1102, one end of the 16 resistance R 16 connects, the other end of the 15 resistance R 15, the other end of the 16 resistance R 16, one end of the tenth matching capacitance C18 connects, the other end ground connection of the tenth matching capacitance C18, 42 pin of ethernet physical layer chip U4 DM9161AEP connect 3 pin of crystal oscillator XET1, the 2 pin ground connection of crystal oscillator XET1, 1 pin of crystal oscillator XET1 connects one end of the 9th resistance R 9, one end of the other end of the 9th resistance R 9 and the 8th matching capacitance C16, 4 pin of crystal oscillator XET1 connect and meet VCC3.3, the other end ground connection of the 8th matching capacitance C16, 7 pin of ethernet physical layer chip U4 DM9161AEP are connected with 1 pin of network transformer U5 H1102, one end of the 18 resistance R 18, the other end of the 18 resistance R 18 is connected with the 9th one end of matching capacitance C17, one end of the 17 resistance R 17, the other end ground connection of the 9th matching capacitance C17, the other end of the 17 resistance R 17 is connected with 8 pin of ethernet physical layer chip U4 DM9161AEP, 3 pin of network transformer U5 H1102, 23 pin, 30 pin, 41 pin of ethernet physical layer chip U4 DM9161AEP connect 3.3V power supply, 10 pin, 15 pin, 33 pin, 44 pin ground connection, 17 pin, 18 pin, 22 pin, 26 pin, 27 pin, 34 pin, 16 pin, 38 pin, 35 pin, 43 pin, 14 pin, 45 foot rests skies,
2 pin of network transformer U5 H1102, one end of 7 pin and the 11 matching capacitance C19, one end of the 12 matching capacitance C20, one end of the 19 resistance R 19 connects, another termination 2.5V power supply of the 19 resistance R 19, the other end of the 11 matching capacitance C19, the other end ground connection of the 12 matching capacitance C20, 9 pin of network transformer U5 H1102, 11 pin, 14 pin, 16 pin respectively with 6 pin of network interface RJ-45, 3 pin, 2 pin, 1 pin connects, 10 pin of network transformer U5 H110, 15 pin respectively with one end of the 20 resistance R 20, one end of the 21 resistance R 21 connects, the other end of the 20 resistance R 20, the other end of the 21 resistance, one end of the 15 matching capacitance C23 connects, the other end ground connection of the 15 matching capacitance C23, 4 pin of network transformer U5 H110, 5 pin, 12 pin, 13 pin are unsettled,
4 pin of network interface RJ-45,5 pin connect one end of the 22 resistance R 22,7 pin, 8 pin connect one end of the 23 resistance R 23, and the other end of the 20 resistance R 20, the 21 other end of resistance R 21 and the other end of the 22 resistance R 22, the 23 other end of resistance R 23, one end of the 15 matching capacitance C23 are connected;
The first described control module comprises the first control chip U7 STM32F103VCT6, the 24 resistance R 24, keyswitch K1, the 15 matching capacitance C24, the 16 matching capacitance C25, the 17 matching capacitance C26, the 18 matching capacitance C27, the 19 matching capacitance C28, the first crystal oscillator Y1 and the second crystal oscillator Y2
14 pin of the first control chip U7 STM32F103VCT6 and one end of the 24 electric capacity R24, one end of keyswitch K1, one end of the 15 matching capacitance C24 connects, the other end of keyswitch K1 is connected with the other end of the 15 matching capacitance C24 and ground connection, another termination VCC3.3 of the 24 resistance R 24, the first 13 pin of control chip U7 STM32F103VCT6 and one end of the first crystal oscillator Y1, one end of the 16 matching capacitance C25 connects, first other end of crystal oscillator Y1 and one end of the 17 matching capacitance C26, 12 pin of the first control chip U7 STM32F103VCT6 connect, and the 16 other end of matching capacitance C25 and the other end of the 17 matching capacitance C26 are connected and ground connection, the first 9 pin of control chip U7 STM32F103VCT6 and one end of the second crystal oscillator Y2, one end of the 18 matching capacitance C27 connects, second other end of crystal oscillator Y2 and one end of the 19 matching capacitance C28, 8 pin of the first control chip U7 STM32F103VCT6 connect, and the 18 other end of matching capacitance C27 and the other end of the 19 matching capacitance C28 are connected and ground connection, 6 pin of the first control chip U7 STM32F103VCT6, 11 pin, 21 pin, 22 pin, 28 pin, 50 pin, 75 pin, 100 pin connect 3.3V power supply, 10 pin, 19 pin, 20 pin, 27 pin, 37 pin, 49 pin, 74 pin, 94 pin, 99 pin ground connection,
1 pin of the first control chip U7 STM32F103VCT6, 2 pin, 3 pin, 4 pin, 5 pin, 7 pin, 15 pin, 16 pin, 17 pin, 18 pin, 23 pin, 24 pin, 25 pin, 26 pin, 34 pin, 35 pin, 36 pin, 38 pin, 39 pin, 40 pin, 41 pin, 42 pin, 43 pin, 44 pin, 45 pin, 46 pin, 47 pin, 48 pin, 51 pin, 52 pin, 53 pin, 54 pin, 55 pin, 56 pin, 57 pin, 58 pin, 59 pin, 60 pin, 61 pin, 62 pin, 72 pin, 73 pin, 76 pin, 77 pin, 89 pin, 90 pin, 95 pin, 96 pin, 97 pin, 98 pin are unsettled,
Described control module comprises the second control chip U8 STM32F107VCT6, the 25 resistance R the 25, the 26 resistance R the 26, the 27 resistance R the 27, the 28 resistance R the 28, the 29 resistance R the 29, the 20 matching capacitance C29, the 21 matching capacitance C30, the 22 matching capacitance C31, the 23 matching capacitance C32, the 24 matching capacitance C33, the 3rd crystal oscillator Y3, the 4th crystal oscillator Y4
The second 13 pin of control chip U8 STM32F107VCT6 and one end of the 3rd crystal oscillator Y3, the 23 matching capacitance C32 connects, the 3rd other end of crystal oscillator Y3 and one end of the 24 matching capacitance C33, 12 pin of the second control chip U8 STM32F107VCT6 connect, the 23 other end of matching capacitance C32 and the other end of the 24 matching capacitance C33 are connected and ground connection, the second 9 pin of control chip U8 STM32F107VCT6 and one end of the 4th crystal oscillator Y4, one end of the 21 matching capacitance C30 connects, the 4th other end of crystal oscillator Y4 and one end of the 22 matching capacitance C31, 8 pin of the second control chip U8 STM32F107VCT6 connect, the 21 other end of matching capacitance C30 and the other end of the 22 matching capacitance C31 are connected and ground connection, 14 pin of the second control chip U8 STM32F107VCT6 and one end of the 29 resistance R 29, one end of the 20 matching capacitance C29 connects, another termination VCC3.3 of the 29 resistance, the other end ground connection of the 20 matching capacitance C29, 94 pin of the second control chip U8 STM32F107VCT6 and one end of the 26 resistance R 26, one end of the 28 resistance R 28 connects, 37 pin of the second control chip U8 STM32F107VCT6 and one end of the 25 resistance R 25, one end of the 27 resistance R 27 connects, the 25 other end of resistance R 25 and the other end of the 26 resistance R 26 are connected and meet VCC3.3, the other end ground connection of the other end of the 27 resistance R 27 and the 28 resistance R 28, 76 pin of the second control chip U8 STM32F107VCT6, run in respectively 2 pin of pin JP1 of 72 pin, 3 pin, the 1 pin ground connection of row's pin JP1, 6 pin of the second control chip U8 STM32F107VCT6,21 pin, 22 pin, 11 pin, 28 pin, 100 pin, 75 pin, 50 pin, meet VCC3.3,49 pin, 74 pin, 99 pin, 27 pin, 10 pin, 19 pin, 20 pin ground connection, 1 pin of the second control chip U8 STM32F107VCT6, 2 pin, 3 pin, 4 pin, 5 pin, 7 pin, 15 pin, 17 pin, 18 pin, 23 pin, 24 pin, 26 pin, 29 pin, 30 pin, 31 pin, 36 pin, 38 pin, 39 pin, 40 pin, 41 pin, 42 pin, 43 pin, 44 pin, 45 pin, 46 pin, 47 pin, 53 pin, 54 pin, 55 pin, 56 pin, 57 pin, 58 pin, 59 pin, 60 pin, 61 pin, 62 pin, 63 pin, 64 pin, 65 pin, 66 pin, 67 pin, 68 pin, 69 pin, 70 pin, 71 pin, 73 pin, 77 pin, 78 pin, 79 pin, 80 pin, 85 pin, 88 pin, 92 pin, 93 pin, 95 pin, 96 pin, 97 pin, 98 pin are unsettled.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310680699.6A CN103714421B (en) | 2013-12-12 | 2013-12-12 | A kind of information management system suitable for colony's long-distance running activity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310680699.6A CN103714421B (en) | 2013-12-12 | 2013-12-12 | A kind of information management system suitable for colony's long-distance running activity |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103714421A true CN103714421A (en) | 2014-04-09 |
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Cited By (2)
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| CN104537395A (en) * | 2014-11-28 | 2015-04-22 | 浙江芬雪琳针织服饰有限公司 | Intelligent RFID real-time production data acquisition terminal based on Internet-of-things technology |
| CN105381585A (en) * | 2015-12-08 | 2016-03-09 | 杭州电子科技大学 | Group long-distance running management intelligent terminal based on internet-of-things technology |
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| US20060041613A1 (en) * | 2004-08-18 | 2006-02-23 | Fackelmayer Jonathan R O | Method and system for visual art distribution and presentation |
| CN201094010Y (en) * | 2007-07-04 | 2008-07-30 | 长春理工大学 | Digital type signal processing and testing apparatus of position sensitivity detector |
| CN201828921U (en) * | 2010-10-18 | 2011-05-11 | 杭州傅立叶科技有限公司 | Integrated dual-frequency card reader |
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| US20060041613A1 (en) * | 2004-08-18 | 2006-02-23 | Fackelmayer Jonathan R O | Method and system for visual art distribution and presentation |
| CN201094010Y (en) * | 2007-07-04 | 2008-07-30 | 长春理工大学 | Digital type signal processing and testing apparatus of position sensitivity detector |
| CN201828921U (en) * | 2010-10-18 | 2011-05-11 | 杭州傅立叶科技有限公司 | Integrated dual-frequency card reader |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104537395A (en) * | 2014-11-28 | 2015-04-22 | 浙江芬雪琳针织服饰有限公司 | Intelligent RFID real-time production data acquisition terminal based on Internet-of-things technology |
| CN105381585A (en) * | 2015-12-08 | 2016-03-09 | 杭州电子科技大学 | Group long-distance running management intelligent terminal based on internet-of-things technology |
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