CN103684463B - The A/D conversion system of pipeline organization based on FWNN prediction network - Google Patents

Abstract

By FWNN, the A/D conversion system of pipeline organization based on FWNN prediction network, predicts that mixed-media network modules mixed-media, Data Synthesis module, the A/D chip of two high speed low-bit widths, a difference amplifier and a DA chip form.The streamline of two A/D chip composition two-stage AD conversion, input analogue signal is input to FWNN after first order AD conversion and predicts mixed-media network modules mixed-media, obtain hereafter certain moment approach input analogue signal data, these data DA are converted to analogue signal, plus and blowup is done with the difference of input analogue signal, it is re-fed into second level AD conversion, finally the data of twice AD conversion is obtained the high-precision AD conversion data corresponding to input analogue signal through Data Synthesis module.The present invention is realized at a high speed by the AD of two panels high speed low-bit width, high-precision AD conversion system, can be used at a high speed, in high precision, in the analogue signal conversion of Larger Dynamic scope and high s/n ratio requirement.

Description

The A/D conversion system of pipeline organization based on FWNN prediction network

Technical field

The present invention relates to a kind of A/D conversion system, can be used for high speed, Larger Dynamic scope, the mould of high s/n ratio Intend signals collecting.

Background technology

Fourier trasform spectroscopy (FTS) technology is a kind of spectrum analysis with Michelson's interferometer as core Technology, the feature of interference signal is that the signal near zero optical path difference is very strong, letter near maximum optical path difference Number the most weak, signal amplitude differs up to more than 100dB.

Detection Techniques based on FTS first interfering light to become faint current signal through opto-electronic conversion link, Carry out signal condition again.Amplifying circuit includes preposition amplification, main put with low-pass filter circuit and there is gain can Conditioning function, primarily to realize the signal of telecommunication of detector output is amplified and filters high-frequency noise, with Adapt to the sampling dynamic range of ADC.According to the characteristic of signal, for obtaining the highest signal to noise ratio, generally need Reached by high speed over-sampling and digital filtering technique, therefore the speed and precision to data collecting system proposes The highest requirement, as sample rate be 80MHz, number of significant digit is more than 18 etc..

Owing to, in FTS technology, dynamic range of signals is very big, signal to noise ratio requires the highest.By analog digital conversion The restriction of chip level of development, does not still have monolithic ADC to disclosure satisfy that this demand, is more not applied to space Chip product on boat level equipment, limits the detection accuracy of FTS technology to a certain extent.

Summary of the invention

The technology of the present invention solves problem: the present invention overcomes the deficiencies in the prior art, it is provided that a kind of based on The high precision analogue converting system of the pipeline organization of FWNN prediction network, can ensure high-speed sampling Improve the number of significant digit of AD system under premise, and then improve the conversion accuracy of system.

The technical solution of the present invention is: the analog digital conversion of pipeline organization based on FWNN prediction network System, including two AD conversion module, FWNN prediction network, D/A conversion module, one Individual time delay module, an error amplifier and a data synthesis module, wherein:

First AD conversion module: bit wide is M1, carries out digital sample to analogue signal A1 of outside input After obtain digital signal D1 and deliver to FWNN predict network；

Time delay module: obtain time delay mould after the time delay of a length of T when analogue signal A1 inputting outside is carried out Intend signal A2 and deliver to the input in the same direction of error amplifier；Described duration T is the first AD conversion mould The analog digital conversion time of block, the predicted time of FWNN prediction network and the digital-to-analogue conversion of D/A conversion module Time sum；

FWNN predicts network: utilize digital signal D1, uses BFGS training algorithm to build FWNN pre- Survey model, and utilize the prediction of FWNN forecast model to obtain the time delay of a length of T when carrying out of analogue signal A1 The digital signal D2 of rear correspondence also delivers to D/A conversion module；Utilize error digital signal Diff_D to structure The parameter of FWNN forecast model be corrected, improve the precision of prediction of FWNN forecast model；

D/A conversion module: digital signal D2 is carried out digital-to-analogue conversion and obtains prognosis modelling signal A3 and deliver to The reverse input end of error amplifier；

Error amplifier: time delay analogue signal A2 and prognosis modelling signal A3 are carried out error amplification, amplifies Multiple is G, and error simulation signal Diff_A after being amplified also delivers to the second AD conversion module, wherein G < 1/ Δ, Δ is the relative error of FWNN prediction network；

Second AD conversion module: bit wide is M2, carries out mould to the error simulation signal Diff_A after amplifying Number conversion obtains error digital signal Diff_D and delivers to FWNN prediction network and data synthesis module simultaneously, Wherein N > M1 >=M2；

Data Synthesis module: digital signal D2 and error digital signal Diff_D is carried out signal syntheses, Digital signal to M3 position exports to outside, wherein M3=M1+ [log₂(G)]-1, wherein symbol [X] represents Take the maximum integer of no more than X.

Present invention advantage compared with prior art is: the present invention is by the A/D chip of two high speed low-bit widths Constitute a two-level pipeline structure, the input after predicting the T moment by FWNN prediction mixed-media network modules mixed-media Signal, and then minimize the error between input signal and prediction signal, thus put by the difference of high-gain Big device, after error being amplified, carries out two grades of AD conversion, finally the data of two-stage AD conversion is sent into number According to synthesis module, it is thus achieved that high-precision AD conversion data.The speed that the present invention combines monolithic A/D chip is excellent Gesture and the forecast function of FWNN network, use the AD conversion structure of two-level pipeline, constitute AD and turn Change system, it is achieved that the analog-digital conversion function of high-speed, high precision.Turning of the AD conversion system that the present invention is constituted Throw-over degree depends on monolithic AD and the speed of DA chip, and up to 80MHz～120MHz, system bit wide is big In 20, the collection field of the analogue signal of many high speeds, Larger Dynamic scope, high s/n ratio can be met, It is based especially on the data acquisition of the interference signal of FTS technology.

Accompanying drawing explanation

Fig. 1 is the theory of constitution block diagram of present system；

Fig. 2 is that FWNN of the present invention predicts mixed-media network modules mixed-media structure chart.

Detailed description of the invention

As it is shown in figure 1, be the theory diagram of A/D conversion system of the present invention, specifically include that a secondary streams Water AD conversion structure, a FWNN predict mixed-media network modules mixed-media, DA conversion links, a time delay list Unit, a high-gain error amplifier and a data synthesis module.

The main flow of digital-to-analogue conversion is: it is M1 that the analogue signal of input produces figure place after first order ADC Digital signal D1, digital signal D1 through FWNN prediction mixed-media network modules mixed-media after, produce prediction after time delay T The digital signal D2 in moment, digital signal D2 again through N position DAC produce prediction after the time delay T moment Analogue signal A3.Now, through time a length of T time delay after, analogue signal becomes A2, by simulation believe Number A2 and analogue signal A3 send into the high-gain error amplifier that gain is G, the error after being amplified Analogue signal Diff_A, the error simulation signal after this being amplified is sent into second level ADC and is carried out second time AD Conversion, produces error digital signal Diff_D.Error digital signal Diff_D all sends into digital signal D2 Data Synthesis module, produces the AD conversion data that final bit wide is M3.Wherein, Diff_D sends into FWNN One tunnel of prediction mixed-media network modules mixed-media determines network parameter when model learning is trained.

Hereinafter each ingredient is described in detail.

I and II assembly line A/D transformational structure

The secondary streams elementary stream AD conversion structure of two ADC compositions is the body junction of converting system of the present invention Structure.Owing to the processing speed of FPGA or DSP is higher, therefore the conversion speed of this system depends primarily on two Individual ADC and the conversion speed of a DAC, need when choosing these three chip to follow the former of speeds match Then, even if its speeds match of three is got up, to improve the efficiency of conversion speed.Generally, the conversion of this system Speed is up to 80MHz～120MHz, but less than in the application of this conversion speed, will be easier to realize.

When selecting AD, DA chip bit wide, following principle should be followed: 1. M1 is the biggest, and M1 >= M2, because first ADC is main conversion chip, on the premise of meeting conversion speed requirements, selects The ADC of the maximum bit wide that can obtain；2. second level ADC is for entering the AD conversion link of the first order Row is revised, and improves conversion accuracy further, depending on the multiple G of the selection error amplifier to be combined of M2, Generally M2 can be taken as [log₂(G)]+1, wherein symbol [X] represents the maximum integer taking no more than X.Excessive M2 does not has meaning to improving system accuracy；3. the selection principle of DAC bit wide is usually N=M1+1, this It is because when D1 is predicted, 1 may be derived, make the data bit width of D1 broaden, but Under normal circumstances, increase by 1 and can meet required precision.

Two, high-gain error amplifier

High-gain error amplifier can be made up of difference amplifier, instrumentation amplifier or subtractor, mainly realizes The error of A2 Yu A3 signal is amplified.Its amplification G determines the precision of converting system, and this value is the highest, System conversion accuracy is the highest, but the selection of G to be chosen in conjunction with the performance of prediction mixed-media network modules mixed-media, does not make by mistake Difference signal is amplified to distortion or saturation, thus G < 1/ Δ (Δ is the relative error of prediction mixed-media network modules mixed-media, logical Often it is smaller than 1%).Generally, according to the performance of prediction mixed-media network modules mixed-media, guard and choose G=32.

Three, FWNN predicts network

FWNN predicts network, i.e. Fuzzy Wavelet Network (Fuzzy Wavelet Neural Network), Its model structure include input layer, obscuring layer, fuzzy rule layer, normalization layer, rule weighing output layer and Final output layers etc. 6 layers, detailed content sees reference document Fuzzy Wavelet Neural Network Models for Prediction and Identification of Dynamical Systems,Sevcan Yilmaz and Yusuf Oysal,IEEE Transactions on Neural Networks, Vol.21, No.10, October2010.

In the present invention:

1, model structure: the FWNN being illustrated in figure 2 the present invention predicts network architecture figure, uses MISO(multi input single output) structure.According to the complexity of input signal, at input layer The network structure that 4 neurons of middle employing (sampled point, the bit wide of each sampled point is M1) input, In obscuring layer, each neuron inputs having 2 memberships (representing in figure), membership with A Every kind of possible combination form 16 fuzzy rules altogether, fuzzy rule output after normalization with input layer The input of each neuron as the input of Wavelet-Weighted output layer, 16 of last Wavelet-Weighted output layer As the output of FWNN network after output summation.

When selecting the input of more neuron and more membership, the precision of prediction can be increased, but same Time the complexity of algorithm and predictive efficiency also can be made to reduce.

2, learning training method: use BFGS algorithm that sample sequence is trained, use the non-essence of Wolfe Iteration step length is found in true linear search, after repeatedly training, when maximum error meet require time, stop Training.The parameter finally training obtained is fixing in a network, then is predicted actual signal.

3, model parameter: in the present invention, model parameter includes Gauss member function (the expression side of membership Formula) in Center Parameter μ, scale parameter σ and wavelet function in translation parameters b, warp parameter c with And the weights coefficient ω of fuzzy rule output.These unknown parameter vectors, i.e. q=[μ, σ, b, c, ω] is represented with q. In the present invention, network structure has 4 inputs, and each input is to having 2 memberships, therefore μ and σ There are 8 respectively.The number of each x correspondence fuzzy rule is equal to 16, therefore [b, c, ω] has 64 respectively, not The total number knowing network parameter is 208.

4, initiation parameter selects: in the present invention, and initiation parameter selects to include: It it is the random vector of 0 to 1；Initialize training iterative parameter, the coefficient square of the Wolfe direction of search Battle array H₀[i][j]=1,i=1:208,j=1:208；The bound parameter in Wolfe search initialization interval is respectively c₁=0.0001,c₂=0.5。

5, learning training signal type: according to the difference of input analog signal types, it should use different having Sample signal carries out learning training targetedly.In the present invention, for the characteristic of interference signal, use class sinc Signal carries out learning training, and learning training number of times is less than 300 times, it was predicted that error is smaller than 1%.To other The prediction effect of regular stronger sine wave, triangular wave etc. is more preferable, but square wave etc. is had the strongest mutability The prediction effect of signal is poor.The number of times of training requires to be as the criterion, generally at hundreds of model to meet maximum error In enclosing.

Four, Data Synthesis module

The result that Data Synthesis module is changed with second level ADC for the digital signal predicted by FWNN Diff_D synthesizes a road output, the most final digital output signal y.According to the theory diagram of Fig. 1, input Analogue signal

$A_2=A_3+\frac{\mathrm{Diff}\_A}{G}$

And then,

$A_2=k_1\&CenterDot;D_2+\frac{\mathrm{Diff}\_D}{G\&CenterDot;k_2}$

Wherein, K₁For DAC chip conversion coefficient from digital signal to analogue signal, unit is: V/DN value, K₂For second level ADC conversion coefficient from analogue signal to digital signal, unit is: DN value/V.K₁、 K₂, G can obtain coarse value by the handbook of DAC, ADC and design load, it is also possible to by calibration Obtain its exact value.On the basis of the conversion coefficient of second level ADC, then have

A₂=y/k₂

Thus, have

$y=k_1\&CenterDot;k_2\&CenterDot;D_2+\frac{\mathrm{Diff}\_D}{G}$

Generally, K₁K₂Long-pending close to 1, the precision of y depends primarily on G-value, and G is the biggest, and conversion accuracy is the highest. The number of significant digit of D2 be the equivalent figure place of M1, G be log₂(G) (numerical value is rounded downwards).In theory, y Number of significant digit be M1+ [log₂(G)], but there is certain error in view of Data Synthesis, final y's is effective Figure place is generally up to M3=M1+ [log₂(G)]-1。

The content not being described in detail in description of the invention belongs to the known technology of those skilled in the art.

Claims (1)

1. the A/D conversion system of pipeline organization based on FWNN prediction network, it is characterised in that: bag Include two AD conversion module, a FWNN predicts network, D/A conversion module, a time delay mould Block, an error amplifier and a data synthesis module, wherein:

First AD conversion module: bit wide is M1, carries out digital sample to analogue signal A1 of outside input After obtain digital signal D1 and deliver to FWNN predict network；

Time delay module: obtain time delay mould after the time delay of a length of T when analogue signal A1 inputting outside is carried out Intend signal A2 and deliver to the input in the same direction of error amplifier；Described duration T is the first AD conversion mould The analog digital conversion time of block, the predicted time of FWNN prediction network and the digital-to-analogue conversion of D/A conversion module Time sum；

FWNN predicts network: utilize digital signal D1, uses BFGS training algorithm to build FWNN pre- Survey model, and utilize the prediction of FWNN forecast model to obtain the time delay of a length of T when carrying out of analogue signal A1 The digital signal D2 of rear correspondence also delivers to D/A conversion module；Utilize error digital signal Diff_D to structure The parameter of FWNN forecast model be corrected, improve the precision of prediction of FWNN forecast model；

D/A conversion module: bit wide is N, carries out digital-to-analogue conversion to digital signal D2 and obtains prognosis modelling signal A3 also delivers to the reverse input end of error amplifier；

Error amplifier: time delay analogue signal A2 and prognosis modelling signal A3 are carried out error amplification, amplifies Multiple is G, and error simulation signal Diff_A after being amplified also delivers to the second AD conversion module, wherein G < 1/ Δ, Δ is the relative error of FWNN prediction network；

Second AD conversion module: bit wide is M2, carries out mould to the error simulation signal Diff_A after amplifying Number conversion obtains error digital signal Diff_D and delivers to FWNN prediction network and data synthesis module simultaneously, Wherein N > M1 >=M2；

Data Synthesis module: digital signal D2 and error digital signal Diff_D is carried out signal syntheses, Digital signal to M3 position exports to outside, wherein M3=M1+ [log₂(G)]-1, wherein symbol [X] represents Take the maximum integer of no more than X.