CN103630881A - Online synchronous regulating circuit and method for use in distributed waveform generation - Google Patents
Online synchronous regulating circuit and method for use in distributed waveform generation Download PDFInfo
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- CN103630881A CN103630881A CN201310513613.0A CN201310513613A CN103630881A CN 103630881 A CN103630881 A CN 103630881A CN 201310513613 A CN201310513613 A CN 201310513613A CN 103630881 A CN103630881 A CN 103630881A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
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Abstract
The invention belongs to the technical field of synchronous comprehensive design for radar distributed waveform generation, and particularly relates to an online synchronous regulating circuit and method for use in distributed waveform generation. A main control terminal completes controlled communication with a waveform generation part in a receiving-transmitting assembly, and setting and adjustment of relevant parameters such as the leading edge and lagging edge of waveform output and initial frequency are realized according to a preset communication protocol. The online synchronous regulating circuit has the advantages of low cost, convenience and rapidness in operation, high accuracy, simple structure and easiness in integration.
Description
Technical field
The invention belongs to the distributed waveform generation synchronism of radar comprehensive Design technical field, be specifically related to a kind of distributed waveform generation on-line synchronous Circuit tuning and method.
Background technology
The design of phased-array radar waveform generation mainly can be divided into centralized waveform generation and the design of distributed waveform generation, centralized waveform generation design is unified waveform generation intermediate-freuqncy signal to be isolated to merit divide, offer each transmitting-receiving subassembly, this kind of method shortcoming is each unity of form that transmits, and can not change flexibly; Distributed waveform generation is that each transmitting-receiving subassembly has independently wave generating unit, compares with centralized waveform generation, has that Waveform Control is flexible, the high obvious advantage of phase shifting accuracy.But the radar that adopts distributed waveform to produce has following shortcoming: between passage, the difference of analog channel characteristic causes the difference of interchannel output signal; Device batch property difference and the difference of the output signal that causes; Above shortcoming is difficult to accurately control in actual design and batch product process, but in distributed radar transmitting-receiving subassembly, the conforming good and bad energy of radar in space that can directly affect of waveform generation output synthesizes, and then affect the critical index of the radars such as power coverage of radar, so can this problem effectively solve, become one of Main Bottleneck promoting this type of radar performance.
Now to produce and in design process, apply the commonplace method of synchronization be that synchronizing function by integrated DDS chip self realizes to multi-channel waveform, during design, need to provide synchronizing signal by clock distributor, guarantee synchronism and the consistance of each DDS device output signal.In distributed waveform generation Radar Design process, because signal generator divides in physical space, be relatively independent, so the method be difficult to solve distributed signal produce interchannel with batch between the synchronism difference problem of existence.
In phased-array radar, the stationary problem that transmitting-receiving subassembly adopts distributed signal to produce form mainly comprises phase-locking and time synchronized two aspects, phase-locking can be carried out by self corrective network of radar the phase differential of the interchannel signal of phase shift correction, but when signal produces between output signal, there is delay difference, can cause interchannel signal to produce difference on the frequency at synchronization.In radar real work, the most frequently used signal is linear FM signal and nonlinear frequency modulation signal, this patent be take linear FM signal as example, according to the interchannel phase differential of characteristics of signals, will increase along with the increase of time, the phase differential that this kind of situation causes cannot be revised by corrective network, finally cause the synthetic result of radar dimensional energy to distort, have a strong impact on the overall performance of radar.
Based on this, the consistency problem the present invention is directed in distributed waveform generation Radar Design process proposes a kind of distributed waveform generation on-line synchronous method of adjustment based on DDS technology and simulating signal synthetic technology.
Summary of the invention
For the problem proposing in background technology, the invention provides the distributed waveform generation on-line synchronous of a kind of radar method.The method is completed with the waveform generation in transmitting-receiving subassembly and is partly controlled and communicate by letter by main control terminal, according to pre-set communication protocol, realizes the adjustment that arranges of the correlation parameters such as waveform output forward position, rear edge and initial frequency; In the radar producing at the multi-channel waveform of the distributed waveform generation of radar, each waveform generation passage is comprised of clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit, and wherein clock conditioning unit completes the processing to FPGA and DDS clock; Wave generating unit is adjusted control signal according to waveform code, phase shift code and interface and is produced corresponding waveform signal, and simulated frequency conversion unit completes radiofrequency signal output after completing twice up-conversion.Thereby produce the high radar waveform of radar distributed waveform generation interchannel synchronism precision, that the method has is with low cost, simple operation, precision is high and simple in structure be easy to integrated.
Technical method of the present invention is: a kind of distributed waveform generation on-line synchronous method of adjustment, comprise that N roadbed is in the Waveform generating circuit of DDS technology, every road Waveform generating circuit all comprises clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit, and its feature comprises the steps:
Step 1: the distributed waveform generation of hyperchannel based on DDS technology;
Step 2: exact and digital phase shifting is controlled;
Step 3: carry out initial frequency and delay parameter control based on serial ports;
Step 4: amplitude-phase consistency analysis after radio frequency analog pulse signal is synthetic,
Wherein, N is transmitting-receiving subassembly quantity.
Its beneficial effect is: produce synchronization accuracy high, waveform catalog is radar waveform flexibly.
The distribution of controlling based on serial ports as above is the synchronous method of waveform generation, it is characterized in that: in described step 1, the concrete grammar of the distributed waveform generation of hyperchannel is: the distributed N of radar road waveform generation adopts DDS technology to realize, wherein acp chip adopts the AD99XX family chip of ADI company, this chip is the Direct Digital Frequency Synthesizers that a slice cost performance is higher (DDS) chip, its speed is fast, output waveform is stable, frequency, phase place and amplitude all can control and resolution high.Its inner integrated 14 bit digital to analog converters (DAC) and support high 1GSPS ground sampling rate, control the output of DDS by FPGA.
The distribution of controlling based on serial ports as above is the synchronous method of waveform generation, it is characterized in that: in described step 2, the concrete grammar of high-precision numerical control phase shift is: according to 8 above control codes of FPGA decoding, deliver to DDS phase control word register, carry out accurate phase shifting control.
The distribution of controlling based on serial ports as above is the synchronous method of waveform generation, it is characterized in that: in described step 3, based on serial ports, carrying out the concrete grammar that initial frequency and delay parameter control is: the control of the initial frequency providing according to interface control unit and waveform delay parameter, utilizes DDS chip to produce the radar waveform that the needed interchannel of distributed waveform generation radar has high-precise synchronization.
The distribution of controlling based on serial ports as above is the synchronous method of waveform generation, it is characterized in that: in described step 4, the concrete grammar of the synthetic rear amplitude-phase consistency analysis of radio frequency analog pulse signal is: the radar waveform signal that DDS chip is produced carries out after the processing such as frequency conversion, filtering and amplification, directly carry out radio frequency analog synthetic, obtain between two-way and, difference signal, carry out width facies analysis and obtain conformity error.
An on-line synchronous Circuit tuning based on distributed waveform generation, comprises that identical Waveform generating circuit ，Mei road, N road all has clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit and forms; The input end of clock conditioning unit is connected with external clock, and DDS chip is delivered to as waveform generation clock in its output terminal one road, and FPGA is delivered to as work clock in another road; Interface control unit is connected with FPGA, controls the waveform catalog of DDS output; Wave generating unit is that DDS chip is according to external clock and the needed intermediate frequency Modulation waveform signal of Waveform Control parameter generating radar; Interface control unit is connected with FPGA, and the waveform parameters such as original frequency, waveform catalog and output time are delivered to DDS chip, produces the needed radar waveform of radar; Simulated frequency conversion unit is connected with the output of DDS chip, and the modulated intermediate frequency signal that DDS is produced amplifies and frequency conversion obtains the last radiofrequency signal of launching of radar.
On-line synchronous Circuit tuning based on distributed waveform generation as above, it is characterized in that: by clock modulate circuit, DDS chip AD9910, serial interface chip MAX232E and FPGA EP2C70F672I8, formed, wherein clock modulate circuit is connected with FPAG with DDS chip, serial interface chip is connected with FPGA, and the radar fm waveform output terminal that DDS chip AD9910 chip produces is connected with the input end of frequency conversion, filtering and amplifying circuit.Its beneficial effect is: produce lowly spuiously, low make an uproar mutually, high resolving power, interchannel synchronization accuracy is high and the radar frequency modulation radiofrequency signal of high conformity.
Accompanying drawing explanation
Fig. 1: working-flow figure;
Fig. 2: system architecture diagram.
Embodiment
Below in conjunction with accompanying drawing, the present invention will be further described.
A kind of based on distributed radar waveform generation on-line synchronous method for designing, be illustrated in figure 2 the structure composition frame chart of native system, system mainly consists of clock conditioning unit, DDS chip AD9910, serial interface chip MAX232E and FPGA EP2C70F672I8, wherein clock conditioning unit is connected with FPAG with DDS chip, serial interface chip is connected with FPGA, the radar fm waveform output terminal that DDS chip AD9910 chip produces is connected with the input end of frequency conversion, filtering and amplifying circuit, and its delivery outlet is directly connected with delivery outlet.Its beneficial effect is: produce lowly spuiously, low make an uproar mutually, high resolving power, radar fm waveform signal that interchannel synchronization accuracy is high.
By the above critical piece, just can realize that according to waveform code, phase shift code and curing waveform parameter, to produce the repetition period be T, carrier frequency is
waveform signal, pulse width τ is respectively 30 μ s or 60 μ s or 100 μ s, the interchannel that bandwidth B is respectively 2MHz or 10MHz has high-precision synchronous linear FM signal.And by serial ports, control, can change in real time online the concrete waveform parameters such as the initial frequency of interchannel waveform and waveform time delay, produce the transmitted waveform that meets radar complete machine needs.
Phase differential between the distributed waveform generation of radar that the present invention revises be mainly by:
1) difference of phase place between channel reference clock;
2) time difference of DDS waveform control signal configuration register;
3) signal produces the difference of the analog feature indexs such as group delay of simulation part in passage.
The present invention is that the waveform generation technology of take based on DDS is basis, the method of a kind of online solution interchannel synchronism problem proposing, the choosing of external clock mainly be take the frequency of the intermediate frequency waveform signal that DDS produces as main, the waveform clock of selecting in this example is the 80MHz of outside input, through oversampling clock modulate circuit, one tunnel produces 400MHz and delivers to DDS chip AD9910 as waveform generation clock after 5 frequencys multiplication, and another road 80MHz directly delivers to FPGA as work clock.
During signal, to produce passage be benchmark to wide adjustment ，Yi mono-road signal, and other signal produces passage and compares with it adjustment, by serial ports, adjusts the He Houyan position, position, forward position that waveform is exported, make error on the time domain width between two-way≤
.
Interchannel waveform overlaps and adjusts initial phase, reads the phase differential in two forward positions, passage waveform overlapping region from oscillograph
, phase shift code adopts 8 bit parallel codes to control, and corresponding phase place adjustment control word is
, make two channel signal overlapping region start-up phase potential differences
0 ° of ≈.
The adjustment of interchannel waveform overlapping region difference on the frequency, reads afterbody phase differential by oscillograph
, by
, show that afterbody constantly
instantaneous frequency poor
, the frequency control register of DDS chip is 48, i.e. frequency control word
,
for module output initial frequency, by serial ports by this
send into DDS corresponding configuration register, and then fine setting initial frequency, make along trying one's best, to overlap thereafter, reduced interchannel synchronism difference, substantially to meet the requirement of radar overall performance.
The concrete implementation procedure according to the present invention below, systematic error is carried out to analytical calculation:
First, paired pulses forward position phase place is proofreaied and correct, and because phase shifting control is 8 bit parallel control signals, the forward position phase difference value reading according to oscillograph calculates corresponding phase control code, completes forward position phase alignment.
Secondly, after reading pulse matching region, along phase error, extrapolate pulsed frequency error, utilize serial ports to carry out frequency of amendment.
So system main source of error can reach in oscillograph, read precision.Be that error formula is
, wherein
for the theoretical error that oscillograph is read, B is signal bandwidth,
centre frequency for signal carrier frequency.Yet reading error can reach 2ps in theory on oscillograph, in fact through reading repeatedly, get after average, can make in be controlled at ± 2.5ps of error.Suppose signal bandwidth B=2MHz, centre frequency is
=1200MHz, under error maximum case
=5ps, the maximum error drawing is
=3ns, is folded to pulse back edge phase error and is about 2.2 °, can meet the requirement of the lobe coverage of antenna, can imagine thus, and for B=10MHz broadband signal, such error can be less.As can be seen here, the adjustment control accuracy that this method reaches is far above the synchronization accuracy of introducing in usual manner.
This method for the distributed waveform generation method for designing of radar, be mainly used in owing to being physically distributed waveform generation separately, the synchronism design that cannot adopt ADI company to recommend, makes the distributed waveform generation of radar have wider application prospect.
Claims (7)
1. a distributed waveform generation on-line synchronous method of adjustment, comprise that N roadbed is in the Waveform generating circuit of DDS technology, every road Waveform generating circuit all comprises clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit, and its feature comprises the steps:
Step 1: the distributed waveform generation of hyperchannel based on DDS technology;
Step 2: exact and digital phase shifting is controlled;
Step 3: carry out initial frequency and delay parameter control based on serial ports;
Step 4: amplitude-phase consistency analysis after radio frequency analog pulse signal is synthetic,
Wherein, N is transmitting-receiving subassembly quantity.
2. the distribution of controlling based on serial ports as claimed in claim 1 is the synchronous method of waveform generation, it is characterized in that: in described step 1, the concrete grammar of the distributed waveform generation of hyperchannel is: the distributed N of radar road waveform generation adopts DDS technology to realize, and wherein acp chip adopts the AD99XX family chip of ADI company.
3. the distribution of controlling based on serial ports as claimed in claim 1 is the synchronous method of waveform generation, it is characterized in that: in described step 2, the concrete grammar of high-precision numerical control phase shift is: according to 8 above control codes of FPGA decoding, deliver to DDS phase control word register, carry out accurate phase shifting control.
4. the distribution of controlling based on serial ports as claimed in claim 1 is the synchronous method of waveform generation, it is characterized in that: in described step 3, based on serial ports, carrying out the concrete grammar that initial frequency and delay parameter control is: the control of the initial frequency providing according to interface control unit and waveform delay parameter, utilizes DDS chip to produce the radar waveform that the needed interchannel of distributed waveform generation radar has high-precise synchronization.
5. the distribution of controlling based on serial ports as claimed in claim 1 is the synchronous method of waveform generation, it is characterized in that: in described step 4, the concrete grammar of the synthetic rear amplitude-phase consistency analysis of radio frequency analog pulse signal is: the radar waveform signal that DDS chip is produced carries out after the processing such as frequency conversion, filtering and amplification, directly carry out radio frequency analog synthetic, obtain between two-way and, difference signal, carry out width facies analysis and obtain conformity error.
6. the on-line synchronous Circuit tuning based on distributed waveform generation, comprises that identical Waveform generating circuit ，Mei road, N road all has clock conditioning unit, wave generating unit, interface control unit and simulated frequency conversion unit and forms; The input end of clock conditioning unit is connected with external clock, and DDS chip is delivered to as waveform generation clock in its output terminal one road, and FPGA is delivered to as work clock in another road; Interface control unit is connected with FPGA, controls the waveform catalog of DDS output; Wave generating unit is that DDS chip is according to external clock and the needed intermediate frequency Modulation waveform signal of Waveform Control parameter generating radar; Interface control unit is connected with FPGA, and the waveform parameters such as original frequency, waveform catalog and output time are delivered to DDS chip, produces the needed radar waveform of radar; Simulated frequency conversion unit is connected with the output of DDS chip, and the modulated intermediate frequency signal that DDS is produced amplifies and frequency conversion obtains the last radiofrequency signal of launching of radar.
7. the on-line synchronous Circuit tuning based on distributed waveform generation as claimed in claim 6, it is characterized in that: by clock modulate circuit, DDS chip AD9910, serial interface chip MAX232E and FPGA EP2C70F672I8, formed, wherein clock modulate circuit is connected with FPAG with DDS chip, serial interface chip is connected with FPGA, and the radar fm waveform output terminal that DDS chip AD9910 chip produces is connected with the input end of frequency conversion, filtering and amplifying circuit.
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| CN201310513613.0A CN103630881B (en) | 2013-10-28 | 2013-10-28 | A kind of distributed waveform generation on-line synchronous Circuit tuning and method |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106354196A (en) * | 2016-09-29 | 2017-01-25 | 华东电子工程研究所（中国电子科技集团公司第三十八研究所） | Low-noise broadband signal generator and signal generating method |
| CN108401003A (en) * | 2017-02-08 | 2018-08-14 | 北京百度网讯科技有限公司 | Synchronous method, device, equipment and the computer storage media of radar data |
| CN109061572A (en) * | 2018-06-21 | 2018-12-21 | 武汉滨湖电子有限责任公司 | DDS realizes the four-way T/R component realization method of digital phase shift as local oscillator |
| CN111220952A (en) * | 2020-03-16 | 2020-06-02 | 中国人民解放军63926部队 | Phased array radar area type high-precision adjusting method under large-load working condition |
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| JPH08330914A (en) * | 1995-05-29 | 1996-12-13 | Yokogawa Electric Corp | Waveform generator |
| CN101162398A (en) * | 2006-10-12 | 2008-04-16 | 东莞理工学院 | Arbitrarily signal generating device |
| US7576616B2 (en) * | 2005-08-29 | 2009-08-18 | Agilent Technologies, Inc. | Phase controlling apparatus, frequency controlling apparatus, oscillating apparatus, phase controlling method, and frequency controlling method |
| CN102780490A (en) * | 2012-08-14 | 2012-11-14 | 武汉滨湖电子有限责任公司 | DDS (direct digital synthesis) type ultra-wide band frequency-modulated signal generating circuit and method |
| CN102904550A (en) * | 2012-09-26 | 2013-01-30 | 北京工业大学 | Multi-channel synchronous waveform generator based on AD9959 |
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2013
- 2013-10-28 CN CN201310513613.0A patent/CN103630881B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08330914A (en) * | 1995-05-29 | 1996-12-13 | Yokogawa Electric Corp | Waveform generator |
| US7576616B2 (en) * | 2005-08-29 | 2009-08-18 | Agilent Technologies, Inc. | Phase controlling apparatus, frequency controlling apparatus, oscillating apparatus, phase controlling method, and frequency controlling method |
| CN101162398A (en) * | 2006-10-12 | 2008-04-16 | 东莞理工学院 | Arbitrarily signal generating device |
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| CN102904550A (en) * | 2012-09-26 | 2013-01-30 | 北京工业大学 | Multi-channel synchronous waveform generator based on AD9959 |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106354196A (en) * | 2016-09-29 | 2017-01-25 | 华东电子工程研究所（中国电子科技集团公司第三十八研究所） | Low-noise broadband signal generator and signal generating method |
| CN108401003A (en) * | 2017-02-08 | 2018-08-14 | 北京百度网讯科技有限公司 | Synchronous method, device, equipment and the computer storage media of radar data |
| CN109061572A (en) * | 2018-06-21 | 2018-12-21 | 武汉滨湖电子有限责任公司 | DDS realizes the four-way T/R component realization method of digital phase shift as local oscillator |
| CN111220952A (en) * | 2020-03-16 | 2020-06-02 | 中国人民解放军63926部队 | Phased array radar area type high-precision adjusting method under large-load working condition |
| CN111220952B (en) * | 2020-03-16 | 2021-09-17 | 中国人民解放军63926部队 | Phased array radar area type high-precision adjusting method under large-load working condition |
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