CN103630164B - The orthogonal standardized method of two-way interference signal and device - Google Patents
The orthogonal standardized method of two-way interference signal and device Download PDFInfo
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- CN103630164B CN103630164B CN201310717911.1A CN201310717911A CN103630164B CN 103630164 B CN103630164 B CN 103630164B CN 201310717911 A CN201310717911 A CN 201310717911A CN 103630164 B CN103630164 B CN 103630164B
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Abstract
The embodiment of the invention discloses the orthogonal standardized method of two-way interference signal and device.Described method comprises determining that the first pending signal and the second pending signal；First and second pending signal is carried out DC processing respectively, generates first and second and remove direct current signal；Go direct current signal to carry out amplitude units respectively first and second, generate first and second unitization signal；First and second unitization signal is orthogonalized process, obtains first and second orthogonalized signal；First and second orthogonalized signal is carried out respectively amplitude units process, it is achieved the orthogonal standardization of two-way interference signal.Described device includes: input block, removes direct current component, the first unitization unit, orthogonalization unit, the second unitization unit.The method and device that the embodiment of the present invention provides is owing to using hardware circuit to realize regulation and the process of interference signal, and conversion speed is fast, frequency response is high, and signal processing link is few and is difficult to make primary signal quality reduce.
Description
Technical field
The present invention relates to metrological testing technology field, particularly relate to the orthogonal standardized method of two-way interference signal and device.
Background technology
Laser interferometry refers to utilize principle of interference to measure the measuring method about physical quantity.Laser interferometry has very
High measurement sensitivity and precision, can be used for the survey of the aspects such as displacement, length, angle, medium refraction index change and vibration
Amount.When carrying out laser interferometry, first generated interference signal by interferometer；Then by computer or other set
For carrying out calculating measurement result according to interference signal.The interference signal that interferometer generates is usually two-way interference signal, its
In a road be properly termed as the first interference signal, another road is properly termed as the second interference signal.Survey calculating according to interference signal
During amount result, need the first interference signal and the second interference signal quadrature in phase, amplitude equal, and the first interference signal
With the second interference signal all without DC component, i.e. needing two-way interference signal is orthogonal normalized signal.Therefore, at meter
Need to realize the orthogonal standardization of two-way interference signal before calculating measurement result.
Realizing the orthogonal standardized method of two-way interference signal and have multiple, wherein, the method being most frequently with is digitizing solution.
Use digitizing solution to realize the orthogonal standardization of two-way interference signal and generally include following steps: by two-way interference signal from mould
Intend signal and be converted to digital signal；By microcontroller (MCU, Micro Control Unit), digital signal processor (DSP,
Digital Singnal Processor) or computer software etc. calculate the quadrature error of two paths of signals, range error,
Offset error；By digital-to-analogue conversion, each error is converted to the control signal of analog signal form；Adjust circuit in institute
State and under the control of control signal, two-way interference signal is adjusted, it is achieved the orthogonal standardization of two-way interference signal.
From the above it can be seen that use existing method to realize the orthogonal standardization of two-way interference signal, processing procedure needs
Carrying out analog digital conversion and digital-to-analogue conversion, not only processing speed is relatively slow, and can be because processing links is easily caused signal quality more
Decline.
Summary of the invention
Embodiments provide the orthogonal standardized method of two-way interference signal and device, to solve to use existing method real
The existing orthogonal standardization of two-way interference signal, processing speed compared with slow, processing links is many and is easily caused the problem that signal quality declines.
First aspect, embodiments provides a kind of orthogonal standardized method of two-way interference signal, and described method includes:
The first pending signal and the second pending signal is determined according to the first interference signal and the second interference signal；To described
First pending signal and described second pending signal carry out DC processing respectively, generate first and remove direct current signal and the
Two remove direct current signal；Go direct current signal and described second to go direct current signal to carry out amplitude units respectively to described first, raw
Become the first unitization signal and the second unitization signal；Described first unitization signal is entered with described second unitization signal
Row orthogonalization process, obtains the first orthogonalized signal and the second orthogonalized signal；To described first orthogonalized signal and described
Second orthogonalized signal carries out amplitude units process respectively, it is achieved the orthogonal standardization of two-way interference signal.
In conjunction with first aspect, in the first possible implementation of first aspect, described according to the first interference signal and
Two interference signals determine that the first pending signal and the second pending signal include:
Described first interference signal is tentatively nursed one's health with described second interference signal, generates described first pending signal
And described second pending signal.
In conjunction with the first possible implementation of first aspect, in the implementation that first aspect the second is possible, described
Described first interference signal is tentatively nursed one's health with described second interference signal, generates described first pending signal and institute
State the second pending signal to include:
The amplitude of described first interference signal is carried out just successive step with DC component, generates the first initial adjustment signal；To described
The amplitude of the second interference signal and DC component carry out just successive step, generate the second initial adjustment signal；To described first initial adjustment letter
Number and described second initial adjustment signal between phase place carry out just successive step, generate described first pending signal and described second
Pending signal.
In conjunction with the realization side that first aspect, the first possible implementation of first aspect or first aspect the second are possible
Formula, in the third possible implementation of first aspect, described waits to locate to described first pending signal and described second
Reason signal carries out DC processing respectively, generates first and goes direct current signal and second to go direct current signal to include:
Generate and the first phase anticipating signal that described first pending signal phase difference is 180 °；Treat according to described first
Process signal and generate the first DC component with described first phase anticipating signal；According to described first DC component to described
One pending signal carries out DC processing, generates first and removes direct current signal；Generate and described second pending signal phase
Difference is the second phase anticipating signal of 180 °；Raw with described second phase anticipating signal according to described second pending signal
Become the second DC component；According to described second DC component, described second pending signal is carried out DC processing, generate
Second removes direct current signal.
In conjunction with the implementation that first aspect, the first possible implementation of first aspect, first aspect the second are possible
Or the third possible implementation of first aspect, in the 4th kind of possible implementation of first aspect, described to described
First unitization signal and described second unitization signal are orthogonalized process, are just obtaining the first orthogonalized signal and second
Friendshipization signal includes:
Generating the first orthogonalized signal, described first orthogonalized signal is described first unitization signal and described second unit
Change the plus signal of signal；Generate the second orthogonalized signal, described second orthogonalized signal be described first unitization signal with
The cut signal of described second unitization signal.
Second aspect, the embodiment of the present invention additionally provides a kind of orthogonal modular station of two-way interference signal, described device bag
Include:
According to the first interference signal and the second interference signal, input block, for determining that the first pending signal and second is waited to locate
Reason signal；Remove direct current component, wait to locate for the described first pending signal and described second that described input block is generated
Reason signal carries out DC processing respectively, generates first and goes direct current signal and second to remove direct current signal；First unitization unit,
For to described go direct current component to generate described first go direct current signal and described second to go direct current signal to carry out amplitude respectively
Unitization, generate the first unitization signal and the second unitization signal；Orthogonalization unit, for described first unitization
The described first unitization signal that unit generates and described second unitization signal are orthogonalized process, obtain first orthogonal
Change signal and the second orthogonalized signal；Second unitization unit, is just being used for the generation of described orthogonalization unit described first
Friendshipization signal and described second orthogonalized signal carry out amplitude units process respectively, it is achieved the orthogonal standard of two-way interference signal
Change.
In conjunction with second aspect, in the first possible implementation of second aspect, described input block, for described
Obtain described first interference signal that gets of subelement tentatively to nurse one's health with described second interference signal, generate described the
One pending signal and described second pending signal.
In conjunction with the first possible implementation of second aspect, in the implementation that second aspect the second is possible, described
Input block, including:
First initial adjustment subelement, for the amplitude of described first interference signal and DC component carry out just successive step, generates
First initial adjustment signal；Second initial adjustment subelement, for carrying out tentatively the amplitude of described second interference signal and DC component
Adjust, generate the second initial adjustment signal；Phase place initial adjustment subelement, for described first initial adjustment subelement is generated described the
Phase place between the described second initial adjustment signal that one initial adjustment signal and described second initial adjustment subelement generate carries out just successive step,
Generate described first pending signal and described second pending signal.
In conjunction with the realization side that second aspect, the first possible implementation of second aspect or second aspect the second are possible
Formula, in the third possible implementation of second aspect, described in go direct current component to include:
First phase anticipating signal generates subelement, is 180 ° for generating with described first pending signal phase difference
First phase anticipating signal；First DC component generates subelement, for generating son according to described first phase anticipating signal
The described first pending signal that unit generates and described first phase anticipating signal generate the first DC component；First goes directly
Stream subelement, for generating described first DC component of subelement generation to described first according to described first DC component
Pending signal carries out DC processing, generates first and removes direct current signal；Second phase anticipating signal generates subelement, uses
In the second phase anticipating signal generated with described second pending signal phase difference is 180 °；Second DC component generates
Subelement, for generating the described second pending signal of subelement generation with described according to described second phase anticipating signal
Second phase anticipating signal generates the second DC component；Second removes direct current subelement, for according to described second DC component
Described second DC component generating subelement generation carries out DC processing to described second pending signal, generates second
Remove direct current signal.
In conjunction with the implementation that second aspect, the first possible implementation of second aspect, second aspect the second are possible
Or the third possible implementation of second aspect, in the 4th kind of possible implementation of second aspect, described orthogonalization
Unit includes:
First orthogonalized signal generates subelement, and for generating the first orthogonalized signal, described first orthogonalized signal is institute
State the plus signal of the first unitization signal and described second unitization signal；Second orthogonalized signal generates subelement, is used for
Generating the second orthogonalized signal, described second orthogonalized signal is described first unitization signal and described second unitization letter
Number cut signal.
In the embodiment of the present invention, determine that the first pending signal and second is treated according to the first interference signal and the second interference signal
Process signal；Described first pending signal and described second pending signal are carried out respectively DC processing, generates the
One goes direct current signal and second to remove direct current signal；Go direct current signal and described second to go direct current signal to enter respectively to described first
Line amplitude is unitization, generates the first unitization signal and the second unitization signal；To described first unitization signal with described
Second unitization signal is orthogonalized process, obtains the first orthogonalized signal and the second orthogonalized signal；To described first
Orthogonalized signal and described second orthogonalized signal carry out amplitude units process respectively, it is achieved the orthogonal mark of two-way interference signal
Standardization.Compared with prior art, the embodiment of the present invention is made without analog digital conversion or digital-to-analogue conversion, and all of step is all
Just can be realized by simple hardware circuit, the fast frequency response of regulation action is high, and can effectively prevent signal quality
Decline.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to required in embodiment
Accompanying drawing to be used is briefly described, it should be apparent that, the accompanying drawing in describing below is only some enforcements of the present invention
Example, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to attached according to these
Figure obtains other accompanying drawing.Shown in accompanying drawing, above and other purpose, feature and the advantage of the present invention will become apparent from.
The part that reference instruction identical in whole accompanying drawings is identical.The most deliberately draw attached by actual size equal proportion scaling
Figure, it is preferred that emphasis is illustrate the purport of the present invention.
Figure 1A is the flow chart of two-way interference signal of the present invention one embodiment of orthogonal standardized method；
Figure 1B is the present invention basic modulate circuit schematic diagram；
Fig. 1 C is initial adjustment circuit theory diagrams of the present invention；
Fig. 1 D is phase modulation circuit principle schematic of the present invention；
Fig. 1 E is removing DC road of the present invention theory diagram；
Fig. 1 F is the unitization schematic block circuit diagram of amplitude of the present invention；
Fig. 1 G is the orthogonalization principle schematic of vector of the present invention plus-minus；
Fig. 1 H is orthogonalization circuit theory diagrams of the present invention；
Fig. 1 I is the general hardware schematic block circuit diagram of the embodiment of the present invention；
Fig. 2 is the flow chart of two-way interference signal of the present invention another embodiment of orthogonal standardized method；
Fig. 3 A is the block diagram of two-way interference signal of the present invention one embodiment of orthogonal modular station；
Fig. 3 B is the block diagram of two-way interference signal of the present invention orthogonal modular station one embodiment of input block；
Fig. 3 C is the block diagram that the orthogonal modular station of two-way interference signal of the present invention goes one embodiment of direct current component；
Fig. 3 D is the block diagram of two-way interference signal of the present invention orthogonal modular station one embodiment of orthogonalization unit.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Description, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments.Base
Embodiment in the present invention, it is all that those of ordinary skill in the art are obtained under not making creative work premise
Other embodiments, broadly fall into the scope of protection of the invention.
See Figure 1A, for the flow chart of two-way interference signal of the present invention one embodiment of orthogonal standardized method, the method bag
Include following steps:
Step 101, determines the first pending signal and the second pending signal according to the first interference signal and the second interference signal.
The two-way interference signal got from interferometer includes the first interference signal and the second interference signal two-way.Dry according to first
Relate to signal and time the second interference signal determines the first pending signal and the second pending signal, directly can interfere letter by first
Number as the first pending signal, using the second interference signal as the second pending signal；Or, it is also possible to dry to first
Relate to signal and the second interference signal tentatively nurses one's health generation the first pending signal and the second pending signal.
Described first interference signal is tentatively nursed one's health with described second interference signal and may include steps of: to described first
The amplitude of interference signal and DC component carry out just successive step, generate the first initial adjustment signal；Amplitude to described second interference signal
Carry out just successive step with DC component, generate the second initial adjustment signal；To described first initial adjustment signal and described second initial adjustment signal it
Between phase place carry out just successive step, generate described first pending signal and described second pending signal.According to actual needs,
Can also use other steps or mode that described first interference signal is tentatively nursed one's health with described second interference signal.By just
Step is managed, and the orthogonal course of standardization process of two-way interference signal can be made more rapid, and result is more accurate.
Tentatively nurse one's health described first interference signal and described second interference signal to be come in fact by basic modulate circuit
Existing.Figure 1B is basic modulate circuit schematic diagram.As shown in Figure 1B, basic modulate circuit can be by initial adjustment circuit and phase modulation
Circuit is constituted.After first interference signal and the second interference signal are respectively through independent initial adjustment circuit conditioning, it is input to phase modulation
In circuit.The output of described phase modulation circuit is signal after the conditioning including the first pending signal and the second pending signal.
Fig. 1 C is initial adjustment circuit theory diagrams.As shown in Figure 1 C, described initial adjustment circuit can include operational amplifier 111,
First potentiometer the 112, second potentiometer 113 and the first resistance 114, wherein, described first potentiometer 112 high-end with
Low side connects positive supply and negative supply respectively, and sliding end is connected with the in-phase input end of described operational amplifier 111；Described
One end of one resistance 114 is connected with the in-phase input end of described operational amplifier 111, defeated as interference signal of the other end
Inbound port；The inverting input of the high-end and described operational amplifier 111 of described second potentiometer 113 is connected, sliding end
Being connected with the outfan of low side with described operational amplifier 111, the outfan of described amplifier is initial adjustment signal output port.
Fig. 1 D is phase modulation circuit principle schematic.To the phase place between described first initial adjustment signal and described second initial adjustment signal
Carry out just successive step, can be realized by potentiometer.As shown in figure ip, phase contrast is first initial adjustment signal X=asin (ω t) of α
It is separately input to the high-end of potentiometer and low side, from the output of potentiometer sliding end with the second initial adjustment signal Y=bsin (ω t+ α)
The phase theta of synthesis interference signal Z meets 0≤θ≤α along with potentiometer resistance ratio.
Step 102, carries out DC processing respectively to described first pending signal and described second pending signal, generates the
One goes direct current signal and second to remove direct current signal.
If the interference signal with DC component V is expressed as f (ω t)=asin (ω t+ β)+V, then interference signal direct current divides
Amount can be expressed asI.e. DC component V can be 180 ° from the biphase potential difference of this interference signal
The half of the amplitude sum of two diverse locations draws.
Specifically, described first pending signal is carried out DC processing may include steps of: generate with described
First pending signal phase difference is the first phase anticipating signal of 180 °；According to described first pending signal with described
First phase anticipating signal generates the first DC component；According to described first DC component, described first pending signal is entered
Row DC processing, generates first and removes direct current signal.Described second pending signal is carried out DC processing can include
Following steps: generate and the second phase anticipating signal that described second pending signal phase difference is 180 °；According to described
Second pending signal and described second phase anticipating signal generate the second DC component；According to described second DC component pair
Described second pending signal carries out DC processing, generates second and removes direct current signal.
Can use removing DC road that described first pending signal and described second pending signal are gone at direct current respectively
Reason.Fig. 1 E is described removing DC road principle schematic.
As referring to figure 1e, described removing DC road includes: phase inverter 120, the first signal transformation circuit 121, the first rising edge
Trigger circuit 122, the first sampling holder 123；Follower 124, secondary signal shaping circuit 125, the second rising edge triggers
Circuit 126, the second sampling holder 127；First added circuit 128, the second added circuit 129.
The signal A being input in described removing DC road can be divided into the signal that signal B is identical with signal C two-way.
Wherein, during signal B is input to phase inverter 120；Phase inverter 120 output signal B1 and signal B2, signal B1 and letter
Number B2 is identical signal；Signal B1 sequentially passes through the first signal transformation circuit 121 and the first rising edge triggers at circuit 122
The first sampling holder 123 it is input to after reason；Signal B2 directly inputs the first sampling holder 123；First sampling holder 123
Signal D is generated according to signal B1 and signal B2.
Signal C is input in follower 124；Follower 124 output signal C1, signal C2 and signal C3, signal C1,
Signal C2 and signal C3 is the signal that three tunnels are identical；Signal C1 sequentially passes through secondary signal shaping circuit 125 and second and rises
It is input to the second sampling holder 127 along triggering after circuit 126 processes；C2 signal directly inputs the second sampling holder 127；
Second sampling holder 127 generates signal E according to signal C1 and signal C2.
Signal D and signal E is input to the first added circuit 128, and the first added circuit 128 generates according to signal D and signal E
Signal F；Signal C3 and signal F is input to the second added circuit 129, and the second added circuit 129 is according to signal C3 and signal F
What the signal G generated was input signal A removes direct current signal.
Step 103, goes direct current signal and described second to go direct current signal to carry out amplitude units respectively to described first, generates the
One unitization signal and the second unitization signal.
Go direct current signal and described second method going direct current signal to carry out amplitude units to have multiple to described first, such as, can
To use amplitude units circuit to go direct current signal and described second to go direct current signal to carry out amplitude units respectively to described first.
Fig. 1 F is the unitization schematic block circuit diagram of amplitude.As shown in fig. 1f, amplitude units circuit can be by amplitude detector
131 and divider 132 constitute.First obtained the amplitude signal X corresponding with input signal Y by amplitude detector 131, then by
Divider 132 generates output signal Z, wherein Z=Y ÷ X.
Step 104, is orthogonalized process to described first unitization signal and described second unitization signal, is just obtaining first
Friendshipization signal and the second orthogonalized signal.
First unitization signal can use vector form to be expressed asSecond unitization signal can use vector
Form is expressed asFig. 1 G is the orthogonalization principle schematic of vector plus-minus.As shown in Figure 1 G, with vector
Computing is appreciated thatWithIt is mutually perpendicular to, i.e. constant amplitude is with the plus signal of two paths of signals of frequency and subtracts letter
Phase contrast between number is 90 °.Therefore, it can generate the first unitization signal and the plus signal of the second unitization signal, and
First unitization signal and the cut signal of the second unitization signal, the phase contrast between plus signal and cut signal is 90 °, therefore
Can be using plus signal as the first orthogonalized signal, using cut signal as the second orthogonalized signal.
Can use orthogonalization circuit that described first unitization signal and described second unitization signal are orthogonalized process,
Obtain the first orthogonalized signal and the second orthogonalized signal.Fig. 1 H is orthogonalization circuit theory diagrams.Described quadrature network can wrap
Include an adder and a subtractor, wherein, utilize adder second unitization with described for generating the first unitization signal
The plus signal of signal；Utilize subtractor for generating the cut signal of the first unitization signal and described second unitization signal.
Step 105, carries out amplitude units process respectively to described first orthogonalized signal and described second orthogonalized signal, raw
Be orthogonal standardization two-way interference signal.
After orthogonalization process, the first orthogonalized signal obtained and the second orthogonalized signal may no longer constant amplitude, therefore
Need the first orthogonalized signal and the second orthogonalized signal are carried out amplitude units respectively.To the first orthogonalized signal and
Two orthogonalized signals carry out amplitude units, it would however also be possible to employ the unitization circuit realiration of amplitude, just repeat no more at this.
After the first orthogonalized signal and described second orthogonalized signal are carried out amplitude units process respectively, first can be obtained
Output signal and the second output signal.First output signal is orthogonal with the second phase of output signal, amplitude is identical and does not wraps
Containing DC component, thus realize the orthogonal standardization of two-way interference signal.
Fig. 1 I is the general hardware schematic block circuit diagram of the embodiment of the present invention.
Described first interference signal and described second interference signal generate first after the conditioning of basic modulate circuit 151 and wait to locate
Reason signal and the second pending signal；The generation first after first goes DC component circuit 152 to process of first pending signal is gone
Direct current signal；Second pending signal goes DC component circuit 153 to generate second after processing through second and removes direct current signal；First
Direct current signal is gone to generate the first unitization signal after the first amplitude unitization circuit 154 processes；Second goes direct current signal to pass through
Second amplitude unitization circuit 155 generates the second unitization signal after processing；First unitization signal and the second unitization signal warp
Cross after orthogonalization circuit 156 processes and generate the first orthogonalized signal and the second orthogonalized signal；The 3rd unitization circuit pair of amplitude
First orthogonalized signal carries out amplitude unitsization and processes generation the first output signal；The 4th unitization circuit of amplitude is to the second orthogonalization
Signal carries out amplitude unitsization and processes generation the second output signal, thus realizes the orthogonal standardization of two-way interference signal.
From above-described embodiment it can be seen that determine the first pending signal and according to the first interference signal and the second interference signal
Two pending signals；Described first pending signal and described second pending signal are carried out respectively DC processing, generates the
One goes direct current signal and second to remove direct current signal；Go direct current signal and described second to go direct current signal to carry out width respectively to described first
Spend unitization, generate the first unitization signal and the second unitization signal；To described first unitization signal and described second unit
Change signal and be orthogonalized process, obtain the first orthogonalized signal and the second orthogonalized signal；To described first orthogonalized signal and
Described second orthogonalized signal carries out amplitude units process respectively, it is achieved the orthogonal standardization of two-way interference signal.The present embodiment is not
Needing to carry out analog digital conversion or digital-to-analogue conversion, all of step just can be realized by simple hardware circuit, not only adjusts
The fast frequency response of joint action is high, and can effectively prevent signal quality from declining.
See Fig. 2, for the flow chart of two-way interference signal of the present invention another embodiment of orthogonal standardized method.This embodiment
It is described in detail and realizes the process that two-way interference signal is orthogonal.
Step 201, carries out just successive step to amplitude and the DC component of described first interference signal, generates the first initial adjustment signal.
The amplitude of the first interference signal can also be accomplished in several ways with the first successive step of DC component.Such as, may be used
With the first successive step by the initial adjustment circuit realiration amplitude to the first interference signal with DC component.
Step 202, carries out just successive step to amplitude and the DC component of described second interference signal, generates the second initial adjustment signal.
The amplitude of the second interference signal can be interfered letter with to described first with the mode that DC component carries out just successive step
Number amplitude carry out the mode of just successive step with DC component consistent.
At this it should be noted that the execution sequence of step 201 with step 202 is not limited by the present embodiment, permissible
First carry out wherein any one step.
Step 203, carries out just successive step, generates institute the phase place between described first initial adjustment signal and described second initial adjustment signal
State the first pending signal and described second pending signal.
Step 204, generates and the first phase anticipating signal that described first pending signal phase difference is 180 °.
Step 205, generates the first DC component according to described first pending signal and described first phase anticipating signal.
Step 206, carries out DC processing according to described first DC component to described first pending signal, generates first and goes
Direct current signal.
Step 207, generates and the second phase anticipating signal that described second pending signal phase difference is 180 °.
Step 208, generates the second DC component according to described second pending signal and described second phase anticipating signal.
Step 209, carries out DC processing according to described second DC component to described second pending signal, generates second and goes
Direct current signal.
At this it should be noted that the present embodiment can first carry out step 204 to step 206, then perform step 207 to
Step 209；Step 207 can also be first carried out to step 209, then perform step 204 to step 206.
Step 210, goes described first direct current signal to carry out amplitude units metaplasia and becomes the first unitization signal.
First method going direct current signal to carry out amplitude units is had multiple, it is, for example possible to use amplitude units circuit,
Direct current signal is gone to carry out amplitude units to described second.
Step 211, goes described second direct current signal to carry out amplitude units metaplasia and becomes the second unitization signal.
Second method going direct current signal to carry out amplitude units is had multiple, it is, for example possible to use amplitude units circuit,
Direct current signal is gone to carry out amplitude units to described first.
At this it should be noted that the execution sequence between step 210 and step 211 is not limited by the present embodiment.
Step 212, generates the first orthogonalized signal, and described first orthogonalized signal is described first to go to direct current signal and institute
State the second plus signal removing direct current signal.
Add circuit can be used to generate described first and to remove direct current signal and the described second plus signal removing direct current signal.Specifically
Process just repeat no more at this.
Step 213, generates the second orthogonalized signal, and described second orthogonalized signal is described first to go to direct current signal and institute
State the second cut signal removing direct current signal.
Subtraction circuit can be used to generate described first and to go direct current signal and the described second cut signal removing direct current signal.Specifically
Process just repeat no more at this.
At this it should be noted that the execution sequence of step 212 with step 213 is not limited by the present embodiment.
Step 214, carries out amplitude units process to described first orthogonalized signal.
The method that described first orthogonalized signal is carried out amplitude units has multiple, it is, for example possible to use amplitude units
Circuit carries out amplitude units to described first orthogonalized signal.Described first orthogonalized signal is being carried out at amplitude units
After reason, the first output signal can be obtained.
Step 215, carries out amplitude units process to described second orthogonalized signal.
The method that described second orthogonalized signal is carried out amplitude units has multiple, it is, for example possible to use amplitude units
Circuit carries out amplitude units to described second orthogonalized signal.
After described second orthogonalized signal is carried out amplitude units process, the second output signal can be obtained.First output letter
Number orthogonal with the second phase of output signal, amplitude is identical and does not the most comprise DC component, thus realizes two-way interference signal
Orthogonal standardization.
At this it should be noted that the execution sequence of step 214 with step 215 is not limited by the present embodiment.
From above-described embodiment it can be seen that use the present embodiment to realize the orthogonal standardization of two-way interference signal, it is not necessary to carry out
Analog digital conversion or digital-to-analogue conversion, all of step just can be realized by simple hardware circuit, the fast frequency of regulation action
Response height, and can effectively prevent signal quality from declining.
The present embodiment is except the interference signal conditioning that can apply to optical interference circuit, it is also possible to be applied to grating measuring displacement and angle
The signal processing occasion of degree.Additionally the present embodiment be implemented without use the components and parts such as inductance, electric capacity, by circuit theory
The frequency response lower frequency limit knowing the present embodiment is 0Hz, upper-bound theory is infinitely great, has preferable frequency response special
Property.Thus may apply to some use occasions higher to signal condition requirement.
Corresponding with the orthogonal standardized method of two-way interference signal of the present invention, present invention also offers two-way interference signal orthogonal
Modular station.
See Fig. 3 A, for the block diagram of two-way interference signal of the present invention one embodiment of orthogonal modular station.
This device includes: input block 301, removes direct current component 302, the first unitization unit 303, orthogonalization unit 304,
Second unitization unit 305.
Wherein, described input block 301, for determining the first pending letter according to the first interference signal and the second interference signal
Number and the second pending signal.
Input block 301 can directly using the first interference signal as the first pending signal, using the second interference signal as
Second pending signal；Or, it is also possible to the first interference signal and the second interference signal are tentatively nursed one's health generation first
Pending signal and the second pending signal.
As shown in Figure 3 B, described input block 301 may include that the first initial adjustment subelement 3011, the second initial adjustment subelement
3012, phase place initial adjustment subelement 3013.
Described first initial adjustment subelement 3011, for the amplitude of described first interference signal and DC component being carried out just successive step,
Generate the first initial adjustment signal；Described second initial adjustment subelement 3012, is used for the amplitude to described second interference signal and DC component
Carry out just successive step, generate the second initial adjustment signal；Described phase place initial adjustment subelement 3013, for described first initial adjustment subelement
Between the described second initial adjustment signal that the 3011 described first initial adjustment signals generated and described second initial adjustment subelement 3012 generate
Phase place carries out just successive step, generates described first pending signal and described second pending signal.
Described remove direct current component 302, for the described first pending signal that described input block 301 is generated and described the
Two pending signals carry out DC processing respectively, generate first and go direct current signal and second to remove direct current signal.
As shown in Figure 3 C, described in go direct current component 302 may include that first phase anticipating signal generate subelement 3021,
First DC component generates subelement 3022, and first removes direct current subelement 3023, and second phase anticipating signal generates subelement 3024,
Second DC component generates subelement 3025, and second removes direct current subelement 3026.
First phase anticipating signal generates subelement 3021, is 180 ° for generating with described first pending signal phase difference
First phase anticipating signal；First DC component generates subelement 3022, for generating son according to described first phase anticipating signal
The described first pending signal that unit 3021 generates and described first phase anticipating signal generate the first DC component；First goes
Direct current subelement 3023, for generating, according to described first DC component, described first DC component pair that subelement 3022 generates
Described first pending signal carries out DC processing, generates first and removes direct current signal；Second phase anticipating signal generates subelement
3024, for the second phase anticipating signal generated with described second pending signal phase difference is 180 °；Second DC component
Generate subelement 3025, described second pending for generate that subelement 3024 generates according to described second phase anticipating signal
Signal and described second phase anticipating signal generate the second DC component；Second removes direct current subelement 3026, for according to described the
Two DC component generate described second DC component of subelement 3025 generation and go described second pending signal at direct current
Reason, generates second and removes direct current signal.
Described first unitization unit 303, for described go direct current component 302 to generate described first go direct current signal and
Described second goes direct current signal to carry out amplitude units respectively, generates the first unitization signal and the second unitization signal.
Described orthogonalization unit 304, for described first unitization unit 303 generate described first unitization signal with
Described second unitization signal is orthogonalized process, obtains the first orthogonalized signal and the second orthogonalized signal.
As shown in Figure 3 D, described orthogonalization unit 304, can include that the first orthogonalized signal generates subelement 3041, the
Two orthogonalized signals generate subelement 3042.
First orthogonalized signal generates subelement 3041, and for generating the first orthogonalized signal, described first orthogonalized signal is
Described first unitization signal and the plus signal of described second unitization signal；Second orthogonalized signal generates subelement 3042, uses
In generating the second orthogonalized signal, described second orthogonalized signal is described first unitization signal and described second unitization signal
Cut signal.
Described second unitization unit 305, for described orthogonalization unit 304 generate described first orthogonalized signal and
Described second orthogonalized signal carries out amplitude units process respectively, it is achieved the orthogonal standardization of two-way interference signal.
From above-described embodiment it can be seen that use the present embodiment to realize the orthogonal standardization of two-way interference signal, it is not necessary to carry out
Analog digital conversion or digital-to-analogue conversion, all of step just can be realized by simple hardware circuit, the fast frequency of regulation action
Response height, and can effectively prevent signal quality from declining.
Those skilled in the art it can be understood that can add by software to the technology in the embodiment of the present invention required
The mode of general hardware platform realizes.Based on such understanding, the technical scheme in the embodiment of the present invention substantially or
Saying that the part contributing prior art can embody with the form of software product, this computer software product is permissible
It is stored in storage medium, such as ROM/RAM, magnetic disc, CD etc., instructs with so that a computer sets including some
Standby (can be personal computer, server, or the network equipment etc.) performs each embodiment of the present invention or embodiment
The method described in some part.
Each embodiment in this specification all uses the mode gone forward one by one to describe, identical similar part between each embodiment
Seeing mutually, what each embodiment stressed is the difference with other embodiments.Especially for system
For embodiment, owing to it is substantially similar to embodiment of the method, so describe is fairly simple, relevant part sees method
The part of embodiment illustrates.
Invention described above embodiment, is not intended that limiting the scope of the present invention.Any the present invention's
Amendment, equivalent and the improvement etc. made within spirit and principle, should be included within the scope of the present invention.
Claims (9)
1. the orthogonal standardized method of two-way interference signal, it is characterised in that described method includes:
The first pending signal and the second pending signal is determined according to the first interference signal and the second interference signal；
Described first pending signal and described second pending signal are carried out respectively DC processing, generates first and go direct current to believe
Number and second remove direct current signal；
Go described first direct current signal and described second to go direct current signal to carry out amplitude units respectively, generate the first unitization letter
Number and the second unitization signal；
Described first unitization signal and described second unitization signal are orthogonalized process, obtain the first orthogonalized signal with
Second orthogonalized signal；
Described first orthogonalized signal and described second orthogonalized signal are carried out amplitude units process respectively, it is achieved two-way is interfered
Signal in orthogonal standardization.
2. the method for claim 1, it is characterised in that described determine according to the first interference signal and the second interference signal
First pending signal and the second pending signal include:
Described first interference signal is tentatively nursed one's health with described second interference signal, generates described first pending signal and institute
State the second pending signal.
3. method as claimed in claim 2, it is characterised in that the described interference described first interference signal with described second believes
Number tentatively nurse one's health, generate described first pending signal and described second pending signal includes:
The amplitude of described first interference signal is carried out just successive step with DC component, generates the first initial adjustment signal；
The amplitude of described second interference signal is carried out just successive step with DC component, generates the second initial adjustment signal；
Phase place between described first initial adjustment signal and described second initial adjustment signal is carried out just successive step, generates described first and wait to locate
Reason signal and described second pending signal.
4. the method as described in claims 1 to 3 any one claim, it is characterised in that described wait to locate to described first
Reason signal and described second pending signal carry out DC processing respectively, generate first and go direct current signal and second to remove direct current signal
Including:
Generate and the first phase anticipating signal that described first pending signal phase difference is 180 °；
The first DC component is generated according to described first pending signal and described first phase anticipating signal；
According to described first DC component, described first pending signal is carried out DC processing, generate first and remove direct current signal；
Generate and the second phase anticipating signal that described second pending signal phase difference is 180 °；
The second DC component is generated according to described second pending signal and described second phase anticipating signal；
According to described second DC component, described second pending signal is carried out DC processing, generate second and remove direct current signal.
5. the method as described in claims 1 to 3 any one claim, it is characterised in that described to described first unit
Change signal and be orthogonalized process with described second unitization signal, obtain the first orthogonalized signal and the second orthogonalized signal bag
Include:
Generating the first orthogonalized signal, described first orthogonalized signal is described first unitization signal and described second unitization letter
Number plus signal；
Generating the second orthogonalized signal, described second orthogonalized signal is described first unitization signal and described second unitization letter
Number cut signal.
6. the orthogonal modular station of two-way interference signal, it is characterised in that described device includes:
Input block, for the first interference signal and the second interference signal are tentatively nursed one's health, generation the first pending signal and
Second pending signal；
Remove direct current component, divide for described first pending signal and the described second pending signal that described input block is generated
Do not carry out DC processing, generate first and go direct current signal and second to remove direct current signal；
First unitization unit, for described go direct current component to generate described first go direct current signal and described second to remove direct current
Signal carries out amplitude units respectively, generates the first unitization signal and the second unitization signal；
Orthogonalization unit, second unitization with described for the described first unitization signal that described first unitization unit is generated
Signal is orthogonalized process, obtains the first orthogonalized signal and the second orthogonalized signal；
Second unitization unit, for described first orthogonalized signal generating described orthogonalization unit and described second orthogonalization
Signal carries out amplitude units process respectively, it is achieved the orthogonal standardization of two-way interference signal.
7. device as claimed in claim 6, it is characterised in that described input block includes:
First initial adjustment subelement, for the amplitude of described first interference signal and DC component carry out just successive step, generates first
Initial adjustment signal；
Second initial adjustment subelement, for the amplitude of described second interference signal and DC component carry out just successive step, generates second
Initial adjustment signal；
Phase place initial adjustment subelement, for the described first initial adjustment signal generating described first initial adjustment subelement and described second initial adjustment
Phase place between the described second initial adjustment signal that subelement generates carries out just successive step, generates described first pending signal and described
Second pending signal.
Device the most as claimed in claims 6 or 7, it is characterised in that described in go direct current component to include:
First phase anticipating signal generates subelement, for generating and first that described first pending signal phase difference is 180 °
Phase lead signal；
First DC component generates subelement, for generating described the first of subelement generation according to described first phase anticipating signal
Pending signal and described first phase anticipating signal generate the first DC component；
First removes direct current subelement, for generating, according to described first DC component, described first DC component pair that subelement generates
Described first pending signal carries out DC processing, generates first and removes direct current signal；
Second phase anticipating signal generates subelement, for generating and second that described second pending signal phase difference is 180 °
Phase lead signal；
Second DC component generates subelement, for generating described the second of subelement generation according to described second phase anticipating signal
Pending signal and described second phase anticipating signal generate the second DC component；
Second removes direct current subelement, for generating, according to described second DC component, described second DC component pair that subelement generates
Described second pending signal carries out DC processing, generates second and removes direct current signal.
Device the most as claimed in claims 6 or 7, it is characterised in that described orthogonalization unit includes:
First orthogonalized signal generates subelement, and for generating the first orthogonalized signal, described first orthogonalized signal is described the
One unitization signal and the plus signal of described second unitization signal；
Second orthogonalized signal generates subelement, and for generating the second orthogonalized signal, described second orthogonalized signal is described the
One unitization signal and the cut signal of described second unitization signal.
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| CN201499170U (en) * | 2009-09-01 | 2010-06-02 | 武汉光迅科技股份有限公司 | Standard-base structure differential quadrature phase shifting leying type decomodulator |
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