CN103617963A - Groove prior copper interconnection manufacturing method - Google Patents
Groove prior copper interconnection manufacturing method Download PDFInfo
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- CN103617963A CN103617963A CN201310565715.7A CN201310565715A CN103617963A CN 103617963 A CN103617963 A CN 103617963A CN 201310565715 A CN201310565715 A CN 201310565715A CN 103617963 A CN103617963 A CN 103617963A
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- photoresist
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- hard mask
- groove
- film
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 35
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title abstract description 8
- 229910052802 copper Inorganic materials 0.000 title abstract description 8
- 239000010949 copper Substances 0.000 title abstract description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 53
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 53
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 52
- 238000000034 method Methods 0.000 claims abstract description 50
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 18
- 239000010703 silicon Substances 0.000 claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims description 20
- 210000001951 dura mater Anatomy 0.000 claims description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 238000001465 metallisation Methods 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 4
- 238000003701 mechanical milling Methods 0.000 claims description 4
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- -1 siloxanes Chemical class 0.000 claims description 4
- 125000004469 siloxy group Chemical group [SiH3]O* 0.000 claims description 4
- 125000003808 silyl group Chemical group [H][Si]([H])([H])[*] 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 4
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 4
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 4
- 239000000463 material Substances 0.000 abstract description 10
- 239000010409 thin film Substances 0.000 abstract 8
- 239000010408 film Substances 0.000 abstract 1
- 238000000206 photolithography Methods 0.000 abstract 1
- 238000001259 photo etching Methods 0.000 description 7
- 238000002310 reflectometry Methods 0.000 description 6
- 239000004020 conductor Substances 0.000 description 5
- 230000009977 dual effect Effects 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/7688—Filling of holes, grooves or trenches, e.g. vias, with conductive material by deposition over sacrificial masking layer, e.g. lift-off
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention provides a groove prior copper interconnection manufacturing method which comprises the steps that a silicon substrate is offered, a low-k-value dielectric layer and a hard mask thin film are sequentially deposited, and the hard mask thin film is sequentially coated with a first spin-coated carbon thin film and first photoresist; exposure and development are conducted in the first photoresist and a first metal groove is formed; a second metal groove is formed in the hard mask thin film; the hard mask thin film is sequentially coated with a second spin-coated carbon thin film and second photoresist; exposure and development are conducted in the second photoresist and a first through hole is formed; a through hole and a metal groove are formed in the low-k-value dielectric layer; wire metal filling and through hole metal filling are achieved. According to the groove prior copper interconnection manufacturing method, the first spin-coated carbon thin film and the second spin-coated carbon thin film are used and combined with the first photoresist and the second photoresist which are capable of forming a hard film, process materials and processing steps are reduced, the photolithography technique capacity is improved, the requirement for structural evenness of an etched pattern is satisfied, the productivity is effectively improved, and the manufacturing cost is effectively reduced.
Description
Technical field
The present invention relates to technical field of semiconductor device, relate in particular to the preferential copper-connection manufacture method of a kind of groove.
Background technology
After entering into 130nm technology node, be subject to the restriction of the high-ohmic of aluminium, copper-connection gradually substitution of Al interconnection becomes metal interconnected main flow.Due to difficult realization of dry etch process of copper, the manufacture method of copper conductor can not obtain by etching sheet metal as aluminum conductor.The manufacture method of the copper conductor extensively adopting is now the embedding technique that is called Damascus technics.Damascene inlayed fabric copper-connection can be realized by kinds of processes method.Wherein, the preferential dual damascene process of groove is one of method realizing plain conductor and through hole copper filling once-forming.
Refer to Fig. 9 (a)～Fig. 9 (e), Fig. 9 (a)～Fig. 9 (e) is depicted as the preferential dual damascene process schematic flow sheet of existing groove.The preferential dual damascene process of described existing groove, comprising:
On silicon substrate 20, deposit low dielectric coefficient medium layer 21, and on described low dielectric coefficient medium layer 21, be coated with described the first photoresist layer 22;
By the first photoetching and etching, in described low dielectric coefficient medium layer 21, form described metallic channel structure 23;
On described low dielectric coefficient medium layer 21, be coated with described the second photoresist layer 24;
By the second photoetching and etching, in described metallic channel structure 23, form described through-hole structure 25;
Continue subsequent metal deposition and metallochemistry mechanical lapping, complete described plain conductor 231 and 251 fillings of described metal throuth hole.
Meanwhile, along with the integrated level of semiconductor chip improves constantly, transistorized characteristic size is constantly dwindled, also increasing to the challenge of photoetching process.Traditional photoetching process adopts conventionally take organic antireflection film (Bottom Anti-reflective Coating, BARC) that macromolecular material is main body and improves the ability of photoetching process.
Refer to Figure 10, Figure 11, Figure 10 shows that the structural diagrams of silicon substrate, organic antireflection film and photoresist layer.Figure 11 shows that the relation curve of organic antireflection film and reflectivity.Apparently, described organic antireflection film 26 can reduce the reflectivity of substrate to described photoresist layer 27 effectively, and then has improved photolithographic process capability.By adjusting the thickness of organic antireflection film 26, can also expand the scope adjusted of etching technics, the uniformity of graphic structure after raising etching.
But after entering 45nm technology node, the organic antireflection film 26 that traditional macromolecular material of take is main body is more and more difficult to meet the requirement of the graphic structure uniformity after photoetching process and etching.On the one hand, high-end photoresist needs the more substrate of antiradar reflectivity, when substrate surface is uneven, needs thicker anti-reflection film 26 to come smooth substrate surface on the other hand.Yet thicker traditional organic antireflecting thin 26 is difficult to the reflectivity that provides lower.
In addition, the amorphous c film that new substitution material comprises Spun-on carbon and utilizes plasma reinforced chemical vapour deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) method to make is the new material that substitutes traditional organic antireflection film.More described amorphous c film, described spun-on carbon film does not need extra board, has the advantages such as cost is low, film forming speed is fast, level and smooth concavo-convex substrate ability is strong, and lower reflectivity can be provided, especially under the thicker condition of film thickness.
Refer to Figure 12, Figure 12 shows that the structural representation of silicon substrate, spun-on carbon film, siliceous hard mask film and photoresistance.In PECVD, conventionally adopt siliceous hard mask film 29 collocation of spun-on carbon film 28 and spin coating to substitute traditional organic antireflection film 26.Utilize anti-etching ability poor of the siliceous hard mask film 29 of spun-on carbon film 28 and spin coating, can use thicker spun-on carbon film 28.Thicker spun-on carbon film 28 is level and smooth rough substrate surface effectively, meets well the requirement of the graphic structure uniformity after photoetching process and etching.
As those skilled in the art, hold intelligibly, although siliceous hard mask film 29 collocation of existing process using spun-on carbon film 28 and spin coating have solved the thick film high reflectance problem of traditional organic antireflection film 26.But, brought material cost to increase and the problem of etching technics complexity.How reducing material and simplify technique, being beneficial to scale of mass production becomes one of this area technical problem urgently to be resolved hurrily.
Therefore the problem existing for prior art, this case designer relies on the industry experience for many years of being engaged in, and active research improvement, so there has been the preferential copper-connection manufacture method of a kind of groove of the present invention.
Summary of the invention
The present invention be directed in prior art, the defects such as the material cost increase of the preferential dual damascene process of described traditional groove and etching technics complexity provide a kind of groove preferential copper-connection manufacture method.
For realizing the present invention's object, the invention provides the preferential copper-connection manufacture method of a kind of groove, the preferential copper-connection manufacture method of described groove comprises:
Execution step S1: silicon-based substrate is provided, and deposits successively described low k value dielectric layer, hard mask film in described silicon-based substrate, and be coated with successively the first spun-on carbon film and first photoresist that can form dura mater on described hard mask film;
Execution step S2: expose and be developed in described the first photoresist, and forming described the first metallic channel;
Execution step S3: take successively described the first photoresist and described the first spun-on carbon film is etching mask, forms described the second metallic channel, and remove unnecessary described the first spun-on carbon film in described hard mask film;
Execution step S4: be coated with successively the second spun-on carbon film and second photoresist that can form dura mater on described hard mask film;
Execution step S5: expose and be developed in described the second photoresist, and forming described the first through hole;
Execution step S6: take successively described the second photoresist, the second spun-on carbon film and described hard mask film is etching mask, and forms described through hole and described metallic channel in described low k value dielectric layer;
Execution step S7: carry out described metal deposition and described chemical mechanical milling tech, realize described wire metal and described via metal and fill.
Alternatively, the dielectric constant k < 3 of described low k value dielectric layer.
Alternatively, described the first photoresist and described the second photoresist that forms dura mater that forms dura mater is the photoresist of silane-group containing (Silyl), silicon alkoxyl (Siloxyl) and cage type siloxanes (Silsesquioxane).
Alternatively, described hard mask film is one of them of silica, silicon nitride, carborundum, titanium, titanium oxide, titanium nitride, tantalum, tantalum oxide, tantalum nitride, or its combination rete.
Alternatively, the thicknesses of layers scope of described hard mask film is 0～50nm.
Alternatively, the thicknesses of layers scope of described hard mask film is 5～35nm.
Alternatively, the thickness range of described the first spun-on carbon film and described the second spun-on carbon film is 10～500nm.
Alternatively, the thickness range of described the first spun-on carbon film and described the second spun-on carbon film is 80～350nm.
In sum, the present invention is by using described the first spun-on carbon film and described the second spun-on carbon film, and realize the preferential copper-connection manufacture craft of groove in conjunction with the first photoresist and second photoresist that can form dura mater, process materials and processing step have not only been reduced, improved photolithographic process capability, and can meet the requirement of the graphic structure uniformity after etching, and effectively improve production capacity and reduce cost of manufacture.
Accompanying drawing explanation
Figure 1 shows that the flow chart of the preferential copper-connection manufacture method of groove of the present invention;
Fig. 2～Figure 8 shows that interim structural representation of the preferential copper-connection manufacture method of groove of the present invention;
Fig. 9 (a)～Fig. 9 (e) is depicted as the preferential dual damascene process schematic flow sheet of existing groove;
Figure 10 shows that the structural diagrams of silicon substrate, organic antireflection film and photoresist layer;
Figure 11 shows that the relation curve of organic antireflection film and reflectivity;
Figure 12 shows that the structural representation of silicon substrate, spun-on carbon film, siliceous hard mask film and photoresistance.
Embodiment
By describe in detail the invention technology contents, structural feature, reached object and effect, below in conjunction with embodiment and coordinate accompanying drawing to be described in detail.
Refer to Fig. 1, Figure 1 shows that the flow chart of the preferential copper-connection manufacture method of groove of the present invention.The preferential copper-connection manufacture method of described groove, comprising:
Execution step S1: silicon-based substrate is provided, and deposits successively described low k value dielectric layer, hard mask film in described silicon-based substrate, and be coated with successively the first spun-on carbon film and first photoresist that can form dura mater on described hard mask film;
Execution step S2: expose and be developed in described the first photoresist, and forming described the first metallic channel;
Execution step S3: take successively described the first photoresist and described the first spun-on carbon film is etching mask, forms described the second metallic channel, and remove unnecessary described the first spun-on carbon film in described hard mask film;
Execution step S4: be coated with successively the second spun-on carbon film and second photoresist that can form dura mater on described hard mask film;
Execution step S5: expose and be developed in described the second photoresist, and forming described the first through hole;
Execution step S6: take successively described the second photoresist, the second spun-on carbon film and described hard mask film is etching mask, and forms described through hole and described metallic channel in described low k value dielectric layer;
Execution step S7: carry out described metal deposition and described chemical mechanical milling tech, realize described wire metal and described via metal and fill.
As the specific embodiment of the present invention, preferably, the dielectric constant k < 3 of described low k value dielectric layer.Described the first photoresist of dura mater and the photoresist that described the second photoresist that forms dura mater includes but not limited to silane-group containing (Silyl), silicon alkoxyl (Siloxyl) and cage type siloxanes (Silsesquioxane) of forming.Described hard mask film includes but not limited to one of them of silica, silicon nitride, carborundum, titanium, titanium oxide, titanium nitride, tantalum, tantalum oxide, tantalum nitride, or its combination rete.The thicknesses of layers scope of described hard mask film is 0～50nm.More preferably, the thicknesses of layers scope of described hard mask film is 5～35nm.The thickness range of described the first spun-on carbon film and described the second spun-on carbon film is 10～500nm.More preferably, the thickness range of described the first spun-on carbon film and described the second spun-on carbon film is 80～350nm.
For disclosing more intuitively the present invention's technical scheme, and highlight the present invention's beneficial effect, now take the preferential copper wiring technique of groove and set forth as example.
Refer to Fig. 2～Fig. 9, and in conjunction with consulting Fig. 1, Fig. 2～Figure 9 shows that production phase property structural representation of the preferential copper-connection manufacture method of groove of the present invention.The preferential copper-connection manufacture method of described groove, comprising:
Execution step S1: silicon-based substrate 10 is provided, and in described silicon-based substrate 10, deposit successively described low k value dielectric layer 11, hard mask film 12, and on described hard mask film 12, be coated with successively the first spun-on carbon film 13 and first photoresist 14 that can form dura mater;
Execution step S2: expose and be developed in described the first photoresist 14, and forming described the first metallic channel 141;
Execution step S3: take successively described the first photoresist 14 and described the first spun-on carbon film 13 is etching mask, forms described the second metallic channel 121, and remove unnecessary described the first spun-on carbon film 13 in described hard mask film 12;
Execution step S4: be coated with successively the second spun-on carbon film 15 and second photoresist 16 that can form dura mater on described hard mask film 12;
Execution step S5: expose and be developed in described the second photoresist 16, and forming described the first through hole 161;
Execution step S6: take successively described the second photoresist 16, the second spun-on carbon film 15 and described hard mask film 12 is etching mask, and forms described through hole 17 and described metallic channel 18 in described low k value dielectric layer 11;
Execution step S7: carry out described metal deposition process and described chemical mechanical milling tech, fill at described through hole 17 and interior described wire metal 181 and the described via metal 171 that realize of described metallic channel 18.
As the specific embodiment of the present invention, preferably, the dielectric constant k < 3 of described low k value dielectric layer 11.Described the first photoresist 14 of dura mater and the photoresist that described the second photoresist 16 that forms dura mater includes but not limited to silane-group containing (Silyl), silicon alkoxyl (Siloxyl) and cage type siloxanes (Silsesquioxane) of forming.Described hard mask film 12 includes but not limited to one of them of silica, silicon nitride, carborundum, titanium, titanium oxide, titanium nitride, tantalum, tantalum oxide, tantalum nitride, or its combination rete.The thicknesses of layers scope of described hard mask film 12 is 0～50nm.More preferably, the thicknesses of layers scope of described hard mask film 12 is 5～35nm.The thickness range of described the first spun-on carbon film 13 and described the second spun-on carbon film 15 is 10～500nm.More preferably, the thickness range of described the first spun-on carbon film 13 and described the second spun-on carbon film 15 is 80～350nm.
In sum, the present invention is by using described the first spun-on carbon film and described the second spun-on carbon film, and realize the preferential copper-connection manufacture craft of groove in conjunction with the first photoresist and second photoresist that can form dura mater, process materials and processing step have not only been reduced, improved photolithographic process capability, and can meet the requirement of the graphic structure uniformity after etching, and effectively improve production capacity and reduce cost of manufacture.
Those skilled in the art all should be appreciated that, in the situation that not departing from the spirit or scope of the present invention, can carry out various modifications and variations to the present invention.Thereby, if when any modification or modification fall in the protection range of appended claims and equivalent, think that the present invention contains these modifications and modification.
Claims (8)
1. the preferential copper-connection manufacture method of groove, is characterized in that, the preferential copper-connection manufacture method of described groove comprises:
Execution step S1: silicon-based substrate is provided, and deposits successively described low k value dielectric layer, hard mask film in described silicon-based substrate, and be coated with successively the first spun-on carbon film and first photoresist that can form dura mater on described hard mask film;
Execution step S2: expose and be developed in described the first photoresist, and forming described the first metallic channel;
Execution step S3: take successively described the first photoresist and described the first spun-on carbon film is etching mask, forms described the second metallic channel, and remove unnecessary described the first spun-on carbon film in described hard mask film;
Execution step S4: be coated with successively the second spun-on carbon film and second photoresist that can form dura mater on described hard mask film;
Execution step S5: expose and be developed in described the second photoresist, and forming described the first through hole;
Execution step S6: take successively described the second photoresist, the second spun-on carbon film and described hard mask film is etching mask, and forms described through hole and described metallic channel in described low k value dielectric layer;
Execution step S7: carry out described metal deposition and described chemical mechanical milling tech, realize described wire metal and described via metal and fill.
2. the preferential copper-connection manufacture method of groove as claimed in claim 1, is characterized in that, the dielectric constant k < 3 of described low k value dielectric layer.
3. the preferential copper-connection manufacture method of groove as claimed in claim 1, it is characterized in that, described the first photoresist and described the second photoresist that forms dura mater that forms dura mater is the photoresist of silane-group containing (Silyl), silicon alkoxyl (Siloxyl) and cage type siloxanes (Silsesquioxane).
4. the preferential copper-connection manufacture method of groove as claimed in claim 1, is characterized in that, described hard mask film is one of them of silica, silicon nitride, carborundum, titanium, titanium oxide, titanium nitride, tantalum, tantalum oxide, tantalum nitride, or its combination rete.
5. the preferential copper-connection manufacture method of groove as claimed in claim 4, is characterized in that, the thicknesses of layers scope of described hard mask film is 0～50nm.
6. the preferential copper-connection manufacture method of groove as claimed in claim 4, is characterized in that, the thicknesses of layers scope of described hard mask film is 5～35nm.
7. the preferential copper-connection manufacture method of groove as claimed in claim 1, is characterized in that, the thickness range of described the first spun-on carbon film and described the second spun-on carbon film is 10～500nm.
8. the preferential copper-connection manufacture method of groove as claimed in claim 7, is characterized in that, the thickness range of described the first spun-on carbon film and described the second spun-on carbon film is 80～350nm.
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| CN201310565715.7A CN103617963A (en) | 2013-11-13 | 2013-11-13 | Groove prior copper interconnection manufacturing method |
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| CN201310565715.7A CN103617963A (en) | 2013-11-13 | 2013-11-13 | Groove prior copper interconnection manufacturing method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111613539A (en) * | 2020-05-22 | 2020-09-01 | 上海交通大学 | Method and system for multi-layer fabrication of wafer-level three-dimensional heterogeneous integrated devices |
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|---|---|---|---|---|
| US6197681B1 (en) * | 1999-12-31 | 2001-03-06 | United Microelectronics Corp. | Forming copper interconnects in dielectric materials with low constant dielectrics |
| CN1971424A (en) * | 2005-07-30 | 2007-05-30 | 三星电子株式会社 | Semiconductor structure and method of forming photoresist pattern and pattern of semiconductor device using the same structure |
| CN101447398A (en) * | 2007-11-29 | 2009-06-03 | 海力士半导体有限公司 | Method for forming a hard mask pattern in a semiconductor device |
| CN102315163A (en) * | 2011-09-28 | 2012-01-11 | 上海华力微电子有限公司 | Manufacturing method of ultralow-dielectric-constant film copper-interconnecting layer |
| CN102738076A (en) * | 2012-07-27 | 2012-10-17 | 上海华力微电子有限公司 | Through hole propriety copper interconnection manufacturing method |
-
2013
- 2013-11-13 CN CN201310565715.7A patent/CN103617963A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6197681B1 (en) * | 1999-12-31 | 2001-03-06 | United Microelectronics Corp. | Forming copper interconnects in dielectric materials with low constant dielectrics |
| CN1971424A (en) * | 2005-07-30 | 2007-05-30 | 三星电子株式会社 | Semiconductor structure and method of forming photoresist pattern and pattern of semiconductor device using the same structure |
| CN101447398A (en) * | 2007-11-29 | 2009-06-03 | 海力士半导体有限公司 | Method for forming a hard mask pattern in a semiconductor device |
| CN102315163A (en) * | 2011-09-28 | 2012-01-11 | 上海华力微电子有限公司 | Manufacturing method of ultralow-dielectric-constant film copper-interconnecting layer |
| CN102738076A (en) * | 2012-07-27 | 2012-10-17 | 上海华力微电子有限公司 | Through hole propriety copper interconnection manufacturing method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111613539A (en) * | 2020-05-22 | 2020-09-01 | 上海交通大学 | Method and system for multi-layer fabrication of wafer-level three-dimensional heterogeneous integrated devices |
| CN111613539B (en) * | 2020-05-22 | 2024-02-06 | 上海交通大学 | Multilayer preparation method and system for wafer-level three-dimensional heterogeneous integrated devices |
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