Content of the invention
For problems of the prior art, according to an aspect of the present invention, a kind of imaging device is proposed, including:
First group of pixel, wherein said first group of pixel shares the first floating diffusion region;And second group of pixel, wherein said second
Group pixel shares the second floating diffusion region;Wherein, in the first pixel and described second group of pixel in described first group of pixel
The second pixel through control respectively to described first floating diffusion region and the second floating diffusion region transfer charge.
Imaging device as above, wherein said first group of pixel shares the first reset transistor and the first output crystal
Pipe;Described second group of pixel shares the second reset transistor and the second output transistor.
Imaging device as above, wherein said first floating diffusion region is connected to the through the first output transistor
One column output line;Described second floating diffusion region is connected to the second column output line through the second output transistor.
Imaging device as above, wherein said first pixel and described second pixel are through controlling simultaneously to described first
Floating diffusion region and the second floating diffusion region transfer charge.
Imaging device as above, the in the 3rd pixel in wherein said first group of pixel and described second group of pixel
Four pixels are through controlling simultaneously to described first floating diffusion region and the second floating diffusion region transfer charge.
Imaging device as above, wherein said first pixel, described second pixel, described 3rd pixel and described the
The color of four pixels is respectively R, Gr, Gb and B.
Imaging device as above, the output valve of wherein same color pixel exports same row reading circuit.
Imaging device as above, further includes the first multiselect switch, and it is defeated that it is connected to described first and second row
Outlet is so that the output valve of same color pixel exports same row reading circuit.
Imaging device as above, wherein said first floating diffusion region and the second floating diffusion region are same through controlling
When to described first and second column output lines output.
Imaging device as above, wherein said first multiselect switch divided to the first and second column output line times of carrying out
Every to share same row reading circuit.
Imaging device as above, further includes the second multiselect switch, and described second multiselect switch is connected to described
First and second column output lines, described first and second multiselect switches make the output valve of same color pixel export through controlling
Same row reading circuit.
Imaging device as above, each of wherein said first group of pixel pixel all has respective photosensitive area
Domain and transfering transistor;Described first floating diffusion region be located at described first group of pixel in each pixel respective photosensitive
Between region, and it is connected with the transfering transistor of each pixel in described first group of pixel.
Imaging device as above, is wherein used for forming grid and the active area of described first and second reset transistors
Domain is located in described first and second groups of pixels and laterally or longitudinally arranges between the photosensitive region of each pixel.
Imaging device as above, is wherein used for forming grid and the active area of described first and second output transistors
Domain is located in described first and second groups of pixels and laterally or longitudinally arranges between the photosensitive region of each pixel.
According to another aspect of the present invention, a kind of imaging method is proposed, including:Reset the first floating diffusion region and
Two floating diffusion regions, wherein first group pixel shares described first floating diffusion region, and second group of pixel shares described second
Floating diffusion region;By the electric charge transfer of the first pixel in described first group of pixel to the first floating diffusion region, and will
The electric charge transfer of the second pixel in second group of pixel is to the second floating diffusion region;First floating diffusion region is sampled, and
By the voltage output after sampling to the first output lead;And the second floating diffusion region is sampled, and will be defeated for the voltage after sampling
Go out to the second output lead.
Imaging method as above, further includes:Reset the first floating diffusion region and the second floating diffusion region;
By the electric charge transfer of the 3rd pixel in first group of pixel to the first floating diffusion region, and by the 4th in second group of pixel
The electric charge transfer of pixel is to the second floating diffusion region;To first floating diffusion region sample, and by sampling after voltage output
To the first output lead;And the second floating diffusion region is sampled, and by the voltage output after sampling to the second output lead.
Imaging method as above, wherein after sampling the first floating diffusion region and the second floating diffusion region, point
Do not include resetting the first floating diffusion region and the second floating diffusion region.
Imaging method as above, wherein said first pixel, described second pixel, described 3rd pixel and described the
The color of four pixels is respectively R, Gr, Gb and B.
Imaging method as above, the sampled signal of the same color on the first output lead and the second output lead is chosen
And it is admitted to same row reading circuit.
Imaging method as above, wherein said first floating diffusion region and the second floating diffusion region are same through controlling
When to described first and second column output lines output.
Imaging device as above, further includes using the first multiselect switch, the first and second column output lines to be carried out
Time-division, to share same row reading circuit.
Imaging device as above, makes same color pixel further with the first and second multiselect switches through controlling
Output valve export same row reading circuit.
Specific embodiment
Purpose, technical scheme and advantage for making the embodiment of the present invention are clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described it is clear that described embodiment is
The a part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment being obtained under the premise of not making creative work, broadly falls into the scope of protection of the invention.
In the following detailed description, may refer to as the application part for the specific embodiment of the application is described
Each Figure of description.In the accompanying drawings, similar reference describes substantially similar assembly in different drawings.This Shen
Each specific embodiment please has carried out detailed enough description so that possessing the general of ability domain-dependent knowledge and technology following
Logical technical staff can implement the technical scheme of the application.It should be appreciated that can also be using other embodiments or to the application
Embodiment carry out structure, logic or electrical change.
Term " pixel " one word refers to containing sensor devices or is used for converting electromagnetic signal into other devices of the signal of telecommunication
Electronic component.For illustrative purposes, Fig. 1 describes a kind of representativeness imaging device, and it comprises a pel array.In Fig. 2
Describe a kind of representational pixel, and all pixels in pel array generally all will manufacture in a similar manner.
Fig. 1 illustrates the schematic diagram of the structure of a kind of imaging device.Imaging device 100 shown in Fig. 1, such as cmos imaging
Device, including pel array 110.Pel array 110 comprises the multiple pixels being arranged in rows and columns.Each in pel array 110
Row pixel is all also turned on by column selection line, and every one-row pixels are optionally exported by row select line respectively.Each pixel
There is row address and column address.The column address of pixel corresponds to the row select line being driven by row decoding and drive circuit 120, and picture
The row address of element corresponds to the row select line being driven by row decoding and drive circuit 130.Control circuit 140 controls row decoding and drives
Galvanic electricity road 120 and row decoding are defeated selectively to read the corresponding pixel of suitable row and column in pel array with drive circuit 130
Go out signal.
Pixel output signal includes pixel reset signal VrstWith pixel image signal Vsig.Pixel reset signal VrstRepresent
The signal obtaining from floating diffusion region during the floating diffusion region resetting sensor devices (as photodiode).Pixel image is believed
Number VsigRepresent the signal that the electric charge transfer of the representative image acquired in sensor devices is obtained to after floating diffusion region.Picture
Plain reset signal VrstWith pixel image signal VsigRead by row sampling and holding circuit 150, and through differential amplifier 160
Subtract each other.The V that differential amplifier 160 is exportedrst-VsigSignal represents the picture signal acquired in sensor devices.This image is believed
Number be converted to digital signal after analog-digital converter ADC170, be then further processed by image processor 180, with defeated
Go out digitized image.
Fig. 2 is to illustrate a kind of schematic diagram of representative pixels structure.The pixel 200 of Fig. 2 includes photodiode 202,
Transfering transistor 204, reset transistor 206 and source following transistor 208.Photodiode 202 is connected to transfering transistor
204 source electrode.Transfering transistor 204 is controlled by signal TX.When TX controls transfering transistor to " on " state, photodiode
The electric charge of middle accumulation is transferred in memory area 21.Meanwhile, photodiode 202 is reset.Source following transistor 208
Grid is connected to memory area 21.Source following transistor 208 amplifies the signal receiving from memory area 21;Source electrode follows crystal
Pipe 208 is by the signal output amplified to output lead Vout.Reset transistor 206 source electrode is also connected to memory area 21.Reset brilliant
Body pipe 206 is controlled by signal RST, for resetting memory area 21.
Fig. 3 is also to illustrate a kind of schematic diagram of representative pixels structure.The circuit logic relation that Fig. 3 is not abstract is shown
It is intended to, but specific semiconductor structure schematic diagram.Pixel 300 described in Fig. 3 includes photodiode 302 as photoreceptorss
Part.Pixel 300 includes transfer gate 303, its with photodiode 302 and memory area, i.e. floating diffusion region 304 shape together
Become transfering transistor.Pixel 300 also includes resetting grid 305, its be connected to floating diffusion region 304 and active region 306 it
Between, to reset floating diffusion region 304.Active region 306 is connected to electrode source Vaa.Pixel 300 also includes source follower gate
307, it is connected between active region 306 and 308, forms source following transistor, and source follower gate 307 passes through electricity
Connect 347 and be electrically coupled to floating diffusion region 304.
The source/drain region of above-mentioned transistor, floating diffusion region, under the gate one-level between source/drain regions
Channel region and photodiode are defined as active region because of its doping property, and it is combined with grid structure and defines active electrical
Sub-device.
As shown in figure 3, photosensitive PD (Photon Detection) region area of photodiode 302 is relatively large.When
After strong illumination, photosensitive region can induce the more photoelectron of number.After transfering transistor is connected, floating diffusion FD
(Floating Diffusion) region cannot receive all of photoelectron within a very short time, so that floating diffusion region
The electric charge obtaining cannot reflect the intensity that ambient light is shone, and makes final image distortion.Floating diffusion region can receive
Maximum amount of charge is referred to as the full-well capacity of imageing sensor, and it directly determines the optical dynamic range of imageing sensor.
Fig. 4 a is the dot structure schematic diagram comprising mirror image pixel according to an embodiment of the invention.As Fig. 4 a institute
Show, imageing sensor 400 includes 8 photosensitive region 401-408 of example;Wherein photosensitive region 401 and 403 is red sensitive area
Domain, is represented with R;Photosensitive region 402 and 404 is one group of green light sensitive region, is represented with Gb;Photosensitive region 405 and 407 is blue
Photosensitive region, is represented with B;And photosensitive region 406 and 408 is another group of green light sensitive region, represented with Gr.Referring to Fig. 4 a,
Photosensitive region 401-408 has respective transfer gate 411-418.Further, transfer gate 411,412,415 and 416
It is connected to shared floating diffusion region 410, thus together with the respective photosensitive region being connected, forming multiple transfering transistors.
And transfer gate 413,414,417 and 418 is connected to shared floating diffusion region 420, thus also photosensitive be each connected
Region together, forms multiple transfering transistors.
Imageing sensor 400 also includes resetting grid 421 and 422.As shown in fig. 4 a, the source being connected with replacement grid 421
Polar region 423 is connected with floating diffusion region 410, and the reset transistor thus resetting grid 421 formation can be used to reset floating
Diffusion zone 410.Similarly, the source area 424 resetting the reset transistor that grid 422 is formed is also connected to floating diffusion region
420, can be used to reset this floating diffusion region.
Imageing sensor 400 also includes source follower gate 431 and 432.As shown in fig. 4 a, follow grid 431 and float
Diffusion zone 410 is connected;Meanwhile, follow grid 431 to be also connected with active region 441;It is consequently formed source following transistor, use
To shift and to amplify the electric charge in floating diffusion region 410, to form output signal.Similarly, grid 432 and floating diffusion are followed
Region 420 is connected;Meanwhile, follow grid 432 to be also connected with active region 442;It is consequently formed source following transistor, for turning
Move and amplify the electric charge in floating diffusion region 420, form output signal.
As shown in fig. 4 a, reset grid and source follower gate and reset transistor that respective active region is formed and
Source following transistor is arranged between photosensitive region 401-404 and photosensitive region 405-408, in longitudinal arrangement.
Fig. 4 b is the dot structure schematic diagram comprising mirror image pixel according to another embodiment of the invention.Fig. 4 a and figure
In 4b, the function of each photosensitive region, grid and active region is essentially identical.The difference of the two is, as shown in Figure 4 b, resets
Grid 421 and source follower gate 431 and respective active region form reset transistor and source following transistor setting
Between photosensitive region 401,405 and photosensitive region 402,406;Reset grid 422 and source follower gate 432 and respective
Active region forms reset transistor and source following transistor is arranged on photosensitive region 403,407 and photosensitive region 404,408
Between, in transversely arranged.
With reference to Fig. 4 a and Fig. 4 b, pixel domain is to be defined by axis, substantially mirror symmetric, so also referred to as " mirror image
Pixel ".The structure of this mirror image pixel makes four pixels share two pixel readout circuit transistors through design:Reset brilliant
Body pipe RST and source electrode follow SF, such that it is able to save more spaces out to photosensitive region.
Fig. 5 is the circuit diagram of imageing sensor according to an embodiment of the invention.As shown in figure 5, image passes
Sensor 500 includes photodiode 501-508, and it represents each photosensitive region.Photodiode 501-508 is connected respectively to respectively
From transfering transistor 511-518.The output of wherein transfering transistor 511,512,515 and 516 is connected to shared node 510,
And the 513 of transfering transistor, 514,517 and 518 export shared node 520.It is assumed that what photodiode 501 and 505 was located
Behavior 2n row, the control gate of transfering transistor 511 is connected to transfer control signal TxB<n-1>;And transfering transistor 515
Control gate be connected to transfer control signal TxA<n-1>.The control gate of transfering transistor 512 and 513 is connected to transfer control
Signal TxB processed<n>;And the control gate of transfering transistor 516 and 517 is connected to transfer control signal TxA<n>.Transfer crystal
The control gate of pipe 514 is connected to transfer control signal TxB<n+1>;And the control gate of transfering transistor 518 is connected to transfer
Control signal TxA<n+1>.
As shown in figure 5, imageing sensor 500 includes two reset transistors 521 and 522.The grid of reset transistor 521
It is connected to reset control signal RST<n-1>;The source electrode of reset transistor 521 is connected to shared node 510;And reset transistor
Drain electrode be connected to row selection signal RowSel<n-1>.
Similarly, the grid of reset transistor 522 is connected to reset control signal RST<n>;The source of reset transistor 522
Pole is connected to shared node 520;And the drain electrode of reset transistor is connected to row selection signal RowSel<n>.
As shown in figure 5, imageing sensor 500 includes two source following transistor 531 and 532.Source following transistor
531 grid is connected to shared node 510, and the source electrode of source following transistor 531 is connected to the first column output line Col0, and source
The drain electrode that transistor 531 is followed in pole is connected to global bus Vaa, provides driving voltage.Similarly, source following transistor 532
Grid be connected to shared node 520, the source electrode of source following transistor 532 is connected to the second column output line Col1, and source electrode
The drain electrode following transistor 532 is connected similarly to global bus Vaa, provides driving voltage.
As shown in figure 5, imageing sensor 500 also includes the multiselect switch 541 of such as multiplexer.First and second row
Output lead Col0 and Col1 is all connected to the input of multiselect switch 541.And the output of multiselect switch is connected to row reading circuit.
Multiselect switch 541 has two effects:First, time-division is carried out to two column output lines, so can share one group of row and read
Circuit, thus further save space;And second, by the selection of multiselect switch internal so that two green pixels, i.e. Gb
With the output signal of Gr, deliver to same row reading circuit, to reduce error.
In the embodiment shown in fig. 5, in mirror image pixel four different colours pixel, i.e. Gr, R, B, and Gb pixel, altogether
Enjoy one group and include two transistors, that is, reset RST and source electrode and follow SF transistor, reading circuit.Wherein, 2n row and 2n
+ 1 row shares one group of replacement RST and source electrode follows SF transistor, and 2n+2 row and 2n+3 row are shared one group and reset RST and source electrode
Follow SF transistor.And, 2n+1 row and 2n+2 row also share a TX control line.Therefore, 2n+1 and 2n+2 row
One pixel cell of composition, four colored pixels of this pixel cell represent four colors Gr, R, B, and Gb respectively.
It should be noted that because the output of source electrode output transistor is directly connected on column output line, in order to not allow difference
The picture element signal of color mixes, and for 2n+1 row, uses the first column output line col0 output;And to 2n+2
OK, use the second column output line col1 output.
Fig. 6 is the reading sequential chart of the imageing sensor of the embodiment shown in Fig. 5.As shown in fig. 6, simultaneously with reference to Fig. 5, permissible
Find out that odd-numbered line (2n+1) and the reading sequential of even number line (2n+2) are slightly different.One is by opening TxA signal, and one is
Open TxB signal.And, in-sel signal is also different, and wherein in-sel signal is to control the multiselect of output lead to switch.
Sequential shown in Fig. 6 can be divided into three parts:Part I provide to the replacement in pixel floating diffusion FD region and
Sampling;Part II is that Tx opens, and picture element signal has been transferred to floating diffusion FD region;Part III includes this pixel is believed
Number sampling and low spot position is read back into FD so that source diffusion transistor is closed from newly.
Further describe below in conjunction with Fig. 5:First, RST<n-1>Signal resets shared node 510.RowSel<n-1
>Open, sampled signal Samp_blk signal is opened, the shared node 510 that counterweight postpones is sampled.Now, in_sel signal is in
High level, controls the sampled signal of shared node 510 to enter the first row reading circuit.Similarly, RST<n>Signal resets another
Shared node 520.Next RowSel<n>Open, sampled signal Samp_blk signal is opened, another shared section that counterweight postpones
Point 520 sampling.Now, in_sel signal is in low level, controls the sampled signal of shared node to enter the second row reading circuit.
Next, TxA<n>Signal is opened, TxA<n>Signal controls the B pixel of 2n+1 row to transfer to shared node 510;
And the Gr pixel of 2n+2 row transfers to shared node 520.Then, Samp_sig signal is opened, and shared node 510 is adopted
Sample, that is, sampling B pixel;Meanwhile, in_sel signal is in high potential, controls sampling B picture element signal to enter first row and reads
Circuit.Then pass through RST<n-1>, reset shared node 510, make shared node again be changed into electronegative potential and followed with closing source electrode
Transistor.Then, Samp_sig signal is again turned on, and shared node 520 is sampled, that is, sampling Gr pixel;Meanwhile,
In_sel signal is in electronegative potential, controls sampling Gr picture element signal to enter the second row reading circuit.Then pass through RST<n>, reset
Shared node 520, makes shared node again be changed into electronegative potential to close source following transistor.
For Gb and R pixel, the process of sampling is similar to:First, RST<n-1>Signal resets shared node 510.RowSel<
n-1>Open, sampled signal Samp_blk signal is opened, the shared node 510 that counterweight postpones is sampled.Now, at in_sel signal
In low level, the sampled signal of shared node 510 is controlled to enter the second row reading circuit.Similarly, RST<n>Signal resets another
One shared node 520.Next RowSel<n>Open, sampled signal Samp_blk signal is opened, it is another shared that counterweight postpones
Node 520 is sampled.Now, in_sel signal is in high level, controls the sampled signal of shared node to enter first row and reads electricity
Road.
Next, TxB<n>Signal is opened, TxB<n>Signal controls the Gb pixel of 2n+1 row to transfer to shared node
510;And the R pixel of 2n+2 row transfers to shared node 520.Then, Samp_sig signal is opened, and shared node 510 is entered
Row sampling, that is, sampling Gb pixel;Meanwhile, in_sel signal is in electronegative potential, controls sampling Gb picture element signal to enter second
Row reading circuit.Then pass through RST<n-1>, reset shared node 510, make shared node again be changed into electronegative potential to close source
Transistor is followed in pole.Then, Samp_sig signal is again turned on, and shared node 520 is sampled, that is, sampling R pixel;
Meanwhile, in_sel signal is in high potential, controls sampling R picture element signal to enter the second row reading circuit.Then pass through RST<n>,
Reset shared node 520, make shared node again be changed into electronegative potential to close source following transistor.
As above, due to the photodiode of four colors of same pixel share reset transistor and source electrode with
With transistor, by the sequential of above design, read the sampled value of the photodiode of four colors respectively in the different moment,
Achieve pixel sampling;And Gb and Gr of identical color enters same row reading circuit through controlling, and so can reduce
The error of system.
According to one embodiment of present invention, in order to reduce the area shared by reading circuit, the first and second row further
Reading circuit can be same row reading circuit.In this case, need ability after finishing when previous signal processing
Start to process next one sampled signal, is also accomplished by longer readout time.
According to one embodiment of present invention, multiselect switch can also be other electronic components or circuit is replaced and realizes
Essentially identical function.
According to one embodiment of present invention, in addition to the sequential chart shown in except Fig. 6, other sequential can also be used and reality
Existing essentially identical function.However, it is preferred to sequential still conform to correlated-double-sampling, to reduce systematic error.
The embodiment of Fig. 5 and Fig. 6 is to save column circuits area using the example of monolateral reading image sensor architecture.Though
So sacrifice read access time, but be highly suitable in the relatively small image sensor architecture realization of pixel resolution, example
Imageing sensor as 2,000,000 or 3 mega pixels.
Fig. 7 is the circuit diagram of imageing sensor according to an embodiment of the invention.As shown in fig. 7, image passes
Sensor 700 includes being placed in the row reading circuit on the both sides of pel array.The pixel portion of imageing sensor 700 shown in Fig. 7
Circuit is essentially identical with the imageing sensor of embodiment illustrated in fig. 5.Difference is that imageing sensor 700 includes two multiselects
Switch 741 and 742.Read by the row that the picture element signal (Gr and Gb) that multiselect switchs 741 and 742 same colors is transferred to same one side
Sense circuit.
Fig. 8 is the reading time diagram of the imageing sensor of embodiment illustrated in fig. 7.As shown in 8 figures, row selection signal
RowSel<n-1>And RowSel<n>Open, RST<n-1>And RST<n>Signal resets floating diffusion region 510 and 520, now adopts
Sample signal Samp_blk also opens simultaneously, floating diffusion region 510 and 520 sampling that counterweight postpones.Next TxA<n>Signal is beaten
Open, the B pixel of 2n+1 row and the Gr pixel of 2n+2 row are shifted respectively to floating diffusion region 510 and 520.Then, sample
Signal Samp_sig signal is opened, respectively to floating diffusion region 510 and 520, that is, the B pixel of 2n+1 row and 2n+2 row
Gr pixel sampling.Wherein, Gr pixel is output to multiselect switch 742 below Fig. 7, and B pixel via column output line Col1
It is transferred to the multiselect switch 741 above Fig. 7 via column output line Col0.Now in_sel signal is height.Multiselect switchs 741 quilts
Be set to in_sel signal be high when, Col1 opens, Gr picture element signal be transferred to multiselect switch 741 is connected first rows readings
Go out circuit.Multiselect switch 742 be arranged to in_sel signal be high when, Col0 opens, and B picture element signal is transferred to be opened with multiselect
Close the second row reading circuit of 742 connections.
Similarly, row selection signal RowSel<n-1>And RowSel<n>Open, RST<n-1>And RST<n>Signal resets
Floating diffusion region 510 and 520, now sampled signal Samp_blk also open simultaneously, floating diffusion region 510 He that counterweight postpones
520 samplings.Next TxB<n>Signal is opened, and the Gb pixel of 2n+1 row and the R pixel of 2n+2 row are shifted respectively to float
Dynamic diffusion region 510 and 520.Then, sampled signal Samp_sig signal is opened, respectively to floating diffusion region 510 and 520, also
It is the Gb pixel of 2n+1 row and the R pixel sampling of 2n+2 row.Wherein, R pixel is output to Fig. 7 via column output line Col1
The multiselect switch 742 of lower section, and Gb pixel is transferred to the multiselect switch 741 above Fig. 7 via column output line Col0.Now
In_sel signal is low.Multiselect switch 741 be arranged to in_sel signal be low when, Col0 opens, and Gb picture element signal is transmitted
To the first row reading circuit being connected with multiselect switch 741.Multiselect switch 742 be arranged to in_sel signal be low when, Col1
Open, Gr picture element signal is transferred to the second row reading circuit being connected with multiselect switch 742.
Although increased a multiselect switch in embodiment shown in Fig. 7 and Fig. 8, sacrifice some pixel space, but
It is to have saved on readout time, improve frame per second.Image sensor architecture shown in Fig. 7 and 8 can be used for larger image battle array
In row, such as in the imageing sensor of 5,000,000 or 8 mega pixels.
According to one embodiment of present invention, the readout sequence shown in from Fig. 8 can be seen that selection control signal of being expert at
The middle signal needing two row was opened in the same time.In order to reach this purpose, needing to be expert at selects to do in control circuit
Change.
Fig. 9 is the circuit diagram that row according to an embodiment of the invention selects control circuit.As shown in figure 9, controlling
Circuit 900 includes an input 901, for inputting the row address Addr_en for line n<n>, its form is Row add<
9:0>.This row address directly controls TxA<n>And TxB<n>.And RowSel signal is selected for row and resets RST signal needs two
Row is opened simultaneously.Control circuit 900 includes the first OR gate 911, the second OR gate 912, the 3rd OR gate 913 and the 4th OR gate 914.Its
In, the first OR gate 911 is connected to the row address input of adjacent previous row, for inputting the row address Addr_en of the (n-1)th row
<n-1>;The other end of the first OR gate is set to the first Dynamic Signal rs_en.Second OR gate 912 is connected to current row address input
End, for inputting the row address Addr_en of line n<n>;The other end of the second OR gate is set to the first Dynamic Signal rs_en.3rd
OR gate 913 is connected to current row address input, for inputting the row address Addr_en of line n<n>;3rd OR gate another
End is set to the second Dynamic Signal rst_en.4th OR gate 914 is connected to the row address input of adjacent rear a line, for inputting
The row address Addr_en of the (n+1)th row<n+1>;The other end of the 4th OR gate is set to the second Dynamic Signal rst_en.Further,
The outfan of the first OR gate 911 and the second OR gate 912 is connected respectively to two inputs of first and door 921, and first and door
921 outfan is row selection signal RowSel<n>.Similarly, the outfan difference of the 3rd OR gate 913 and the 4th OR gate 914
It is connected to two inputs of second and door 922, and second is reset signal RST with the outfan of door 922<n>.Rs_en and
Rst_en is the shared signal of all row.Row address Addr_en<n>Can only determine which is selected, but specific sequential
The first and second Dynamic Signal rs_en and rst_en also will be leaned on to determine.So, the row address Addr_en of line n<n>With
The row address Addr_en of n-1 row<n-1>Any one can open row selection signal RowSel<n>.And the row ground of line n
Location Addr_en<n>Row address Addr_en with the (n+1)th row<n+1>In any one can open reset signal RST<n
>.Thereby it is ensured that in row selection signal and reset signal, two row signals are when being opened by same signal the same time.
According to one embodiment of present invention, the frame per second computational chart after employing monolateral reading mirror image pixel structure is as follows
Shown in table:
As can be seen from the above table, even the embodiment of the monolateral framework of the present invention, 200 can still substantially be met
Ten thousand and 3,000,000 demands in frame per second for the imageing sensor.And, in conjunction with the high photosensitive area of the pixel of the present invention, the present invention is
FSI pixel miniaturization provides a good solution.
The present invention makes to save multiple circuit units in pixel using a kind of readout sequence of particular design, and saves
The space of the circuit unit going out can be used to expand to the full extent photosensitive area, to improve low illumination sensitivity.Therefore, using this
The technology of invention can be implemented in 1.4 microns even 1.1 microns in FSI technique of pixel design, and keeps to greatest extent
Image quality, particularly low illumination sensitivity.
Figure 10 is the flow chart of imaging method according to an embodiment of the invention.Imaging method shown in Figure 10 is permissible
It is applied to Fig. 4 a, Fig. 4 b, in the imaging device of mirror image pixel shown in Fig. 5 and Fig. 7.Specifically, imaging method 1000 includes:
In step 1010, reset the first shared node and the second shared node, and the first and second shared nodes that counterweight postpones are adopted
Sample, wherein, the first shared node is that 4 pixels in first group of pixel are common;And the second shared node is second group of pixel
In 4 pixels common.In step 1020, by the electric charge transfer of one of first group of pixel pixel to the first shared section
Point, and by the electric charge transfer of one of second group of pixel pixel to the second shared node.In step 1030, to first altogether
Enjoy node sample, and by the voltage output after sampling to the first output lead, and the second shared node is sampled, and by after sampling
Voltage output is to the second output lead.In step 1040, the first shared node and the second shared node are reset.In step 1050
In, by the electric charge transfer of the one other pixel in first group of pixel to the first shared node, and will be another in second group of pixel
The electric charge transfer of one pixel is to the second shared node.In step 1060, the first shared node is sampled, and by after sampling
Voltage output is to the first output lead, and the second shared node is sampled, and by the voltage output after sampling to the second output lead.
Due to having been completed the sampling to 4 pixels in step 1030 and 1060.And this 4 pixels can be adjacent
Pixel and there are different colors, such as R, Gb, Gr and B are thus constitute the colour element of 4 different colours of an inclusion.Thus,
Imaging method 100 achieves the sampling to a colour element.The whole pel array being arranged in rows and columns is implemented line by line
Imaging method 100 is it is possible to realize the sampling to whole pel array, thus completing to be imaged.
According to one embodiment of present invention, imaging method 100 further includes:On first output lead and the second output lead
Same color sampled signal chosen and be admitted to same row reading circuit.
Figure 11 is the schematic diagram of system according to an embodiment of the invention.Figure 11 illustrates that comprises an image sensing
The processor system 1100 of device 1110.Wherein, imageing sensor 1110 imageing sensor as described in the present invention.Described process
Device system 1100 demonstration explanation has the system of the digital circuit that can comprise image sensor apparatus.In situation without restriction
Under, this system can comprise computer system, camera system, scanner, machine vision, automobile navigation, visual telephone, monitor system
System, autofocus system, star tracker system, movement detection systems, image stabilisation system data compressibility.
Processor system 1100 (for example, camera system) generally includes CPU (CPU) 1140 (such as microprocessor
Device), it is communicated with input/output (I/O) device 1120 via bus 1101.Imageing sensor 1110 is also via bus 1101
And communicate with CPU 1140.Random access memory (RAM) 1130 is also comprised based on the system 1100 of processor, and can comprise can
Remove memorizer 1150 (such as flash memory), it is also communicated with CPU 1140 via bus 1101.Imageing sensor
1110 can be combined with processor (such as CPU, digital signal processor or microprocessor), single integrated circuit or different from described
Memory storage apparatus can be with or without on the chip of processor.Image combination and the calculating processing can be by imageing sensors 1110
Or executed by CPU 1140.
Above-described embodiment is used for illustrative purposes only, and is not limitation of the present invention, general about technical field
Logical technical staff, without departing from the present invention, can also make a variety of changes and modification, therefore, all equivalent
Technical scheme also should belong to category disclosed by the invention.