CN103560119B - A flexible substrate for three-dimensional packaging structure and method for fabricating a multi-chip shield - Google Patents

A flexible substrate for three-dimensional packaging structure and method for fabricating a multi-chip shield Download PDF

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CN103560119B
CN103560119B CN201310542832.1A CN201310542832A CN103560119B CN 103560119 B CN103560119 B CN 103560119B CN 201310542832 A CN201310542832 A CN 201310542832A CN 103560119 B CN103560119 B CN 103560119B
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shield
flexible substrate
chip
portion
shaped
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CN201310542832.1A
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CN103560119A (en
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徐健
王宏杰
孙鹏
陆原
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华进半导体封装先导技术研发中心有限公司
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors

Abstract

本发明提供一种用于多屏蔽芯片的三维柔性基板封装结构,包括一柔性基板,所述柔性基板中预设有第一金属屏蔽层和第二金属屏蔽层;需屏蔽芯片分别贴装在柔性基板正反面,柔性基板两侧部位分别向柔性基板正面中间弯折,形成两个U型屏蔽部;两个U型屏蔽部各自的上方柔性基板在高度方向上部分重叠,且第二个U型屏蔽部的上方柔性基板在第一个U型屏蔽部的上方柔性基板之上。 The present invention provides a three-dimensional multi-barrier flexible substrate chip packaging structure, comprising a flexible substrate, the flexible substrate preset in a first layer and a second metal shield metallic shield; a screened chips are mounted on a flexible front and back surfaces of the substrate, the flexible substrate are bent on both sides of the intermediate portion of the flexible front substrate, forming two U-shaped shield portion; two respective upper flexible substrate U-shaped shield portion partially overlap in the height direction, and a second U-shaped the shield portion over the flexible substrate in a flexible substrate above the first U-shaped portion of the shield above. 第一需屏蔽芯片分布在第一个U型屏蔽部内,第二需屏蔽芯片分布在第一个U型屏蔽部上方柔性基板和第二个U型屏蔽部上方柔性基板间。 A first distributed in a screened chip a first U-shaped shield portion, a second chip located in a screened a first U-shaped upper shield portion and the second flexible substrate U-shaped upper shield portion between the flexible substrate. 金属屏蔽层将需屏蔽芯片包覆在内。 The metal shield for an inner shield covering the chip. 本发明解决了较强电磁辐射芯片对外界的电磁干扰问题,并且封装结构更加紧凑。 The present invention solves the problem of electromagnetic interference strong electromagnetic radiation outside the chip, and the package more compact.

Description

用于多屏蔽芯片的三维柔性基板封装结构及制作方法 A flexible substrate for three-dimensional packaging structure and method for fabricating a multi-chip shield

技术领域 FIELD

[0001]本发明涉及一种封装结构,尤其是一种采用柔性基板的电磁屏蔽封装结构。 [0001] The present invention relates to a package structure, in particular an electromagnetic shield structure of the flexible packaging substrate.

背景技术 Background technique

[0002]随着微电子技术的发展,微电子处理功能的复杂、多样化,使得微电子中基板中电子元件的集成密度越来越大,势必增加微组装密度和集成度的骤然提高,对于有限空间内提高封装的整体集成度和对较强电磁辐射的器件进行电磁屏蔽提出了更高的要求,工艺难度增加,又必须保证系统的正常工作。 [0002] With the development of microelectronics technology complex microelectronic processing functions, diversity, so that the integration density of electronic components in the substrate microelectronic increasing, and the density is bound to increase microassembly suddenly increased integration degree, for encapsulated within a limited space to improve the overall integration of the strong electromagnetic radiation and electromagnetic shielding device made higher requirements, increasing the difficulty of the process, it must ensure that the system is working properly.

[0003]图1是现有的一种电磁屏蔽解决方案,主要是在半导体封装结构上设置一个电磁屏蔽罩,用于屏蔽芯片间的电磁干扰。 [0003] FIG. 1 is a conventional electromagnetic shielding solution, mainly provided on the semiconductor package of an electromagnetic shield structure for shielding electromagnetic interference between the chip. 但没有考虑电磁辐射从器件底部泄露的问题和封装结构尺寸较大的问题。 No consideration is given to electromagnetic radiation leaking from the bottom of the device package structure of large size problem and a problem. 屏蔽罩101考虑了屏蔽芯片108和112之间的互相干扰,但没有考虑芯片112从底部泄露辐射的处理。 Considered shield 101 and shield 108 interfere with each other between the chips 112, chip 112 but does not consider leakage of radiation from the bottom of the processing.

发明内容 SUMMARY

[0004]本发明基于柔性基板的制造和折弯技术,提供一种用于多屏蔽芯片的三维柔性基板封装结构及相应的制作方法,通过内置屏蔽层的柔性基板的弯折形成具有多面电磁屏蔽结构的封装结构,可以同时屏蔽多个高电磁辐射芯片,解决了高密度多面微组装中具有较强电磁辐射芯片对外界的电磁干扰问题;并且封装尺寸紧凑。 [0004] The present invention is based on manufacturing technology and bending the flexible substrate, a flexible substrate to provide a three-dimensional package structure and corresponding method of manufacturing a multi-chip shield for electromagnetic shield is formed by a surface having a plurality of bent flexible substrate shielding layer built the packaging structure can be simultaneously a plurality of high electromagnetic radiation shielding chip, high-density multi-faceted solution microassembly chip having a strong electromagnetic radiation external electromagnetic interference problems; and compact package size. 本发明采用的技术方案是: Aspect of the present invention is that:

[0005] —种用于多屏蔽芯片的三维柔性基板封装结构,包括一柔性基板,所述柔性基板中预设有第一金属屏蔽层和第二金属屏蔽层;在柔性基板中开有贯通柔性基板正反面的导通孔,所述导通孔内填充有金属导电材料,通过导通孔使得第一金属屏蔽层与柔性基板正反面上的接地焊盘电连接;在柔性基板中还开有盲孔,所述盲孔中填充有金属导电材料,通过盲孔使得第二金属屏蔽层与柔性基板反面的接地焊盘电连接;导通孔与第二金属屏蔽层绝缘。 [0005] - a kind of three-dimensional structure of a flexible substrate multi-barrier packaging chip, comprising a flexible substrate, the flexible substrate preset in a first metal and a second metal shield layer shielding layer; in the flexible substrate is opened through a flexible front and back surfaces of the substrate via hole, the via hole is filled with a metallic conductive material, such that the first via hole through the metal shield and the ground pads are electrically connected to the flexible front and back surfaces of the substrate; also opened in the flexible substrate a blind hole, the blind hole is filled with a metallic conductive material, such that the blind hole through the back of the ground connection pads of the second flexible substrate and the metal shield connector; vias and the second metal layer insulating shield.

[0006]第一需屏蔽芯片贴装在在柔性基板正面中间部位,第一需屏蔽芯片的接地凸点与柔性基板正面的接地焊盘连接;第二需屏蔽芯片贴装在在柔性基板反面的一侧部位,第二需屏蔽芯片的接地凸点与柔性基板反面的接地焊盘连接;将带有第二需屏蔽芯片那一侧部位的柔性基板和背离第二需屏蔽芯片那一侧部位的柔性基板分别向柔性基板正面中间弯折,形成两个U型屏蔽部;两个U型屏蔽部各自的上方柔性基板在高度方向上部分重叠,且第二个U型屏蔽部的上方柔性基板在第一个U型屏蔽部的上方柔性基板之上。 [0006] First a screened chip placement in the front middle portion of the flexible substrate, a first front ground pads need to shield the ground bump chip and the flexible substrate; a second chip mounted in a screened back of the flexible substrate a side portion, a second ground a screened chip bump pads opposite the flexible substrate connected to ground; the second with a screened chip side of the flexible substrate and a portion away from the second side a screened chip site are bent flexible substrate to the intermediate flexible front substrate, forming two U-shaped shield portion; two respective upper flexible substrate U-shaped shield portion partially overlap in the height direction and above the flexible substrate in a second U-shaped portion of the shield a shield above the first U-shaped portion on a flexible substrate.

[0007]第一需屏蔽芯片分布在第一个U型屏蔽部内,第二需屏蔽芯片分布在第一个U型屏蔽部上方柔性基板和第二个U型屏蔽部上方柔性基板间;弯折后的柔性基板中的第一金属屏蔽层至少将第一需屏蔽芯片完全包覆在内,柔性基板中的第二金属屏蔽层将第二需屏蔽芯片包覆在内。 [0007] First a screened chip distributed within the first U-shaped shield portion, a second chip located in a screened a first U-shaped upper shield portion and the second flexible substrate U-shaped upper shield portion between the flexible substrate; bent a first metal shield layer of the flexible substrate after the first, at least for an inner shield completely coated chip, a second flexible substrate in a second metal shield for an inner shield covering chip.

[0008]进一步地,所述第一需屏蔽芯片的背面与第一个U型屏蔽部的上方柔性基板I的内面焊接在一起。 [0008] Further, the first inner surface of a screened back surface of the first flexible substrate over a portion of the U-shaped shield chip I are welded together.

[0009]进一步地,所述第二需屏蔽芯片的背面与第二个U型屏蔽部的上方柔性基板的内面焊接在一起。 [0009] Further, the inner surface of the flexible substrate over the back with a second portion of a second U-shaped shield shielding required chip welded together.

[0010]进一步地,所述第二需屏蔽芯片处于第一需屏蔽芯片正上方,形成堆叠结构。 [0010] Further, the second chip is required to shield a first shield for an immediately above the chip, a stacked structure is formed.

[0011]进一步地,第二个U型屏蔽部上方柔性基板的外侧的那一面上贴装有普通芯片,且普通芯片位于第一需屏蔽芯片和第二需屏蔽芯片上方,形成多芯片堆叠结构。 [0011] Further, the second U-shaped upper portion of that surface of the outer shield of the common flexible substrate-mounted chip, and the chip is located in a first common chip and the second shielding required for an upper chip shield, forming a multi-chip stack structure .

[0012]进一步地,在第一需屏蔽芯片和第二需屏蔽芯片底部填充有底填料。 [0012] Further, in the first chip and the second shielding required for an bottom shield bottomed filled packing chip.

[0013]进一步地,在第一个U型屏蔽部和第二个U型屏蔽部内填充有灌封料。 [0013] Further, in the first U-shaped shield portion and a second U-shaped shield portion is filled with a potting compound.

[0014]进一步地,在上述两个U型屏蔽部的下方柔性基板的外侧那一面上植有多个焊球,其中至少有一个焊球与电连接第一金属屏蔽层的接地焊盘连接;至少有一个焊球与电连接第二金属屏蔽层的接地焊盘连接。 [0014] Further, in the outer surface of the flexible substrate that is implanted below the two U-shaped shield portion has a plurality of solder balls, wherein at least one solder ball to the pad is electrically connected to a first ground connected to the metal shield; At least one solder ball is electrically connected to the second ground pad connected to the metal shield.

[0015] 一种用于多屏蔽芯片的三维柔性基板封装结构的制作方法,包括下述步骤: [0015] A method of making a three-dimensional multi-chip shield structure for packaging a flexible substrate, comprising the steps of:

[0016]步骤一.提供柔性基板,所述柔性基板中预设有第一金属屏蔽层和第二金属屏蔽层;在柔性基板中开贯通柔性基板正反面的导通孔,在导通孔内填充金属导电材料,通过导通孔使得第一金属屏蔽层与柔性基板正反面上的接地焊盘电连接;在柔性基板中开盲孔,在盲孔中填充金属导电材料,通过盲孔使得第二金属屏蔽层与柔性基板反面的接地焊盘电连接;导通孔与第二金属屏蔽层绝缘; . [0016] Step providing a flexible substrate, the flexible substrate preset in a first metal and a second metal shield layer shielding layer; in the flexible substrate through the via hole opening sides of the flexible substrate, the via holes metal conductive filler material, such that the first via hole through the metal shield and the ground pads are electrically connected to the flexible front and back surfaces of the substrate; blind hole opening in the flexible substrate, a conductive metal material is filled in a blind hole, the blind hole so that the first through the two metal shield and the flexible substrate opposite the ground pads are electrically connected; via hole and the second insulating layer, the metal shield;

[0017]步骤二.在柔性基板正面中间部位贴装第一需屏蔽芯片,使得第一需屏蔽芯片的接地凸点与柔性基板正面的接地焊盘连接;在柔性基板反面的一侧部位贴装第二需屏蔽芯片,使得第二需屏蔽芯片的接地凸点与柔性基板反面的接地焊盘连接;在第一需屏蔽芯片和第二需屏蔽芯片底部填充底填料; [0017] Step two flexible front substrate in a first intermediate portion of a screened-mount chip, the chip so that the first ground shield need bump pads connected to the ground front surface of the flexible substrate; the substrate in the opposite side of the flexible portion of the mount the second shielding required chip, the chip so that the second ground shield need bumps connected to the flexible substrate opposite the ground pads; a screened bottom of the first chip and the second chip shield for an underfill filling;

[0018]步骤三.将带有第二需屏蔽芯片那一侧部位的柔性基板向柔性基板正面中间弯折,形成第一个U型屏蔽部,并且使得第二需屏蔽芯片处于第一需屏蔽芯片正上方,形成堆叠结构;将第一需屏蔽芯片的背面与第一个U型屏蔽部的上方柔性基板的内面焊接在一起; A flexible substrate [0018] Step III. The second with a screened chip side intermediate flexible portion is bent to the front substrate, forming a first U-shaped shield portion, and the need to shield such that the second chip in a first shield for an immediately above the chip, a stacked structure; shield for an inner surface of the first flexible substrate over the back of the U-shaped shield with a first portion of the chip welded together;

[0019]步骤四.将背离第二需屏蔽芯片那一侧部位的柔性基板向柔性基板正面中间弯折,形成第二个U型屏蔽部,使得第二个U型屏蔽部的上方柔性基板位于第二需屏蔽芯片上方,并且使得柔性基板弯折后柔性基板中的第一金属屏蔽层至少将第一需屏蔽芯片完全包覆在内,柔性基板中的第二金属屏蔽层将第二需屏蔽芯片包覆在内;将第二需屏蔽芯片的背面与第二个U型屏蔽部上方柔性基板的内面焊接在一起; [0019] Step IV. The need to shield the chip away from the second side of the flexible substrate that is bent to the intermediate flexible portion of the front substrate, forming a second U-shaped shield portion, the second U-shaped such that the upper portion of the flexible substrate located on the shield the second mask over the chip required, and the flexible substrate is bent so that a first flexible metallic shield at least a first substrate for an inner shield completely coated chip, the second shield layer of the flexible metal substrate to a second shield for an chip inner cladding; need to shield the back of the second chip and a second U-shaped shield portion over the inner surface of the flexible substrate are welded together;

[0020]步骤五.在上述两个U型屏蔽部内的空间填充灌封料进行塑封; [0020] Step Five space in said two U-shaped shield portion for filling plastic potting material;

[0021]步骤六.在上述两个U型屏蔽部的下方柔性基板的外侧那一面上植焊球,形成信号回路和电磁屏蔽回路;其中至少有一个焊球与电连接第一金属屏蔽层的接地焊盘连接;至少有一个焊球与电连接第二金属屏蔽层的接地焊盘连接。 . [0021] Step Six balls of that surface of the implant on the outside of the flexible substrate below the two U-shaped portion of the shield, and the signal circuit is formed electromagnetic shielding loop; wherein at least one of solder balls electrically connecting the first metal shield connected to the ground pad; at least one solder ball is electrically connected to the second ground pad connected to the metal shield.

[0022] 上述制作方法中,进一步地, [0022] In the above-described manufacturing method, further,

[0023]步骤二中,第一需屏蔽芯片和第二需屏蔽芯片贴装完后,还包括:将普通芯片贴装在柔性基板反面背离第二需屏蔽芯片的那一侧部位; [0023] Step II, the need to shield the first chip and the second chip mounting a screened after, further comprising: a common chip placement on the side facing away from the second portion of the flexible substrate opposite a screened chip;

[0024]步骤四中,在进行形成第二个U型屏蔽部的弯折时,使普通芯片位于第一需屏蔽芯片和第二需屏蔽芯片上方,形成多芯片堆叠结构。 When [0024] the Step 4, during the second U-shaped bent portion of the mask is formed, so that for an ordinary chip is located a first chip and a second shielding mask over the chip required to form a multi-chip stack structure.

[0025]本发明具备下列优势: [0025] The present invention includes the following advantages:

[0026] 1.本发明通过不同的电磁屏蔽回路,可以同时屏蔽多个芯片,尽量减少多个高电磁辐射芯片相互间的干扰和对外界的电磁干扰。 [0026] 1. The present invention is different electromagnetic shielding circuit, simultaneously a plurality of chips can be shielded, a plurality of high electromagnetic radiation to minimize the chip mutual interference and electromagnetic interference from the outside world.

[0027] 2.采用3D封装结构,封装后结构尺寸小,封装密度高。 [0027] 2. The use of 3D packaging structure, the structure of a small package size, high packing density.

[0028] 3.在柔性基板中铺设有金属屏蔽层,并通过导通孔或盲孔与接地焊盘互连,形成多面屏蔽的结构,屏蔽效果更佳。 [0028] 3. laid in the flexible substrate with a metal shield layer, and through holes or blind vias interconnecting the ground pad, forming a multi-sided shielding structure, better shielding effect.

附图说明 BRIEF DESCRIPTION

[0029]图1为现有技术中的一种电磁屏蔽结构。 [0029] Figure 1 is an electromagnetic shield structure of the prior art.

[0030]图2为本发明的柔性基板示意图。 [0030] Fig 2 a schematic view of the flexible substrate of the present invention.

[0031]图3为本发明的芯片贴装示意图。 [0031] Fig 3 a schematic view of a chip placement present invention.

[0032]图4为本发明的柔性基板第一次弯折示意图。 A flexible substrate [0032] FIG. 4 is a schematic view of the invention of the first bending.

[0033]图5为本发明的柔性基板第二次弯折示意图。 [0033] FIG. 5 of the present invention, the flexible substrate second bending FIG.

[0034]图6为本发明的芯片塑封示意图。 Plastic chip [0034] FIG. 6 is a schematic view of the present disclosure.

[0035]图7为本发明的器件植球示意图。 [0035] Figure 7 is a schematic view of the ball implant device of the invention.

具体实施方式 Detailed ways

[0036]下面结合具体附图和实施例对本发明作进一步说明。 [0036] The following specific embodiments in conjunction with the drawings and embodiments of the present invention will be further described.

[0037]如图2〜图7所示:一种用于多屏蔽芯片的三维柔性基板封装结构,包括一柔性基板I,所述柔性基板I中预设有第一金属屏蔽层2和第二金属屏蔽层3;在柔性基板I中开有贯通柔性基板I正反面的导通孔4,所述导通孔4内填充有金属导电材料,通过导通孔4使得第一金属屏蔽层2与柔性基板I正反面上的接地焊盘电连接;在柔性基板I中还开有盲孔5,所述盲孔5中填充有金属导电材料,通过盲孔5使得第二金属屏蔽层3与柔性基板I反面的接地焊盘电连接;导通孔4与第二金属屏蔽层3绝缘。 [0037] As shown in FIG. 2 ~ 7: A three-dimensional multi-barrier flexible substrate chip packaging structure, comprising a flexible substrate I, I preset the flexible substrate a first metal layer 2 and the second shield metal shield 3; I, the flexible substrate via hole is opened through the front and back I flexible substrate 4, the through hole 4 of the guide is filled with a metallic conductive material through the via hole 4 such that the first metal layer 2 and the shield I flexible substrate ground pad electrically connected to front and back surfaces; I flexible substrate further blind hole 5 is opened, the blind hole 5 is filled with a metallic conductive material, through the second blind hole 5 so that the flexible metal shield 3 I reverse the substrate ground pads are electrically connected; via hole 4 and the second metal layer 3 is an insulating shield.

[0038]第一需屏蔽芯片6贴装在在柔性基板I正面中间部位,第一需屏蔽芯片6的接地凸点与柔性基板I正面的接地焊盘连接;第二需屏蔽芯片7贴装在在柔性基板I反面的一侧部位,第二需屏蔽芯片7的接地凸点与柔性基板I反面的接地焊盘连接;将带有第二需屏蔽芯片7那一侧部位的柔性基板I和背离第二需屏蔽芯片7那一侧部位的柔性基板I分别向柔性基板I正面中间弯折,形成两个U型屏蔽部;两个U型屏蔽部各自的上方柔性基板I在高度方向上部分重叠,且第二个U型屏蔽部(图中是右U型屏蔽部)的上方柔性基板I在第一个U型屏蔽部(图中是左U型屏蔽部)的上方柔性基板I之上;第一需屏蔽芯片6分布在第一个U型屏蔽部内,第二需屏蔽芯片7分布在第一个U型屏蔽部上方柔性基板I和第二个U型屏蔽部上方柔性基板I间;弯折后的柔性基板I中的第一金属屏蔽层2至少将第一需屏蔽芯片6 [0038] The first die 6 mounted in a screened middle portion of the front surface of the flexible substrate I, a screened first chip 6 is connected to the ground bumps flexible substrate ground pads front I; second chip 7 mounted in a screened I site in the opposite side of the flexible substrate, the need to shield the second chip ground bumps 7 and the flexible substrate opposite a ground pad connected to I; 7 that the flexible substrate with the side facing away from the second part I and a screened chip the second chip 7 that need to shield the side portions of the flexible substrate is bent to the flexible substrate, respectively, I I intermediate the front, two U-shaped shield portion is formed; two respective upper flexible substrate U-shaped shield portion I partially overlap in a height direction , and the flexible substrate over the second U-shaped shield portion (U-shaped shield portion is a right side in the drawing) above the flexible substrate I of the first U-shaped shield portion (U-shaped shield portion is left in the drawing) on ​​an I; the first chip shield 6 need distributed within the first U-shaped shield portion, a second distribution of a screened chip 7 in a U-shaped first upper shield section I and a second flexible substrate U-shielding portion between the flexible substrate I above; bending a first metal shield folded flexible substrate I after at least 2 of the required first chip shield 6 完全包覆在内,柔性基板I中的第二金属屏蔽层3将第二需屏蔽芯片7包覆在内。 Including completely coated, flexible substrate I, a second layer 3 a second metal shield for an inner shield cover 7 chip.

[0039]优选地,所述第一需屏蔽芯片6的背面与第一个U型屏蔽部的上方柔性基板I的内面焊接在一起。 [0039] Preferably, the inner surface of the first chip over the need to shield the back surface of the flexible substrate with a first U-shaped portion of the shield 6 I are welded together.

[0040]优选地,所述第二需屏蔽芯片7的背面与第二个U型屏蔽部的上方柔性基板I的内面焊接在一起。 [0040] Preferably, the inner surface of the second flexible substrate over a screened chip rear surface and a second U-shaped portion 7 of the mask I are welded together.

[0041]优选地,第二需屏蔽芯片7处于第一需屏蔽芯片6正上方,形成堆叠结构。 [0041] Preferably, the second chip 7 is required to shield 6 directly above the first shielding required chip, form a stacked structure.

[0042]优选地,第二个U型屏蔽部上方柔性基板I的外侧的那一面上贴装有普通芯片8,且普通芯片8位于第一需屏蔽芯片6和第二需屏蔽芯片7上方,形成多芯片堆叠结构。 [0042] Preferably, the second U-shaped shield that upper surface of the outer portion of the flexible substrate-mounted common I chip 8, and a first common chip 8 is positioned above a screened chip 6 and the second shielding required chip 7, forming a stacked multi-chip structure.

[0043]优选地,第一需屏蔽芯片6和第二需屏蔽芯片7底部填充有底填料9。 [0043] Preferably, the bottom 6 of the first chip and the second shield need a screened chip 7 bottomed packing 9 filling.

[0044]优选地,第一个U型屏蔽部和第二个U型屏蔽部内填充有灌封料10。 [0044] Preferably, the first filled with a U-shaped shield portion and a second U-shaped shield portion potting compound 10.

[0045]最后,上述两个U型屏蔽部的下方柔性基板I的外侧那一面上植有多个焊球11,其中至少有一个焊球11与电连接第一金属屏蔽层2的接地焊盘连接;至少有一个焊球11与电连接第二金属屏蔽层3的接地焊盘连接。 [0045] Finally, the outer surface of the implant below the flexible substrate that said two U-shaped shield portion I has a plurality of solder balls 11, wherein at least one solder ball 11 is electrically connected to the ground pad of the first metal shield 2 connections; and at least one solder ball 11 is electrically connected to the second pad layer metal shield 3 is connected to ground.

[0046]下面详细介绍用于多屏蔽芯片的三维柔性基板封装结构的制作方法,包括下述步骤: [0046] The following detailed manufacturing method of a three-dimensional structure of a flexible substrate for a multi-barrier packaging chip, comprising the steps of:

[0047]步骤一.如图2所示,提供柔性基板1,所述柔性基板I中预设有第一金属屏蔽层2和第二金属屏蔽层3;第一金属屏蔽层2和第二金属屏蔽层3均可采用铜层。 [0047] Step a 2, there is provided a flexible substrate, the flexible substrate has a first I metal shielding layer 2 and the second predetermined metal shield 3; a first metal and a second metal shielding layer 2 shielding layer 3 may be made of copper. 在柔性基板I中开贯通柔性基板I正反面的导通孔4,在导通孔4内填充金属导电材料,通过导通孔4使得第一金属屏蔽层2与柔性基板I正反面上的接地焊盘电连接;在柔性基板I中开盲孔5,在盲孔5中填充金属导电材料,通过盲孔5使得第二金属屏蔽层3与柔性基板I反面的接地焊盘电连接;导通孔4与第二金属屏蔽层3绝缘; Vias in the flexible substrate I I in the open through the front and back of the flexible substrate 4, a conductive metal material is filled in the via holes 4, through a first via hole 4 such that the metal shielding layer 2 and the front and back surfaces of the flexible substrate a ground I pads are electrically connected; blind hole opening in the flexible substrate 5 I, the metallic conductive material is filled in the blind hole 5, through the second blind hole 5 such that the metal shield 3 is connected to the flexible substrate opposite the ground connection pads I; oN hole 4 and the second metal layer 3 is an insulating shield;

[0048]步骤二.如图3所示,在柔性基板I正面中间部位贴装第一需屏蔽芯片6,使得第一需屏蔽芯片6的接地凸点与柔性基板I正面的接地焊盘连接;在柔性基板I反面的一侧部位贴装第二需屏蔽芯片7,使得第二需屏蔽芯片7的接地凸点与柔性基板I反面的接地焊盘连接; . [0048] Step two shown in Figure 3, the front middle portion of the first flexible substrate for an I-mount chip shield 6, such that the need to shield the first bumps chip 6 is connected to the grounded flexible substrate ground pad front I; I site at the side of the flexible substrate opposite the second mount a screened chip 7, so that the required second ground shield chip bumps 7 is connected to the reverse side of the flexible substrate ground pad I;

[0049]在此步骤中,将第一需屏蔽芯片6和第二需屏蔽芯片7分别通过倒装焊方式贴装在柔性基板I的正反面,为后续弯折成型做好了准备。 [0049] In this step, the need to shield the first and second chip 6 a screened chip 7 are mounted by flip-chip manner in front and back of the flexible substrate I, ready for subsequent bending molding. 此步骤中,还可以将普通芯片8(本文指不需要屏蔽的芯片)贴装在柔性基板I反面背离第二需屏蔽芯片7的那一侧部位。 In this step, the chip 8 can be normal (referred to herein do not require shielding chip) mounted on the side of the back portion of the flexible substrate facing away from the second I a screened chip 7. 第一需屏蔽芯片6的接地凸点与柔性基板I正面的接地焊盘连接,第二需屏蔽芯片7的接地凸点与柔性基板I反面的接地焊盘连接,初步形成了两个电磁屏蔽回路。 The first bumps connected to the ground required chip shield 6 and the front surface of the flexible substrate ground pad I, a screened chip second bumps 7 is connected to ground and I flexible substrate opposite the ground pad, the initial formation of two loops electromagnetic shielding . 在各芯片贴装完后,在第一需屏蔽芯片6和第二需屏蔽芯片7底部填充底填料9,以排除下面的气体。 After placement in each chip, the chip shield 6 the first and the second required a screened bottom of the chip 7 is filled underfill 9, to exclude the following gas.

[0050]步骤三.如图4所示,将带有第二需屏蔽芯片7那一侧部位的柔性基板I向柔性基板I正面中间弯折,形成第一个U型屏蔽部,本例中从图4看是先形成左U型屏蔽部,并且形成左U型屏蔽部后,第一需屏蔽芯片6位于左U型屏蔽部内;并且使得第二需屏蔽芯片7处于第一需屏蔽芯片6正上方,形成堆叠结构; [0050] Step three shown in Figure 4, the second with a screened chip 7 that the flexible substrate is bent to the side portion of the flexible substrate I I intermediate the front, forming a first U-shaped shield portion, the present embodiment See the left is first formed from a U-shaped shield portion 4, and a left U-shaped shield portion is formed, the first chip shield 6 for an U-shaped shield is located in the left portion; and a second such chip 7 is in the first shielding required for an chip shield 6 immediately above, a stacked structure;

[0051]将第一需屏蔽芯片6的背面与第一个U型屏蔽部的上方柔性基板I的内面(也就是未弯折前的正面)焊接在一起; [0051] The shield for an inner surface of a first flexible substrate over the back surface of chip with a first U-shaped portion of the shield 6 is I (i.e. before the front unbent) welded together;

[0052]步骤四.如图5所示,将背离第二需屏蔽芯片7那一侧部位的柔性基板I向柔性基板I正面中间弯折,形成第二个U型屏蔽部,本例中也就是右U型屏蔽部,使得第二个U型屏蔽部的上方柔性基板I位于第二需屏蔽芯片7上方,并且使得柔性基板I弯折后柔性基板I中的第一金属屏蔽层2至少将第一需屏蔽芯片6完全包覆在内,柔性基板I中的第二金属屏蔽层3将第二需屏蔽芯片7包覆在内;将第二需屏蔽芯片7的背面与第二个U型屏蔽部上方柔性基板I的内面(也就是未弯折前的正面)焊接在一起; A flexible substrate [0052] Step IV. As shown, the second a screened chip 5 facing away from the side portion 7 of the flexible substrate is bent I I intermediate the front, to form a second U-shaped shield portion, this embodiment also is a right U-shaped shield portion, so that the flexible substrate over the second U-shaped shield portion is positioned above the second I a screened chip 7, so that the first metal and the flexible substrate is bent flexible substrate I I in the shielding layer at least 2 a first shield for an inner die 6 completely coated, a second flexible substrate metal shield 3 I is a second coating, including a screened chip 7; the second need to shield the back of the chip 7 and the second U- the shield portion over the inner surface of the flexible substrate I (i.e. before the front unbent) welded together;

[0053]从图5中可以看出,右U型屏蔽部的上方柔性基板I中的第一金属屏蔽层2末端需要达到左U型屏蔽部的上方柔性基板I中的第一金属屏蔽层2末端的上方,或者略超过一点距离。 [0053] As can be seen from FIG. 5, a first U-shaped metal shield over the right portion of the flexible substrate I is needed to reach the end of the shielding layer 2 a first metal shielding layer 2 above the left portion of the U-shaped shield flexible substrate I is the top end, or slightly exceeding the distance. 右U型屏蔽部的上方柔性基板I中的第二金属屏蔽层3的末端需要达到或超过第二需屏蔽芯片7的末端。 On the upper right portion of the U-shaped shield I flexible substrate in the second end of the metal shield 3 needs to meet or exceed the end of the second shield required chip 7.

[0054]在进行形成第二个U型屏蔽部的弯折时,普通芯片8位于第二个U型屏蔽部上方柔性基板I的外侧的那一面上,这样就可以使普通芯片8位于第一需屏蔽芯片6和第二需屏蔽芯片7上方,形成多芯片堆叠结构。 When [0054] performing a second bend forming a U-shaped shield portion, a second common chip 8 is located above the U-shaped shield that surface of the outer portion of the flexible substrate I, thus leaving the ordinary chip 8 at the first and a second shielding required for an upper chip shield 6 7 chip, multi-chip stacked structure is formed.

[0055]步骤五.如图6所示,在上述两个U型屏蔽部内的空间填充灌封料10进行塑封; . [0055] Step Five shown in Figure 6, the space within said two U-shaped shield portion 10 is filled with potting material molding;

[0056]步骤六.如图7所示,在上述两个U型屏蔽部的下方柔性基板I的外侧那一面上(SP反面)植焊球11,形成信号回路和最终的两个电磁屏蔽回路; [0056] Step six shown in Figure 7, in that the outer surface of the flexible substrate below said two U-shaped shield portion of the I (SP negative) implanted solder balls 11, forming the signal circuit and the electromagnetic shielding final two loops ;

[0057]至少有一个焊球11与电连接第一金属屏蔽层2的接地焊盘连接; [0057] at least one solder ball 11 is electrically connected to a first metal shield 2 is connected to the ground pad;

[0058]至少有一个焊球11与电连接第二金属屏蔽层3的接地焊盘连接。 [0058] and at least one solder ball 11 is electrically connected to the second pad layer metal shield 3 is connected to ground.

Claims (10)

1.一种用于多屏蔽芯片的三维柔性基板封装结构,其特征在于,包括一柔性基板(I),所述柔性基板(I)中预设有第一金属屏蔽层(2)和第二金属屏蔽层(3); 在柔性基板(I)中开有贯通柔性基板(I)正反面的导通孔(4),所述导通孔(4)内填充有金属导电材料,通过导通孔(4)使得第一金属屏蔽层(2)与柔性基板(I)正反面上的接地焊盘电连接;在柔性基板(I)中还开有盲孔(5),所述盲孔(5)中填充有金属导电材料,通过盲孔(5)使得第二金属屏蔽层(3)与柔性基板(I)反面的接地焊盘电连接;导通孔(4)与第二金属屏蔽层(3)绝缘; 第一需屏蔽芯片(6)贴装在在柔性基板(I)正面中间部位,第一需屏蔽芯片(6)的接地凸点与柔性基板(I)正面的接地焊盘连接;第二需屏蔽芯片(7)贴装在在柔性基板(I)反面的一侧部位,第二需屏蔽芯片(7)的接地凸点与柔性基板(I)反面的接地焊盘连接; 将带有第二需屏 1. A three-dimensional multi-barrier flexible substrate chip package structure, characterized in that it comprises a flexible substrate (I), the flexible substrate (I) in a first predetermined metal shielding layer (2) and a second a metallic shield (3); in a flexible substrate (I) has a through opening in the flexible substrate (I) of the front and back surfaces of the via hole (4), said via hole (4) is filled with a conductive metallic material, by conducting hole (4) such that the first metallic shield (2) and the flexible substrate (I) is a ground pad electrically connected to front and back surfaces; flexible substrate (I) is also opened with a blind hole (5), said blind hole ( 5) filled with a metallic conductive material (5) such that the second metallic shield (3) and the flexible substrate (I) negative ground pad electrically connected through vias; vias (4) and a second metal shield (3) insulation; a first shielding required chip (6) mounted in the front middle portion of the flexible substrate (I), a first shielding required chip (6) and the ground bumps flexible substrate (I) connected to the front ground pad ; second shield required chip (7) mounted on a side portion of the flexible substrate (I) of the opposite, second chip need shield (7) and ground bumps flexible substrate (I) connected to negative ground pad; and with a second screen needed 芯片(7)那一侧部位的柔性基板(I)和背离第二需屏蔽芯片(7)那一侧部位的柔性基板(I)分别向柔性基板(I)正面中间弯折,形成两个U型屏蔽部;两个U型屏蔽部各自的上方柔性基板(I)在高度方向上部分重叠,且第二个U型屏蔽部的上方柔性基板(I)在第一个U型屏蔽部的上方柔性基板(I)之上; 第一需屏蔽芯片(6)分布在第一个U型屏蔽部内,第二需屏蔽芯片(7)分布在第一个U型屏蔽部上方柔性基板(I)和第二个U型屏蔽部上方柔性基板(I)间; 弯折后的柔性基板(I)中的第一金属屏蔽层(2)至少将第一需屏蔽芯片(6)完全包覆在内,柔性基板(I)中的第二金属屏蔽层(3)将第二需屏蔽芯片(7)包覆在内。 Chip (7) of the side portion of the flexible substrate (I) and a screened chip away from the second (7) side portions of the flexible substrate (I), respectively, a front intermediate bent flexible substrate (I), to form two U two U-shaped upper portion of each of the shield above the flexible substrate (I) partially overlap in the height direction and above the second U-shaped shield portion of the flexible substrate (I) a first U-shaped portion of the shield; type shielding portion on a flexible substrate (I); a first shielding required chip (6) is distributed within the first U-shaped shield portion, the second chip need shield (7) located in a first portion of the U-shaped shield above the flexible substrate (I) and the second U-shaped upper shield portion between the flexible substrate (I); a first metallic shield (2) a flexible substrate (I) at least after the first folded in a screened chip (6) including completely covered, a second metallic shield layer of the flexible substrate (I), (3) the need to shield the second chip (7) the inner cladding.
2.如权利要求1所述的用于多屏蔽芯片的三维柔性基板封装结构,其特征在于:所述第一需屏蔽芯片(6)的背面与第一个U型屏蔽部的上方柔性基板(I)的内面焊接在一起。 The first shielding required chip (6) above the back surface of a flexible substrate with a first U-shaped shield portion (: 2. The flexible substrate as claimed in three-dimensional packaging structure of claim 1 for shielding the multi-chip claims, characterized in that I) welded to the inner surface.
3.如权利要求1或2所述的用于多屏蔽芯片的三维柔性基板封装结构,其特征在于:所述第二需屏蔽芯片(7)的背面与第二个U型屏蔽部的上方柔性基板(I)的内面焊接在一起。 As claimed in claim 1 for three-dimensional packaging structure of a flexible substrate multi-chip shield, wherein: said second flexible over a screened chip (7) and the back surface of the second portion of the U-shaped shield the inner surface of the substrate (I) are welded together.
4.如权利要求3所述的用于多屏蔽芯片的三维柔性基板封装结构,其特征在于:所述第二需屏蔽芯片(7)处于第一需屏蔽芯片(6)正上方,形成堆叠结构。 As claimed in claim flexible substrate for three-dimensional packaging structure of a multi-chip shield of claim 3, wherein: the second shielding required chip (7) in (6) above a first positive demand shielding chip, a stacked structure .
5.如权利要求4所述的用于多屏蔽芯片的三维柔性基板封装结构,其特征在于:第二个U型屏蔽部上方柔性基板(I)的外侧的那一面上贴装有普通芯片(8),且普通芯片(8)位于第一需屏蔽芯片(6)和第二需屏蔽芯片(7)上方,形成多芯片堆叠结构。 As claimed in claim flexible substrate for three-dimensional packaging structure of a multi-chip shield of claim 4, wherein: the second U-shaped upper portion of that surface of the outer shield of the flexible substrate (I) in ordinary chip-mounted ( 8), and a common chip (8) at the first required chip shield (6) and a second shielding required chip (7) above, a multi-chip stack structure is formed.
6.如权利要求1所述的用于多屏蔽芯片的三维柔性基板封装结构,其特征在于:在第一需屏蔽芯片(6)和第二需屏蔽芯片(7)底部填充有底填料(9)。 6. The three-dimensional structure of the flexible substrate 1 for packaging a multi-chip shielding claim, wherein: a first shielding required chip (6) and a second shielding required chip (7) having a bottom underfill filler (9 ).
7.如权利要求1所述的用于多屏蔽芯片的三维柔性基板封装结构,其特征在于:在第一个U型屏蔽部和第二个U型屏蔽部内填充有灌封料(10)。 7. The flexible substrate of claim packaging for three-dimensional structure of a multi-chip shield according to claim 1, wherein: is filled with a potting compound (10) in the first U-shaped shield portion and a second U-shaped shield portion.
8.如权利要求1所述的用于多屏蔽芯片的三维柔性基板封装结构,其特征在于:在上述两个U型屏蔽部的下方柔性基板(I)的外侧那一面上植有多个焊球(11),其中至少有一个焊球(11)与电连接第一金属屏蔽层(2)的接地焊盘连接;至少有一个焊球(11)与电连接第二金属屏蔽层(3)的接地焊盘连接。 As claimed in claim flexible substrate for three-dimensional packaging structure of a multi-chip shield according to claim 1, wherein: a plurality of welding the outer surface of the implant below the flexible substrate that (I) the two U-shaped shield portion balls (11), wherein at least one solder ball (11) and electrically connecting the first metallic shield (2) is connected to the ground pad; at least one solder ball (11) and electrically connected to the second metallic shield (3) ground pads are connected.
9.一种用于多屏蔽芯片的三维柔性基板封装结构的制作方法,其特征在于,包括下述步骤: 步骤一.提供柔性基板(I),所述柔性基板(I)中预设有第一金属屏蔽层(2)和第二金属屏蔽层(3);在柔性基板(I)中开贯通柔性基板(I)正反面的导通孔(4),在导通孔(4)内填充金属导电材料,通过导通孔(4)使得第一金属屏蔽层(2)与柔性基板(I)正反面上的接地焊盘电连接;在柔性基板(I)中开盲孔(5),在盲孔(5)中填充金属导电材料,通过盲孔(5)使得第二金属屏蔽层(3)与柔性基板(I)反面的接地焊盘电连接;导通孔(4)与第二金属屏蔽层(3)绝缘; 步骤二.在柔性基板(I)正面中间部位贴装第一需屏蔽芯片(6),使得第一需屏蔽芯片(6)的接地凸点与柔性基板(I)正面的接地焊盘连接;在柔性基板(I)反面的一侧部位贴装第二需屏蔽芯片(7),使得第二需屏蔽芯片(7)的接地凸点与柔性基板(I)反面的接地焊 The method of making a three-dimensional structure of the flexible substrate 9. A method for packaging a multi-chip shield, which is characterized by comprising the steps of: providing a flexible substrate in step (I), the flexible substrate (I) with a first preset a metallic shield (2) and a second metallic shield (3); in a flexible substrate (I), then through the flexible substrate (I) of the front and back surfaces of the via hole (4), filled in the via hole (4) metallic conductive material through the via holes (4) so ​​that the first metallic shield (2) and the flexible substrate (I) reverse surface of the ground pads are electrically connected; open blind bore (5) in the flexible substrate (I), a metallic conductive material is filled in a blind hole (5), (5) such that the second metallic shield (3) and the flexible substrate (I) negative ground pad electrically connected through vias; vias (4) and the second a metallic shield (3) insulation; step two in the front middle portion of the flexible substrate (I) required to mount the first chip shield (6), so that the need to shield the first chip (6) and the ground bumps flexible substrate (I) connecting the front ground pad; at a portion of the back side (I) a second flexible substrate mounting a screened chip (7), such that the need to shield the second chip (7) and ground bumps flexible substrate (I) negative ground welding 连接;在第一需屏蔽芯片(6)和第二需屏蔽芯片(7)底部填充底填料(9); 步骤三.将带有第二需屏蔽芯片(7)那一侧部位的柔性基板(I)向柔性基板(I)正面中间弯折,形成第一个U型屏蔽部,并且使得第二需屏蔽芯片(7)处于第一需屏蔽芯片(6)正上方,形成堆叠结构;将第一需屏蔽芯片(6)的背面与第一个U型屏蔽部的上方柔性基板(I)的内面焊接在一起; 步骤四.将背离第二需屏蔽芯片(7)那一侧部位的柔性基板(I)向柔性基板(I)正面中间弯折,形成第二个U型屏蔽部,使得第二个U型屏蔽部的上方柔性基板(I)位于第二需屏蔽芯片(7)上方,并且使得柔性基板(I)弯折后柔性基板(I)中的第一金属屏蔽层(2)至少将第一需屏蔽芯片(6)完全包覆在内,柔性基板(I)中的第二金属屏蔽层(3)将第二需屏蔽芯片(7)包覆在内;将第二需屏蔽芯片(7)的背面与第二个U型屏蔽部上方柔性基板(I)的内面焊 Connection; the first required chip shield (6) and a second shielding required chip (7) filling the bottom end of the filler (9); step three with the need to shield the second chip (7) that the side portion of the flexible substrate ( I) folding the front intermediate flexible substrate (I), form a first U-shaped shield portion, and the need to shield such that a second chip (7) in (6) above a first positive demand chip shield, form a stacked structure; the first the inner surface of the flexible substrate (I) is a U-shaped back surface of the first shielding portion above a required chip shield (6) are welded together;. step four departing from the need to shield the second chip (7) that the side portion of the flexible substrate (I) is bent to the front side intermediate flexible substrate (I), to form a second U-shaped shield portion, so that the upper portion of the second U-shaped shield flexible substrate (I) is in the second chip for an upper shield (7), and completely covers the first metal shielding layer (2) at least a first shielding required chip (6) such that the flexible substrate (I) after folding the flexible substrate (I) in the inner, flexible substrate (I), a second metal shield layer (3) the need to shield the second chip (7) the inner cladding; need to shield the back of the second chip (7) and a second U-shaped shield portion over the inner surface of the welded flexible substrate (I) is 在一起; 步骤五.在上述两个U型屏蔽部内的空间填充灌封料(10)进行塑封; 步骤六.在上述两个U型屏蔽部的下方柔性基板(I)的外侧那一面上植焊球(11),形成信号回路和电磁屏蔽回路;其中至少有一个焊球(11)与电连接第一金属屏蔽层(2)的接地焊盘连接;至少有一个焊球(11)与电连接第二金属屏蔽层(3)的接地焊盘连接。 Together; step five in the space of the two U-shaped shield portion potting material filling (10) of plastic; Step Six that the outside surface of the implant below the flexible substrate (I) of said two U-shaped portion of the shield. the solder balls (11), and a signal circuit is formed electromagnetic shielding loop; wherein at least one solder ball (11) connected to the metal shielding layer electrically connecting the first (2) of the ground pad; at least one solder ball (11) and electrically connecting the second metallic shield (3) is connected to the ground pad.
10.如权利要求9所述的用于多屏蔽芯片的三维柔性基板封装结构的制作方法,其特征在于: 步骤二中,第一需屏蔽芯片(6)和第二需屏蔽芯片(7)贴装完后,还包括:将普通芯片(8)贴装在柔性基板(I)反面背离第二需屏蔽芯片(7)的那一侧部位; 步骤四中,在进行形成第二个U型屏蔽部的弯折时,使普通芯片(8)位于第一需屏蔽芯片(6)和第二需屏蔽芯片(7)上方,形成多芯片堆叠结构。 As claimed in claim 9 for producing a three-dimensional multi-chip shield structure of the flexible substrate package, wherein: the step II, first a screened chip (6) and a second shielding required chip (7) attached Bahrain, further comprising: a common chip (8) mounted on the side portion of the flexible substrate (I) required to back away from the second chip shield (7); in step 4 is performed to form a second U-shaped shield when the bent portion of the common chip (8) at the first required chip shield (6) and the second mask for an upper die (7), forming a multi-chip stack structure.
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CN105813380B (en) * 2015-04-17 2018-04-20 深圳市环基实业有限公司 One kind led pcb board connection method
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5382829A (en) * 1992-07-21 1995-01-17 Mitsubishi Denki Kabushiki Kaisha Packaged microwave semiconductor device
US6281577B1 (en) * 1996-06-28 2001-08-28 Pac Tech-Packaging Technologies Gmbh Chips arranged in plurality of planes and electrically connected to one another
CN1756474A (en) * 2004-09-28 2006-04-05 夏普株式会社 RF module and manufacturing method thereof
CN101065842A (en) * 2004-12-02 2007-10-31 株式会社村田制作所 Electronic component and its manufacturing method
US7436055B2 (en) * 2005-12-16 2008-10-14 Advanced Semiconductor Engineering, Inc. Packaging method of a plurality of chips stacked on each other and package structure thereof
US7717628B2 (en) * 2008-01-14 2010-05-18 Korea Photonics Technology Institute System package using flexible optical and electrical wiring and signal processing method thereof
CN102254898A (en) * 2011-07-01 2011-11-23 中国科学院微电子研究所 Flexible substrate package-based shielding structure and manufacturing process thereof
CN103094256A (en) * 2011-11-08 2013-05-08 中国科学院微电子研究所 Sealing system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7425758B2 (en) * 2006-08-28 2008-09-16 Micron Technology, Inc. Metal core foldover package structures

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5382829A (en) * 1992-07-21 1995-01-17 Mitsubishi Denki Kabushiki Kaisha Packaged microwave semiconductor device
US6281577B1 (en) * 1996-06-28 2001-08-28 Pac Tech-Packaging Technologies Gmbh Chips arranged in plurality of planes and electrically connected to one another
CN1756474A (en) * 2004-09-28 2006-04-05 夏普株式会社 RF module and manufacturing method thereof
CN101065842A (en) * 2004-12-02 2007-10-31 株式会社村田制作所 Electronic component and its manufacturing method
US7436055B2 (en) * 2005-12-16 2008-10-14 Advanced Semiconductor Engineering, Inc. Packaging method of a plurality of chips stacked on each other and package structure thereof
US7717628B2 (en) * 2008-01-14 2010-05-18 Korea Photonics Technology Institute System package using flexible optical and electrical wiring and signal processing method thereof
CN102254898A (en) * 2011-07-01 2011-11-23 中国科学院微电子研究所 Flexible substrate package-based shielding structure and manufacturing process thereof
CN103094256A (en) * 2011-11-08 2013-05-08 中国科学院微电子研究所 Sealing system

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