CN103546154B - The bit extension system of Analog-digital Converter and bit extended method thereof - Google Patents

The bit extension system of Analog-digital Converter and bit extended method thereof Download PDF

Info

Publication number
CN103546154B
CN103546154B CN201210247948.8A CN201210247948A CN103546154B CN 103546154 B CN103546154 B CN 103546154B CN 201210247948 A CN201210247948 A CN 201210247948A CN 103546154 B CN103546154 B CN 103546154B
Authority
CN
China
Prior art keywords
analog
signal
voltage
digital converter
simulation scale
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201210247948.8A
Other languages
Chinese (zh)
Other versions
CN103546154A (en
Inventor
官明志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Good Will Instrument Co Ltd
Original Assignee
Good Will Instrument Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Good Will Instrument Co Ltd filed Critical Good Will Instrument Co Ltd
Priority to CN201210247948.8A priority Critical patent/CN103546154B/en
Publication of CN103546154A publication Critical patent/CN103546154A/en
Application granted granted Critical
Publication of CN103546154B publication Critical patent/CN103546154B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

The present invention extends system and bit extended method thereof about the bit of a kind of Analog-digital Converter, the analogue signal of input is mainly zoomed into the Simulation scale-up signal of multiple gain multiplying power by its bit extended method with a signal amplification module, and the voltage range whether preset more than with the Simulation scale-up signal of a comparator more various gain multiplying power, and select maximum with gain multiplying power and not less than voltage range Simulation scale-up signal to input analog-digital converter and be sampled and be quantified as numerical data, then move to right this numerical data according to corresponding gain multiplying power;So, it is not required to adjust the gain multiplying power of amplifier, it is to avoid produce noise, and sampling, quantization and the judgement of electric pressure can be exempted, and be able to the comparator that cost compares analog-digital converter much lower and complete.

Description

The bit extension system of Analog-digital Converter and bit extended method thereof
Technical field
The present invention extends system about the bit of a kind of Analog-digital Converter, and espespecially a kind of overall system architecture is relatively simplified and lower-cost Analog-digital Converter bit extension system.
Background technology
Intermediate-freuqncy signal (Intermediate frequency, IF) is primarily referred to as a signal source through being produced after local oscillator signal smear (mixing), and it is primarily used to this signal source raising frequency or is downconverted to specific frequency.After receiving terminal receives, it is necessary to after using the mode of frequency reducing to be down to intermediate-freuqncy signal the signal source of reception, then carry out signal analysis work.
nullThere is the electronic installation of information extraction function,Such as spectrum analyzer etc.,In the transmitting procedure of intermediate-freuqncy signal,Most likely use an analog-digital converter (Analog to Digital Converter,ADC) output digital data after the voltage of analog if signal being converted to power and quantified,And the conversion formula of power is by the crest voltage inputting string formula (sinusoidal) waveform: this formula of P=20 × log (V)+10(be with relative 50ohm system for,And V is crest voltage),Therefore,The performance number that input voltage value quantifies out with analog-digital converter can become logarithm (logarithm) relation,As shown in Figure 6,Be can be seen that by the loaarithmic curve in figure,The slope of loaarithmic curve reduces with magnitude of voltage and increases,Therefore the signal that magnitude of voltage is less,Its identical voltage difference is after power quantization,The power difference corresponded to is bigger,As shown in below table:
Magnitude of voltage (volt) Performance number (dBm)
V=1 P=10
V=2 P=16
V=3 P=19.5
V=4 P=22
When magnitude of voltage is risen to 2 volts by 1 volt, power value difference is 6dB;When magnitude of voltage is risen to 3 volts by 2 volts, then power difference is 3.5dB;Therefore, to reduce transformed error produced by the power by linear voltage conversion to logarithmic axis, optimal mode is exactly to do the finest and the smoothest quantization on the voltage axis, it means that the bit number of analog-digital converter must improve;It addition, to avoid the several value of minimum used after voltage quantization as far as possible, because from upper form, minimum several magnitudes of voltage can cause bigger power difference.
Because the bit number of analog-digital converter output digital data is limited to the height of its sampling frequency, in existing technology, sampling frequency height is to the analog-digital converter being sufficiently used for intermediate frequency sample of signal quantization, at most can only export the numerical data of 12 bits to 16 bits, and price is the most fairly expensive.For analog-digital converter with 16 bits, dynamic range (the dynamic range of about 16 × 6.02=96.32dB can be provided in theory, and the scope of maximum denotable numeral and the minimum numeral shown), for the spectrum analyzer that a design meets 100dB dynamic range, this bit number seems enough, but compare aforementioned mentioned, the scope of this 96.32dB must all be used, just it is provided that the dynamic range close to 100dB, so inherently using minimum several voltage quantization value, bigger power difference value will be produced in this place, and we can calculate, if the power transformed error of maximum is set as 0.22dB, then have to just can realize by an analog-digital converter that have 23 bits.Therefore have pointed out now the bit extension system of a kind of Analog-digital Converter, its cardinal principle is first to amplify analogue signal little for magnitude of voltage to input to analog-digital converter again, four kinds of different multiplying as shown in Figure 6, quantified by analog-digital converter sampling again, and move to right the several bit of numerical data according to enlargement ratio, to reach to extend bit, improve precision of measurement.
Refer to Fig. 7, U.S. Patent No. 5,844, No. 512 patents of invention (hereinafter referred to as 512 patent) are an example, this 512 patent be an analogue signal is amplified with the amplifier 81 of a gain adjustable multiplying power after input to an analog-digital converter 82, after the analogue signal before amplifying being sampled and quantified with a peak detector 831 being set with multiple electric pressure again, then adjust the gain multiplying power of this amplifier 81 according to the electric pressure belonging to quantized value with a gain controller 832;The low person of quantized value grade, then increase the gain multiplying power of amplifier 81, quantized value grade height person, then reduce the gain multiplying power of amplifier 81, please refer to Fig. 8, peak detector 831 and gain controller 832 in the quantized value of analogue signal sample point less than grade 1(level 1) magnitude of voltage time, the gain multiplying power of this amplifier is adjusted to 8(23), when the quantized value of analogue signal sample point is between grade 1 and 2, then the gain multiplying power of this amplifier is adjusted to 4(22), by that analogy, and with a bit correction module 84 multiplying power that the numerical data exported by analog-digital converter 82 is amplified according to the analog input signal of its correspondence moves to right, as amplified 8 times of persons, numerical data is then moved to right 3 bits by bit correction module 84, to record the quantized value before position is amplified;So, due to the most movable 3 bits of numerical data, the numerical data is made to can be used to represent total bit number of quantized value, ratio many 3 bits of numerical data bit number of actually analog-digital converter 82 output, reach bit extension and refine and measure the purpose of precision;But the amplifier 81 of adjustable gain multiplying power need to be used owing to the bit of above-mentioned Analog-digital Converter extends system, and amplifier 81 gain multiplying power change time, noise (such as whisker-like noise) can be produced, therefore can reduce the measurement precision of analog-digital converter 82.
nullFor this,U.S. Patent No. 7,030,No. 800 patents of invention propose bit extension system (hereinafter referred to as 800 patent) of the Analog-digital Converter of a kind of multi-channel type as shown in Figure 9,This 800 patent does not use the amplifier of adjustable gain multiplying power,And after analog input signal is first passed through the amplifier 91 of multiple fixed gain multiplying power,Input multiple analog-digital converter 92 with same interpretation degree bit respectively,It is connected to this message selector 93 of a bit correction module 94 with a message selector 93 again and judges not occur the analog-digital converter 92 of overflow (over float),The most therefrom select to be correspondingly connected to the numerical data of analog-digital converter 92 output of the highest amplifier of enlargement ratio 91,This bit correction module 94 is then according to the bit number that the enlargement ratio corresponding to selected analog-digital converter 92 is corresponding,By these several bit numbers of numerical data gt;So can not use the amplifier of adjustable gain multiplying power, the noise that gain multiplying power is caused is adjusted to exempt, but this system needs to use multiple analog-digital converter 92, and analog-digital converter 92 always cost of manufacture is high, and have certain response delay time, therefore when analog-digital converter 92 occurs overflow, analogue signal after needing to wait for one period of response time, just can be continued to, input signal so will be made to miss.
The another kind of embodiment of this 800 patent is as shown in Figure 10 again, it amplifies an analogue signal with the amplifier 95 of multiple different gains multiplying powers, and with an analog-digital converter 96, the analogue signal before amplifying is sampled and quantifies, and sample the electric pressure (as a example by four kinds of electric pressures) belonging to quantized value by a switch controller 97 according to analog-digital converter 96, first switch and switch the 98 amplified analog signal inputs exported by the amplifier 98 of one of them gain multiplying power to another for the analog-digital converter 99 quantified;Thus, when the magnitude of voltage of this analogue signal is less, this switching switch 98 i.e. switches the analogue signal input bigger by enlargement ratio;When analog signal voltage value is bigger, then switch the analogue signal input less by enlargement ratio, can avoid equally using adjustable gain multiplying power switched amplifier person because adjusting the noise that gain multiplying power is caused, but owing to this embodiment still needs to sampling, quantifies and judge electric pressure, therefore still need to use at least two analog-digital converters 96,99, overall system architecture is the most not very simplified, and cost cannot more reduce.
Furthermore, above-mentioned peakvalue's checking and gain controller 83, analog-digital converter 82, 96, 99 and the sampling that all needs of switch controller 97, quantify, except making in addition to judging to answer the sample point of enlargement ratio different from for the analog-digital converter sample point of output digital data, sampling, quantify and switch the burst length needed for switch, more can make two analog-digital converters 96 in analogue signal input peakvalue's checking and gain controller 83 and analog-digital converter 82(or 800 patents, 99) time cannot synchronize, make the displacement number postponing to judge to cause part number data inconsistent with actual sampling value enlargement ratio.
In addition, owing to amplifier has the restriction of gain bandwidth ratio, the highest person of gain, its frequency range is the most relatively low, and all to precision is accurate to 0.22dB person, needs 23 bits as mentioned previously, and the bit extension system of above-mentioned Analog-digital Converter then needs to use 29Amplifier again extends 9 bits, and the frequency range of the amplifier of this gain multiplying power does not applies and is used in intermediate-freuqncy signal, therefore the bit of above-mentioned Analog-digital Converter extension system accuracies is limited.
In sum, the bit extension system of Analog-digital Converter in early days can cause noise to affect measuring accuracy because setting amplifier multiplying power, and the bit extension system improveing Analog-digital Converter in the way of multichannel amplification still can have the problem of spillover because of the analog-digital converter response time, and cost increases;And the signal before amplifying is carried out sample and quantifies to determine gain multiplying power person again, the most at least need two analog-digital converters, therefore the existing bit extension system changed than numeral still needs to improvement.
Summary of the invention
Because the bit extension system of above-mentioned Analog-digital Converter can produce noise, spillover and improve the technological deficiency of cost, the main object of the present invention is to propose bit extension system and the bit extended method thereof of a kind of Analog-digital Converter.
The technical way that above-mentioned purpose to be reached is used is the bit extension system making this Analog-digital Converter, and includes:
One signal amplification module, after it has an input end of analog signal and a multiple Simulation scale-up signal output part, and the analogue signal inputted by this input end of analog signal is amplified according to multiple different gain multiplying power, is exported by the plurality of Simulation scale-up signal output part respectively;
One channel switch switch, it has multiple input, an outfan and a switching control end, and multiple inputs of this channel switch switch are connected with multiple Simulation scale-up signal output parts of this signal amplification module respectively, and the wherein input for switching channels switching switch turns on this outfan;
One analog-digital converter, it has an input and an outfan, and the outfan that the input of this analog-digital converter switchs with this channel switch is connected, and the outfan of this analog-digital converter then exports a numerical data;
One bit correction module, it is connected with the outfan of this analog-digital converter, and the numerical data that this analog-digital converter exports moves to right multiple bit number;
One channel selector, it is connected with multiple Simulation scale-up signal output parts of this signal amplification module and the switching control end of this channel switch switch, and it is set with a voltage range, this voltage range whether is exceeded with comparator more the plurality of Simulation scale-up signal output part output voltage, and switch the switching control end of this channel switch switch, make gain multiplying power the highest and output voltage turns on this analog-digital converter less than the Simulation scale-up signal output part of this voltage range, and set, according to selected gain multiplying power, the bit number that this bit correction module moves to right.
Gain multiplying power adjustable signal amplification module is not used due to the present invention, therefore noise will not be caused because adjusting gain multiplying power, and whether the present invention exceedes voltage range with the output voltage of the analogue signal after comparing amplification and judges to answer the multiplying power of gain, it is not required to set multiple electric pressure, also sampling it is not required to, quantify and computing judges electric pressure, it is able to cost compare the cheap a lot of comparator of analog-digital converter and complete the comparison of voltage range, therefore the present invention is able on the premise of being not added with cost of manufacture, improve bit extension system erroneous judgement and the defect of spillover of existing Analog-digital Converter.
Again, in view of the extension bit number (i.e. available amplifier maximum gain multiplying power) of the bit extension system of above-mentioned Analog-digital Converter is limited by gain bandwidth ratio, the bit extension system in order to improve Analog-digital Converter further that it is another object of the present invention to extends the restriction of bit number, therefore make above-mentioned signal amplification module include the amplifier of multiple grades of concatenations, and connect this input end of analog signal with the input of first order amplifier, and using the outfan of amplifiers at different levels as the plurality of Simulation scale-up signal output part, analogue signal is made to reach high-gain multiplying power through the amplifier amplification of multiple grades of low gain multiplying powers, to improve the highest-gain multiplying power (i.e. extension bit number) of system on the premise of taking into account amplifier frequency range, to improve precision of measurement.
nullA further object of the present invention,It it is the effect being actually reached analog-digital converter time synchronized in order to further provide for the judgement time of channel selector and analogue signal,And be respectively provided with a delay filter and switch between corresponding input in each Simulation scale-up signal output part and this channel switch,And Simulation scale-up signal is set as transmission line time delay from this signal amplification module transmission to this channel selector required time by each delay filter,And channel selector is compared voltage range completing and switches this channel switch switch required time and be set as an operating time,And will export after this transmission line time delay of Simulation scale-up signal delay inputted and this operating time,Such judged result that i.e. can ensure that this channel selector and Simulation scale-up signal actually enter the time synchronized of analog-digital converter,Further reduce because postponing the erroneous judgement judging to cause.
The technical way that above-mentioned purpose to be reached is used is that the bit extended method of the bit extension system making this Analog-digital Converter includes following steps:
Receive an analogue signal;
This analogue signal is zoomed into multiple Simulation scale-up signal through different gains multiplying power;
The voltage range that relatively whether the voltage of the plurality of Simulation scale-up signal is preset more than one;
Select gain multiplying power maximum and voltage is less than the Simulation scale-up signal input analog-digital converter of this predetermined voltage range, and export a numerical data after being sampled and quantifying;
According to the bit number corresponding to enlargement ratio of the Simulation scale-up signal of input analog-digital converter, and this numerical data is moved to right this bit number.
So compared output voltage whether to exceed the mode of predetermined voltage range and determine the gain multiplying power of analog digital data, except being not required to adjust gain multiplying power, to avoid noise to produce, also can remove sampling from, quantify and the step of electric pressure judgement, and be able to cost and compare the cheap a lot of comparator of analog-digital converter and reach, reduce cost of manufacture.
Accompanying drawing explanation
Fig. 1 is the circuit box schematic diagram of the present invention.
Fig. 2 is the circuit diagram of Fig. 1 channel selector.
Fig. 3 is the circuit diagram of Fig. 1 delay filter.
Fig. 4 is the flow chart of steps of bit extended method of the present invention.
Fig. 5 is the bit displacement diagram of Fig. 1 bit correction module.
Fig. 6 is the curve chart of digital analog converter conversion voltage and power.
Fig. 7 is the circuit box schematic diagram of the bit extension system of existing a kind of Analog-digital Converter.
Fig. 8 is Fig. 7 peakvalue's checking and gain controller and the analog-digital converter schematic diagram to the sample point of analogue signal.
Fig. 9 is the circuit box schematic diagram of the bit extension system of existing another kind of Analog-digital Converter.
Figure 10 is the circuit box schematic diagram of the bit extension system of another Analog-digital Converter existing.
Detailed description of the invention
Hereinafter coordinate graphic and presently preferred embodiments of the present invention, the present invention is expanded on further by reaching the technological means that predetermined goal of the invention is taked.
Referring to Fig. 1, the bit extension system of Analog-digital Converter of the present invention includes:
One signal amplification module 10, it has an input end of analog signal and multiple Simulation scale-up signal output part 11, and after the analogue signal inputted by this input end of analog signal is amplified according to multiple different gain multiplying power, exported by the plurality of Simulation scale-up signal output part respectively, in the present embodiment, this signal amplification module 10 includes the amplifier 12 of multiple grades of fixed gain multiplying powers and concatenation, this input end of analog signal is connected with the input of first order amplifier, and using the outfan of amplifiers at different levels as the plurality of Simulation scale-up signal output part 11;
One channel switch switch 20, it has multiple input, an outfan and a switching control end 21, and multiple inputs of this channel switch switch 20 are connected with multiple Simulation scale-up signal output parts 11 of this signal amplification module 10 respectively, this switching control end 21 turns on this outfan for a wherein input of switching channels switching switch;
One analog-digital converter 30, it has an input and an outfan, and the input of this analog-digital converter 30 is connected with the outfan of this channel switch switch 20, and the outfan of this analog-digital converter 30 then exports a numerical data;
One bit correction module 40, it is connected with the outfan of this analog-digital converter 30, so that the numerical data that this analog-digital converter 30 exports is moved to right multiple bit number, in the present embodiment, this bit correction module 40 has checking linearity unit 41 and a bit displacement unit 42, this checking linearity unit 41 is according to the quantized value representated by (Look-up table) interpretation analog-digital converter 30 output digital data of tabling look-up on, and numerical data is then moved to right multiple bit (reducing quantized value according to gain multiplying power) and exports afterwards by this bit displacement unit 42;
One channel selector 50, it is connected with multiple Simulation scale-up signal output parts 11 of this signal amplification module 10 and the switching control end 21 of this channel switch switch, and it is set with a voltage range, and whether exceed this voltage range with comparator more the plurality of Simulation scale-up signal output part output voltage, and switch the switching control end 21 of this channel switch switch 20, make gain multiplying power the highest and output voltage turns on this analog-digital converter 30 less than the Simulation scale-up signal output part 11 of this voltage range, and set this bit correction module 40 according to selected gain multiplying power and move to right the bit number of numerical data;
Multiple delay filters 70, it is connected to the plurality of Simulation scale-up signal output part 11 and switchs with channel switch between 20 corresponding inputs, and Simulation scale-up signal transmitted to this channel selector 50 required time from this signal amplification module 10 be set as transmission line time delay, and channel selector 50 is compared voltage range completing and switches this channel switch and switch 20 required times and be set as an operating time, and will export after this transmission line time delay of Simulation scale-up signal delay inputted and this operating time, coordinate the most further refering to Fig. 3, due to above-mentioned transmission line time delay and operating time can estimated go out, therefore each delay filter 70 can be constituted with multiple inductance 71 and electric capacity 72 connection in series-parallel, its time delay is
Coordinate the most further refering to Fig. 2, this channel selector 50 includes multiple voltage range identifying unit 51 and an encoder 52, the plurality of voltage range identifying unit 51 is connected to a reference voltage source 60 being provided with high and low critical voltage value, and it is respectively connecting to the plurality of Simulation scale-up signal output part 11, and include two comparators 53 and a nor gate 54(NOR Gate), the outfan of this two comparator 53 is connected to this nor gate 54, and the backward end of a wherein comparator 53 is connected to the high critical voltage V that this reference voltage source 60 providesH, and forward end is connected to the Simulation scale-up signal output part 11 of correspondence, another comparator 53 is connected to, with forward end, the low critical voltage V that this reference voltage source 60 providesL, and backward end is connected to the Simulation scale-up signal output part 11 of correspondence, the outfan of this nor gate 54 is then connected to this encoder 52, in corresponding Simulation scale-up signal output part 11 output voltage between this high and low critical voltage VH、VLDuring set voltage range, this nor gate 54 is made to export high potential, higher than this high critical voltage VHOr less than this low critical voltage VLTime, this nor gate 54 is made to export 0 current potential, this encoder 52 is after the high potential receiving voltage range identifying unit 51 output or 0 current potential, output one represents the highest and output high-potential voltage scope identifying unit 51 the digital coding of corresponding gain multiplying power and gives this switching control end 21, the highest with this gain multiplying power and be less than high and low critical voltage V through voltage range identifying unit 51 to switch the outfan of this channel switch switch 20H、VLThe conducting of Simulation scale-up signal output part, in the present embodiment, be as a example by three voltage range identifying units 51, and the voltage range identifying unit 51 that corresponding amplifier gain multiplying power is 1 be set as " 01 " digital coding;Gain multiplying power be 24 power persons be set as " 10 ";Gain multiplying power be 25 powers 9 powers of 2 (the actually gain multiplying power be) person be set as " 11 ";When three voltage range identifying units 51 all export high potential, then this encoder 52 can export " 11 " control channel switch and switch the Simulation scale-up signal of 9 powers that 20 handoff gain multiplying powers are 2 and turn on outfan;If the voltage range identifying unit 51 of 5 powers that corresponding gain multiplying power is 2 exports 0 current potential and the voltage range identifying unit 51 of 4 powers that gain multiplying power is 2 exports high potential, then encoder 52 exports " 10 ", the Simulation scale-up signal output part 11 making 4 powers of amplification 2 switchs 20 outfan conductings with channel switch, the rest may be inferred, therefore this encoder 52 uses gate to reach.
Also, this signal amplification module 10 of the present embodiment comprises the amplifiers 12 of three concatenations, is used the amplifier of low range to concatenate and reached the effect of high magnification, and to make the gain multiplying power of wherein first order amplifier be 1, the gain multiplying power of second level amplifier is 24, the third level be 25Person, then the amplifier 12 gain multiplying power of last progression can reach 29Times, i.e. extend 9 bits, with the use of the analog-digital converter of exportable 14 to 16 bit numerical datas, total bit number just can arrive 23 to 25 bits, so that the measurement precision of low-voltage analogue signal is accurate to 0.22dB, has high precision.
Coordinating refering to Fig. 4 the most further, the bit extended method of the bit extension system of Analog-digital Converter of the present invention includes following steps:
Receive analogue signal S11;
This analogue signal is zoomed into multiple Simulation scale-up signal S12 through different gains multiplying power;
Voltage range S13 that relatively whether the voltage of the plurality of Simulation scale-up signal is preset more than one, in the present embodiment, this voltage range comprises a high critical voltage value and a low critical voltage value, and analogue signal and a defeated V of high critical voltageHEnter a comparator 53, and whether compare this analogue signal higher than this high critical voltage value;And this analogue signal and a low critical voltage VLInput another comparator 53, and whether compare this analogue signal less than this low critical voltage value;
Select gain multiplying power maximum and voltage is less than the Simulation scale-up signal input analog-digital converter 30 of this predetermined voltage range, and export numerical data S14 after being sampled and quantifying;
According to the bit number corresponding to enlargement ratio of input analog-digital converter 30 Simulation scale-up signal, and this numerical data is moved to right this bit number S15.
Again further referring to Fig. 5, the present embodiment expands to as a example by the numerical data of 23bit by the analog digital data by 14 bits, when switching is by the analogue signal input analog-digital converter 30 that gain multiplying power is 1 times, the analog signal voltage value representing input at present is the biggest, and the numerical data of 14 bits enough precise quantifications input analogue signal at present, therefore not amplified analog signal, this bit correction module 40 does not carries out displacement to the numerical data of this analog-digital converter 30 output, and its numerical data is filled into 0 bit of 9 bits, fill the binary bit quantized value of 23 bit numbers;In like manner, it is 2 when switching by gain multiplying power4When analogue signal again inputs analog-digital converter 30, then it represents that the analog signal voltage value of input needs to amplify 2 at present4Times, just be enough to this analogue signal of numerical data precise quantification of 14 bits, therefore analogue signal is amplified 24Times, and moved to right, by bit correction module 40, numerical data 4 bit that analog-digital converter 30 exports, and fill into 0 bit of 5 bits;In like manner, it is 2 when switching by gain multiplying power5Times (actual amplify totally 29When analogue signal again) inputs analog-digital converter 30, then it represents that analogue signal need to amplify 29Times, and this bit correction module 40 move to right analog-digital converter 30 output numerical data 9 bit number, reach to expand to the analog-digital converter exporting 14 bit numerical datas the effect of 23 bits.
In sum, the present invention does not use the adjustable amplifier of gain multiplying power, avoid beyond noise generation, again with judge multiple gain multiplying power amplify after the voltage of Simulation scale-up signal whether in predetermined voltage range, therefore directly can make comparisons with height critical voltage with the comparator of low cost again and so reach, entirety only uses an analog-digital converter, and the more bit without multi-channel type Analog-digital Converter extends system high cost the most still can the defect of spillover;And the present invention also makes channel selector judge, and time of result and Simulation scale-up signal are actually reached the time synchronized of analog-digital converter, further eliminate the erroneous judgement postponing to judge to cause, furthermore, the present invention makes again overall gain multiplying power not limited by the gain bandwidth ratio of amplifier, the bit extension system making Analog-digital Converter can extend to 23 to 25 bits, has pinpoint accuracy.
The above is only presently preferred embodiments of the present invention, not the present invention is done any pro forma restriction, although the present invention is disclosed above with preferred embodiment, but it is not limited to the present invention, any those skilled in the art, in the range of without departing from technical solution of the present invention, when the technology contents of available the disclosure above makes a little change or is modified to the Equivalent embodiments of equivalent variations, in every case it is the content without departing from technical solution of the present invention, any simple modification above example made according to the technical spirit of the present invention, equivalent variations and modification, all still fall within the range of technical solution of the present invention.

Claims (8)

1. the bit extension system of an Analog-digital Converter, it is characterised in that this bit extension system includes:
One signal amplification module, it has an input end of analog signal and multiple Simulation scale-up signal output part, And after the analogue signal inputted by this input end of analog signal is amplified according to multiple different gain multiplying power, respectively Exported by the plurality of Simulation scale-up signal output part;
One channel switch switch, it has multiple input, an outfan and a switching control end, and this frequency Road switches the multiple inputs switched multiple Simulation scale-up signal output parts respectively with this signal amplification module and connects Connecing, this switching control end turns on outfan for a wherein input of switching channels switching switch;
One analog-digital converter, it has an input and an outfan, this analog-digital converter defeated Entering end to be connected with the outfan of this channel switch switch, the outfan of this analog-digital converter then exports a number Digital data;
One bit correction module, it is connected with the outfan of this analog-digital converter, and by this simulation numeral The numerical data of transducer output moves to right multiple bit number;
One channel selector, itself and multiple Simulation scale-up signal output parts of this signal amplification module and this channel The switching control end of switching switch connects, and is set with a voltage range, with the more the plurality of simulation of comparator Amplify whether signal output part output voltage exceedes this voltage range, and switch the switching of this channel switch switch Control end, make gain multiplying power the highest and output voltage is less than the Simulation scale-up signal output part of this voltage range Turn on this analog-digital converter, and set this bit correction module according to selected gain multiplying power and move to right Bit number.
The bit extension system of Analog-digital Converter the most according to claim 1, it is characterised in that this letter Number amplification module includes multiple grades of fixed gain multiplying powers and the amplifier of concatenation, and with first order amplifier Input connects this input end of analog signal, and using the outfan of amplifiers at different levels as the plurality of Simulation scale-up Signal output part.
The bit extension system of Analog-digital Converter the most according to claim 1 and 2, it is characterised in that The bit extension system of this Analog-digital Converter is respectively provided with a delay filter and exports in each Simulation scale-up signal Between the input of end and this channel switch switch correspondence, and Simulation scale-up signal certainly should by each delay filter Signal amplification module transmission to this channel selector required time is set as transmission line time delay, and will frequency Track selector compares voltage range completing and switches this channel switch switch required time when being set as an operation Between, and will export after this transmission line time delay of Simulation scale-up signal delay inputted and this operating time.
The bit extension system of Analog-digital Converter the most according to claim 1 and 2, it is characterised in that This channel selector includes:
Multiple voltage range identifying units, it is connected to a reference voltage being provided with high and low critical voltage value Source, and it is respectively connecting to the plurality of Simulation scale-up signal output part, and include two comparators and a nor gate, The outfan of this two comparator is connected to this nor gate, and the backward end of a wherein comparator is connected to this reference The high critical voltage that voltage source provides, and forward end is connected to the Simulation scale-up signal output part of correspondence, another Comparator is connected to, with forward end, the low critical voltage that this reference voltage source provides, and backward end is connected to correspondence Simulation scale-up signal output part, with in corresponding Simulation scale-up signal output part output voltage between this height, During voltage range set by low critical voltage, this nor gate is made to export high potential, higher than this high critical voltage Or during less than this low critical voltage, make this nor gate export 0 current potential;And
One encoder, it is connected with the outfan of the plurality of voltage range identifying unit nor gate, and in reception Voltage range identifying unit output high potential or 0 current potential after, output one represents correspondence gain multiplying power the highest and The digital coding of output high-potential voltage scope identifying unit gives this switching control end, to switch this channel switch The outfan of switch is the highest with this gain multiplying power and is less than high and low critical voltage through voltage range identifying unit Simulation scale-up signal output part conducting.
The bit extension system of Analog-digital Converter the most according to claim 3, it is characterised in that this frequency Track selector includes:
Multiple voltage range identifying units, it is connected to a reference voltage being provided with high and low critical voltage value Source, and it is respectively connecting to the plurality of Simulation scale-up signal output part, and include two comparators and a nor gate, The outfan of this two comparator is connected to this nor gate, and the backward end of a wherein comparator is connected to this reference The high critical voltage that voltage source provides, and forward end is connected to the Simulation scale-up signal output part of correspondence, another Comparator is connected to, with forward end, the low critical voltage that this reference voltage source provides, and backward end is connected to correspondence Simulation scale-up signal output part, high and low between this in corresponding Simulation scale-up signal output part output voltage During voltage range set by critical voltage, make this nor gate export high potential, higher than this high critical voltage or During less than this low critical voltage, this nor gate is made to export 0 current potential;And
One encoder, it is connected with the outfan of the plurality of voltage range identifying unit nor gate, and in reception Voltage range identifying unit output high potential or 0 current potential after, output one represents correspondence gain multiplying power the highest and The digital coding of output high-potential voltage scope identifying unit gives this switching control end, to switch this channel switch The outfan of switch is the highest with this gain multiplying power and is less than high and low critical voltage through voltage range identifying unit Simulation scale-up signal output part conducting.
The bit extension system of Analog-digital Converter the most according to claim 5, it is characterised in that respectively prolong Wave filter comprises multiple inductance and electric capacity connection in series-parallel late.
7. an Analog-digital Converter bit extension system bit extended method, it is characterised in that comprise with Lower step:
Receive an analogue signal;
This analogue signal is zoomed into multiple Simulation scale-up signal through different gains multiplying power;
The voltage range that relatively whether the voltage of the plurality of Simulation scale-up signal is preset more than one;
Select gain multiplying power maximum and voltage is simulated less than the Simulation scale-up signal input of this predetermined voltage range Digital converter, and export a numerical data after being sampled and quantifying;
According to the bit number corresponding to enlargement ratio of input analog-digital converter Simulation scale-up signal, and incite somebody to action This numerical data moves to right this bit number.
The bit extended method of the bit extension system of Analog-digital Converter the most according to claim 7, its Being characterised by, whether the voltage of aforementioned comparison the plurality of Simulation scale-up signal exceedes in the step of this voltage range, This voltage range comprises a high critical voltage value and a low critical voltage value, and analogue signal and a high critical electricity Pressure input one comparator, and whether compare this analogue signal higher than this high critical voltage value;And this analogue signal Input another comparator with a low critical voltage, and whether compare this analogue signal less than this low critical voltage value.
CN201210247948.8A 2012-07-17 2012-07-17 The bit extension system of Analog-digital Converter and bit extended method thereof Active CN103546154B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210247948.8A CN103546154B (en) 2012-07-17 2012-07-17 The bit extension system of Analog-digital Converter and bit extended method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210247948.8A CN103546154B (en) 2012-07-17 2012-07-17 The bit extension system of Analog-digital Converter and bit extended method thereof

Publications (2)

Publication Number Publication Date
CN103546154A CN103546154A (en) 2014-01-29
CN103546154B true CN103546154B (en) 2016-08-10

Family

ID=49969274

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210247948.8A Active CN103546154B (en) 2012-07-17 2012-07-17 The bit extension system of Analog-digital Converter and bit extended method thereof

Country Status (1)

Country Link
CN (1) CN103546154B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105573365B (en) * 2015-12-16 2017-11-07 西安空间无线电技术研究所 A kind of temperature-adjusting circuit of spaceborne rubidium clock
CN106441504B (en) * 2016-11-09 2018-10-09 珠江水利委员会珠江水利科学研究院 A kind of Modulation Continuous Wave Radar water level telemetering device and method
CN109976222A (en) * 2019-04-16 2019-07-05 西安建筑科技大学 A kind of SCM Based A/D acquisition method and device
CN113285716A (en) * 2021-05-25 2021-08-20 中北大学 Large dynamic range signal amplification and high-resolution acquisition circuit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5844512A (en) * 1997-07-28 1998-12-01 Hewlett-Packard Company Autoranging apparatus and method for improved dynamic ranging in analog to digital converters
US7030800B2 (en) * 2002-01-30 2006-04-18 Advantest Corporation Analog-to-digital conversion apparatus and method
TW200830685A (en) * 2007-01-03 2008-07-16 Good Will Instr Co Ltd Auto-switching circuit of power supply circuit and power supply circuit capable of auto switching
CN101431334A (en) * 2007-11-06 2009-05-13 瑞昱半导体股份有限公司 Time alternation type analog-to-digital converter and its self-emendation method
CN101478310A (en) * 2007-12-31 2009-07-08 财团法人工业技术研究院 Comparison device and analog-to-digital converter using the same
CN202737848U (en) * 2012-07-17 2013-02-13 固纬电子实业股份有限公司 Analog-digital conversion bit expansion system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5844512A (en) * 1997-07-28 1998-12-01 Hewlett-Packard Company Autoranging apparatus and method for improved dynamic ranging in analog to digital converters
US7030800B2 (en) * 2002-01-30 2006-04-18 Advantest Corporation Analog-to-digital conversion apparatus and method
TW200830685A (en) * 2007-01-03 2008-07-16 Good Will Instr Co Ltd Auto-switching circuit of power supply circuit and power supply circuit capable of auto switching
CN101431334A (en) * 2007-11-06 2009-05-13 瑞昱半导体股份有限公司 Time alternation type analog-to-digital converter and its self-emendation method
CN101478310A (en) * 2007-12-31 2009-07-08 财团法人工业技术研究院 Comparison device and analog-to-digital converter using the same
CN202737848U (en) * 2012-07-17 2013-02-13 固纬电子实业股份有限公司 Analog-digital conversion bit expansion system

Also Published As

Publication number Publication date
CN103546154A (en) 2014-01-29

Similar Documents

Publication Publication Date Title
CN103546154B (en) The bit extension system of Analog-digital Converter and bit extended method thereof
CN100492912C (en) Signal processing method and device
CN104242935B (en) A kind of bearing calibration of SAR ADC sectional capacitance mismatches
CN112003620A (en) Pipeline successive approximation type ADC (analog to digital converter) bit weight background calibration system and method
US7405683B1 (en) Extending the dynamic range in an energy measurement device
CN103532554A (en) Capacitor array and capacitor array layout design method
CN109150183A (en) The Capacitor Mismatch Calibration of SAR-ADC based on metastable state detection
CN201393203Y (en) Power amplifier temperature compensation device
CN105119603A (en) Pipeline successive-approximation analog-to-digital converter
CN112254846A (en) Pressure detection device, pressure detection method thereof and electronic equipment
CN104579347A (en) Analog-to-digital converter
CN103529379B (en) For the choosing method in low-resolution signal source in high-precision adc test
CN101286961A (en) Correcting device and method for direct current off-set outputted by equipment
CN101451885A (en) Optical power measurement method
CN111257617B (en) Multi-power-section voltage and current sampling method, device and system
CN111308206B (en) Impedance detection device and detection method thereof
CN202737848U (en) Analog-digital conversion bit expansion system
CN101304271B (en) Quick AGC calibration method for TD-SCDMA
CN116858371A (en) Method and device for measuring noise loudness level of transformer substation, electronic product and medium
CN110703117A (en) Portable storage battery performance testing device
CN101080057A (en) Method for self-adapted power consumption reduction of mobile communication terminal
CN116125136A (en) Self-adaptive intelligent ammeter and sampling method
CN101587181A (en) Wideband digital telemetered signal isolating and matching method
CN113737867B (en) Foundation pile detector with self-adaptive range and data processing method thereof
CN201666917U (en) Current detection device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB03 Change of inventor or designer information
CB03 Change of inventor or designer information

Inventor after: Guan Mingzhi

Inventor before: Chen Fangzhi

COR Change of bibliographic data

Free format text: CORRECT: INVENTOR; FROM: CHEN FANGZHI TO: GUAN MINGZHI

C14 Grant of patent or utility model
GR01 Patent grant