CN103530224A - Harris corner detecting software system based on GPU - Google Patents

Harris corner detecting software system based on GPU Download PDF

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Publication number
CN103530224A
CN103530224A CN201310279635.5A CN201310279635A CN103530224A CN 103530224 A CN103530224 A CN 103530224A CN 201310279635 A CN201310279635 A CN 201310279635A CN 103530224 A CN103530224 A CN 103530224A
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gpu
harris
image
kernel
moddim
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肖汉
郭运宏
周清雷
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Zhengzhou University
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Zhengzhou University
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Abstract

The invention discloses a Harris corner detecting parallel software system based on the design idea of a Graphics Processing Unit (GPU). The time-consuming image Gaussian convolution smoothing filtering part in calculation is improved to a Single Instruction Multiple Thread (SIMT) mode through a plurality of threads, and the whole process of image corner detecting is finished on a Compute Unified Device Architecture (CUDA) through a shared memory, a constant memory and a lock page internal storage mechanism in the GPU. Corners detected by the software system are distributed evenly, and good effects in the aspects of corner extracting and precise positioning are achieved. Compared with a serial algorithm based on a CPU, a Harris corner detecting parallel algorithm based on the GPU can obtain a speed-up ratio reaching up to 60 times. The executing efficiency of the Harris corner detecting parallel algorithm based on the GPU is improved obviously, and the good real-time processing capacity is shown in the aspect of large-scale data processing.

Description

A kind of Harris Corner Detection software systems based on GPU
Technical field
The present invention relates to a kind of Harris Corner Detection software systems based on GPU.
Background technology
Harris Corner Detection software systems are to use and put very widely feature extraction software in the fields such as computer vision, remote sensing image processing, and it calculates simple, and stability is strong, but arithmetic speed is slow.Propose a kind of based on graphic process unit (Graphics Processing Unit for this reason, GPU) the Harris Corner Detection parallel software system of design philosophy, use numerous threads that image Gaussian convolution smothing filtering consuming time in calculating is partly transformed into single instrction multithreading (Single Instruction Multiple Thread, SIMT) pattern, and adopt shared storage in GPU, constant storer and lock page memory mechanism on unified calculation equipment framework (Compute Unified Device Architecture, CUDA), to complete the overall process of image Corner Detection.The detected angle point of these software systems is uniformly distributed, in the extraction of angle point with accurately all reached good effect aspect location.Experimental result shows, the Harris Corner Detection parallel algorithm based on GPU can obtain the speed-up ratio up to 60 times than the serial algorithm on CPU, and its execution efficiency obviously improves, and for large-scale data, processes and presents good processing capability in real time.
Summary of the invention
The technical scheme that the present invention takes for the technical matters existing in solution known technology is: a kind of Harris Corner Detection software systems based on GPU, workstation adopts CPU+GPU heterogeneous Computing system, and it is a kind of group's core supercomputer system that subsystem that subsystem that multi-core CPU is primary processor and the many GPU of many core are coprocessor forms of take.In this supercomputer system, configured 1 host subsystem and 2 computing equipment subsystems, all devices is connected by PCI-Express * 16 bus.GPU is the form with external unit, by PCI-Express bus, communicates by letter with CPU.CPU and GPU have the storage system of oneself separately, between them, by dma operation, realize data transmission.These software systems are usingd GPU as high-performance calculation equipment, and Harris Robust Algorithm of Image Corner Extraction is carried out to multistage parallel optimization, thereby have realized remote sensing image angle point rapid extraction.Input item: determine Gauss's template dimension, the point of interest image window dimension of Harris template dimension and calculating angle point and input image, according to packing density and calculated amount, set grid dimension and thread block dimension blocks, threads; Output item: detect satisfactory angle point in remote sensing image, and be marked by white crosses.
Harris parallel algorithm comprises: coarse grain parallelism: in Harris parallel algorithm, designed kernel_1 and kernel_2, kernel_1 is with the gaussian filtering of 1 image block of 1 piece processing with in level, gradient in vertical direction, the interest value of image slices vegetarian refreshments corresponding to 1 image block of 1 piece calculating for kernel_2, according to the transparent expansion performance of thread block, between thread block, can not share information, make each GPU system obtain extensibility: each piece in Blocks the data block obtaining in each GPU system can move on any one processor core, the flexible of kernel can be across the parallel processor of any number, system can normally be moved on the different processor of core amounts, fine grained parallel: be MODDIM * MODDIM for neighborhood scope, thread size can be designed as MODDIM * MODDIM, integral multiple if not 16, in kernel, should be mended into 16 integral multiple, thread size also can directly be taken as the integer multiple of 16 that is greater than MODDIM * MODDIM minimum as far as possible.
Experimental result shows, by making full use of the computational resource of GPU, software systems obtain the speed-up ratio of comparing nearly 60 times of traditional C PU software systems.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, by for example the preferred embodiment of the present invention being described further of indefiniteness, in the accompanying drawings:
Fig. 1 CPU+GPU group core supercomputer system logical organization.
Fig. 2 a-2c is Harris Corner Detection image effect.
Fig. 3 is Harris Corner Detection parallel algorithm execution pattern.
Fig. 4 is CUDA memory model.
Embodiment
Below will be described in detail the preferred embodiments of the present invention; Should be appreciated that preferred embodiment is only for the present invention is described, rather than in order to limit the scope of the invention.
Workstation adopts CPU+GPU heterogeneous Computing system, is one and take group's core supercomputer system that subsystem that subsystem that multi-core CPU is primary processor and the many GPU of many core are coprocessor forms.In this supercomputer system, configured 1 host subsystem and 2 computing equipment subsystems, all devices is connected by PCI-Express * 16 bus.GPU is the form with external unit, by PCI-Express bus, communicates by letter with CPU.CPU and GPU have the storage system of oneself separately, between them, by dma operation, realize data transmission.
Harris operator has only been used the first order derivative of view data when calculating, and therefore the impact of image rotation, brightness variation, visual angle change and noise is had to good robustness.A major defect of this algorithm is that detection speed is slower, and its main cause is that each pixel (except boundary pixel point) of whole image is carried out to the calculating of angle point response function value, when picture size is larger, consuming time more.In addition, if adopt larger Gaussian smoothing window, the calculated amount of algorithm will significantly increase, and be not suitable for the occasion of processing in real time.
The algorithm that angle point extracts is at present to take traditional CPU as calculating core mostly, and the raising of calculated performance mainly has benefited from the raising of CPU frequency of operation.Along with the restriction of manufacturing process technology and the limitation of the design object of CPU framework own, in the situation that the core system framework of processor products does not have large variation, this dependence raising dominant frequency promotes cpu performance mode and has encountered soon technology barriers.Therefore the paces that, dominant frequency improves slow down.Due to the promotion of high performance graphics computation requirement, programmable graphics processor (Graphic Processing Unit, GPU) technical development is very rapid on the other hand, and the speed of development of its calculated performance far surpasses the speed of development of CPU calculated performance.At present, the calculated performance of general universal cpu only has 10~20GFLOPS, and the calculated performance of GPU has reached hundreds of GFLOPS.For this reason, this software systems propose a kind ofly to using GPU as high-performance calculation equipment, Harris algorithm are carried out to the algorithm of multistage parallel optimization.Experimental result shows, compares the serial processing mode of CPU, can significantly shorten the time of data processing, and when data volume is larger, improved efficiency is more obvious.
Input item: determine Gauss's template dimension, the point of interest image window dimension of Harris template dimension and calculating angle point and input image.According to packing density and calculated amount, set grid dimension and thread block dimension blocks, threads.
Output item: detect satisfactory angle point in remote sensing image, and be marked by white crosses
Harris operator is a kind of some feature extraction operator based on signal intensity that C.Harris and M.J.Stephens propose.This operator is subject to the inspiration of autocorrelation function in signal processing, has constructed a matrix M being associated with autocorrelation function.The eigenwert of M battle array is the single order curvature of autocorrelation function, if two curvature values are all high, thinks that this point is unique point.The angle point discriminant function of Harris operator is:
R(i,j)=detM(i,j)-k·trace 2M(i,j) (1)
M ( i , j ) = G ( σ n ) ⊗ Σ I x 2 ( x , y ) Σ I x I y ( i , j ) Σ I x I y ( i , j ) Σ I y 2 ( i , j ) - - - ( 2 )
In formula (1), the determinant of detM (i, j) representing matrix M, the mark of traceM (i, j) representing matrix M, k is for acquiescence constant, generally between 0.04~0.06.In formula (2), Ix (i, j) is the gradient of x direction, and Iy (i, j) is the gradient of y direction, and G (σ n) is Gauss's template, is convolution algorithm.
In order to improve the lofty point in anti-noise ability and removal of images, image window has been carried out to Gaussian smoothing, select discrete two-dimensional Gauss window:
Gauss = 1 2 π σ n exp ( - x 2 + y 2 2 σ n 2 ) - - - ( 3 )
(1) each point to the gray level image of operation, calculates it in the first order derivative of horizontal and vertical, and the product of the two, can obtain the image that 3 width are new like this.Property value corresponding to each pixel in 3 width images represents respectively Ix, Iy and Ix Iy.This 3 width image is carried out to gaussian filtering, calculate the interest value R (i, j) of each pixel corresponding on original image.
(2) choose Local Extremum.The angle point of Harris algorithm is pixel corresponding to very big interest value in subrange.Therefore,, after having calculated the interest value of image each point, extract the point of all local interest value maximums in original image.In practical operation, can from the neighborhood window of a certain size centered by each pixel, extract maximal value successively, within the scope of this neighborhood, pixel corresponding to subject of great interest value is exactly angle point.
Harris parallel algorithm:
(1) coarse grain parallelism
With different pieces, process complete incoherent data and can obtain best performance.Now only need in piece, carry out exchanges data.Kernel_1 and kernel_2 in Harris parallel algorithm, have been designed, kernel_1 processes gaussian filtering and the gradient in level, vertical direction of 1 image block with 1 piece, the interest value of image slices vegetarian refreshments corresponding to 1 image block of 1 piece calculating for kernel_2.According to the transparent expansion performance of thread block, between thread block, can not share information, make each GPU system obtain extensibility: each piece in Blocks the data block obtaining in each GPU system can move on any one processor core, the flexible of kernel can be across the parallel processor of any number, and system can normally be moved on the different processor of core amounts.
(2) fine grained parallel
The thread of CUDA is a kind of lightweight thread, is relatively applicable to processing small grain size problem.Be the thread of a pixel distribution in image like this, thereby problem is carried out to fine granularity decomposition.For neighborhood scope, be MODDIM * MODDIM, thread size can be designed as MODDIM * MODDIM, and the integral multiple if not 16 should be mended into 16 integral multiple in kernel as far as possible.Thread size also can directly be taken as the integer multiple of 16 that is greater than MODDIM * MODDIM minimum.SIMT allows for the parallel codes that independence, scalar thread are write thread-level, and it is synchronous by inner synchronic command, to realize cross-thread.
Interface: adopt address transfer mode to transmit image data between master routine CUDA_Harris and kernel function Harris_kernel.
Storage allocation
The data transmission that minimizes low bandwidth is one of target of optimize storage utilization factor.In Harris parallel algorithm, utilize combination CPU-GPU data to transmit method view picture image is transferred to global storage from lock page memory headroom, for some intermediate data structures, only need on GPU, distribute, operate and discharge and needn't use CPU storer simultaneously.This also just means the data transmission minimizing between main frame and equipment, because the data transfer bandwidth between this type of transfer ratio equipment and equipment is much lower.
The thread of carrying out on equipment can be accessed multiple memorizers, comprises high-speed memory and device memory in GPU sheet, as shown in Figure 4.CUDA memory construction comprises the address space in the outer GPU DRAM of the built-in register of GPU, shared storage and sheet.According to the difference of the access module of various types of memory, may there is the variation of the order of magnitude in effective bandwidth.Therefore, in Harris parallel algorithm, adopt the access of following policy optimization storer.
(1) register
Concerning each thread, the register of the bottom is all privately owned.Register has very high bandwidth.The register size that thread in each thread block takies is static allocation, at thread block life period, can not change.Each separate threads can have 4 to 128 register cells.In Harris parallel algorithm, some base address, side-play amount and built-in variable etc. are put into register.If register has been consumed, data will be stored in local storage pellucidly.The data of local storage are to be stored in the DRAM of frame buffer zone, and speed is very slow.May cause performance low.This need to weigh the advantages and disadvantages between " using more register " and " creating more thread ", and in some framework, improper use may cause inadequate resource, likely can hinder concealing memory postpone or cause kernel to start.
(2) shared storage
Shared storage be one can be by the shared deposit data space of all concurrent cross-threads in same.Each multiprocessor of Tesla has 16KB shared storage.Access shared storage is almost the same with access register fast, is the method that realizes the delay minimum of inter-thread communication.Due in Harris parallel algorithm, gradient and the gradient square value in the horizontal and vertical directions of the image block after Gaussian smoothing is that concurrent thread needs the repeatedly data of access, so put it in shared storage.By making for reducing as much as possible the data transmission between equipment and global storage of maximization equipment shared storage, greatly improved the efficiency of calculating and storing.
(3) constant storer
Constant storer is kind of a read-only address space, in GPU sheet, can carry out buffer memory, thereby accelerates access speed.Constant storage space is less, only has 64KB, need to, by main frame initialization, support random access.Because Gauss's template is the convolution object of all image blocks in algorithm, and it is relative invariant.Therefore, in Harris parallel algorithm, Gauss's template of calculating is put into constant storer, be used for accelerating the access to Gauss's template.
(4) lock page internal memory
The primary storage space of distributing and discharging with lock page memory mechanism, can not be assigned in the virtual memory of low speed all the time.Can guarantee that these address spaces are present in the fixing physical memory in address, can accelerate and the communicating by letter of video card by DMA.In Harris parallel algorithm, the horizontal direction gradient square data of image data, image block and vertical gradient square data are placed in lock page internal memory.Essence is to force to allow system in physical memory, complete the work of internal memory application and release, does not participate in page exchange, thereby effectively improves the communication efficiency of host side and equipment end, makes lock page memory bandwidth can reach 3.2GB/s.But can not distribute too large lock page internal memory, otherwise operating system and other application programs will not used virtual memory because there is no enough physical memories, will reduce entire system performance.

Claims (2)

1. Harris Corner Detection software systems based on GPU, workstation adopts CPU+GPU heterogeneous Computing system, and it is a kind of group's core supercomputer system that subsystem that subsystem that multi-core CPU is primary processor and the many GPU of many core are coprocessor forms of take.In this supercomputer system, configured 1 host subsystem and 2 computing equipment subsystems, all devices is connected by PCI-Express * 16 bus.GPU is the form with external unit, by PCI-Express bus, communicates by letter with CPU.CPU and GPU have the storage system of oneself separately, between them, by dma operation, realize data transmission.These software systems are usingd GPU as high-performance calculation equipment, and Harris Robust Algorithm of Image Corner Extraction is carried out to multistage parallel optimization, thereby have realized remote sensing image angle point rapid extraction.Input item: determine Gauss's template dimension, the point of interest image window dimension of Harris template dimension and calculating angle point and input image, according to packing density and calculated amount, set grid dimension and thread block dimension blocks, threads; Output item: detect satisfactory angle point in remote sensing image, and be marked by white crosses.
2. Harris Corner Detection software systems based on GPU as claimed in claim 1, it is characterized in that, Harris parallel algorithm comprises: coarse grain parallelism: in Harris parallel algorithm, designed kernel_1 and kernel_2, kernel_1 is with the gaussian filtering of 1 image block of 1 piece processing with in level, gradient in vertical direction, the interest value of image slices vegetarian refreshments corresponding to 1 image block of 1 piece calculating for kernel_2, according to the transparent expansion performance of thread block, between thread block, can not share information, make each GPU system obtain extensibility: each piece in Blocks the data block obtaining in each GPU system can move on any one processor core, the flexible of kernel can be across the parallel processor of any number, system can normally be moved on the different processor of core amounts, fine grained parallel: be MODDIM * MODDIM for neighborhood scope, thread size can be designed as MODDIM * MODDIM, integral multiple if not 16, in kernel, should be mended into 16 integral multiple, thread size also can directly be taken as the integer multiple of 16 that is greater than MODDIM * MODDIM minimum as far as possible.
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CN112837256A (en) * 2019-11-04 2021-05-25 珠海零边界集成电路有限公司 Circuit system for Harris angular point detection and detection method
CN113781290A (en) * 2021-08-27 2021-12-10 北京工业大学 Vectorization hardware device for FAST corner detection

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Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104077233A (en) * 2014-06-18 2014-10-01 百度在线网络技术(北京)有限公司 Single-channel convolution layer and multi-channel convolution layer handling method and device
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CN104572027A (en) * 2014-12-24 2015-04-29 天津大学 Harris feature point detection parallel implementation method based on multi-core processor
CN104679664A (en) * 2014-12-26 2015-06-03 浪潮(北京)电子信息产业有限公司 Communication method and device in cluster system
CN105550974A (en) * 2015-12-13 2016-05-04 复旦大学 GPU-based acceleration method of image feature extraction algorithm
CN106991638A (en) * 2017-03-30 2017-07-28 武汉大学 A kind of method of many granularity parallel optimizations based on sequential images Harris DOG feature extractions
CN108519944A (en) * 2018-03-07 2018-09-11 北京航空航天大学 A kind of construction method of the software acceleration measuring technology based on noise resonance
CN109918281A (en) * 2019-03-12 2019-06-21 中国人民解放军国防科技大学 Multi-bandwidth target accelerator efficiency testing method
CN109918281B (en) * 2019-03-12 2022-07-12 中国人民解放军国防科技大学 Multi-bandwidth target accelerator efficiency testing method
CN112837256A (en) * 2019-11-04 2021-05-25 珠海零边界集成电路有限公司 Circuit system for Harris angular point detection and detection method
CN111640142A (en) * 2019-12-25 2020-09-08 珠海大横琴科技发展有限公司 Remote sensing image multi-feature matching method and device and electronic equipment
CN113781290A (en) * 2021-08-27 2021-12-10 北京工业大学 Vectorization hardware device for FAST corner detection
CN113781290B (en) * 2021-08-27 2023-01-31 北京工业大学 Vectorization hardware device for FAST corner detection

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Application publication date: 20140122