CN103515530A - Resistance memory cell and fabricating method thereof - Google Patents
Resistance memory cell and fabricating method thereof Download PDFInfo
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- CN103515530A CN103515530A CN201310096522.1A CN201310096522A CN103515530A CN 103515530 A CN103515530 A CN 103515530A CN 201310096522 A CN201310096522 A CN 201310096522A CN 103515530 A CN103515530 A CN 103515530A
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Abstract
A resistive memory and a fabricating method thereof are provided. The resistive memory includes first and second electrodes, a variable resistance material layer, a first dielectric layer, and a second dielectric layer. The first electrode includes a first portion and a second portion. The second electrode is disposed opposite to the first electrode. The variable resistance material layer includes a sidewall and first and second surfaces opposite to each other, wherein the first surface is connected with the first portion of the first electrode and the second surface is electrically connected with the second electrode. The second portion surrounds the sidewall of the variable resistance material layer and is connected with the first portion. The first dielectric layer is disposed between the first and the second electrodes. The second dielectric layer is disposed between the variable resistance material layer and the second portion of the first electrode.
Description
Technical field
The invention relates to a kind of semiconductor device and manufacture method thereof, and particularly relevant for a kind of resistance-type memory and manufacture method thereof.
Background technology
In recent years, the advantage such as operating voltage is low because having for resistance-type memory, service speed is fast, simplify the structure and durability is good, and become the most potential novel memory.Generally speaking, the operator scheme that resistance-type memory switches its storing state comprises that one pole switches (unipolar switching) and bipolar switching (bipolar switching).Wherein, the operator scheme that one pole switches is to utilize the potential pulse of same polarity (for example, positive voltage pulse or negative voltage pulse) to carry out programming operations and the erase operation for use of memory cell.In addition, the operator scheme of bipolar switching is to utilize the potential pulse of opposed polarity to carry out respectively programming operations and the erase operation for use of memory cell.
In addition, for existing resistance-type memory, when operating current can produce heat energy because of the resistance characteristic of electrode during through electrode, by this heat energy, can change the resistance states of variable-resistance material layer in memory cell, and then switch the store status of memory cell.Yet, because operating current is that whole electrode is heated, and variable-resistance material layer only contacts with partial electrode, therefore work as produced heat energy while being enough to change the resistance states of variable-resistance material layer, the heat energy of place, the region generation contact with variable-resistance material layer in electrode will can not be used and cause waste.In addition,, if reduce operating current for fear of energy charge, may cause the operating efficiency of element to reduce.
Summary of the invention
The invention provides a kind of resistance-type memory, its electrode has less thickness above variable-resistance material layer.
The invention provides a kind of manufacture method of resistance-type memory, it is for the manufacture of resistance-type memory provided by the present invention.
The present invention proposes a kind of resistance-type memory, and it comprises the first electrode, the second electrode, variable-resistance material layer, the first dielectric layer and the second dielectric layer.The first electrode has first and second portion.The second electrode configures with respect to the first electrode.Variable-resistance material layer has sidewall and relative first surface and second surface, and wherein the first surface of variable-resistance material layer is connected with the first of the first electrode; The second surface of variable-resistance material layer and the second electrode are electrically connected, and second portion is around the sidewall Qie Yu first connection of variable-resistance material layer.The first dielectric layer is disposed between the first electrode and the second electrode.The second dielectric layer is disposed between variable-resistance material layer and the second portion of the first electrode.
In one embodiment of this invention, the resistance of the material of the material of above-mentioned first ，Qie different from the material of second portion first is high compared with the resistance of the material of second portion.The material of first comprises titanium nitride (TiN), tantalum nitride (TaN) or polysilicon, and the material of second portion comprises tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
In one embodiment of this invention, the material of above-mentioned first is identical with the material of second portion, and the material of the first electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
In one embodiment of this invention, above-mentioned resistance-type memory also comprises conductor layer, and conductor layer connects variable-resistance material layer and the second electrode.
In one embodiment of this invention, the material of above-mentioned variable-resistance material layer comprises chalcogen compound (chalcogenide) or transition metal oxide.
In one embodiment of this invention, the second above-mentioned electrode has third part and the 4th part, and the second surface of variable-resistance material layer is connected with the third part of the second electrode, and the 4th part is around the sidewall of variable-resistance material layer and be connected with third part.
In one embodiment of this invention, the second above-mentioned dielectric layer is disposed between variable-resistance material layer and the second portion of the first electrode, and is disposed between the 4th part of variable-resistance material layer and the second electrode.
In one embodiment of this invention, the material of the third part of above-mentioned the second electrode is different from tetrameric material, and the resistance of the material of third part is high compared with the resistance of tetrameric material.The material of third part comprises titanium nitride, tantalum nitride or polysilicon, and tetrameric material comprises tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
In one embodiment of this invention, the material of the third part of above-mentioned the second electrode is identical with tetrameric material, and the material of the second electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
A kind of resistance-type memory of the another proposition of the present invention, it comprises the first electrode, the second electrode, memory element and dielectric layer.The first electrode has the first thickness and the second thickness, and the first thickness is greater than the second thickness.The second electrode configures with respect to the first electrode.Memory element has first surface and second surface, and memory element has between first electrode and the second electrode of the second thickness.Dielectric layer is around memory element, and its dielectric layer becomes copline with the first surface of memory element, and dielectric layer contacts first electrode with the second thickness with the first surface of memory element.
In another embodiment of the present invention, the material of above-mentioned the first electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
In another embodiment of the present invention, above-mentioned resistance-type memory also comprises conductor layer, and conductor layer connects memory element and the second electrode.
In another embodiment of the present invention, the material of above-mentioned memory element comprises chalcogen compound or transition metal oxide.
In another embodiment of the present invention, the second above-mentioned electrode has the 3rd thickness and the 4th thickness, the 3rd thickness is greater than the 4th thickness, memory element has the first electrode of the second thickness and is having between the second electrode of the 4th thickness, and dielectric layer becomes copline with the second surface of memory element, and dielectric layer contacts second electrode with the 4th thickness with the second surface of memory element.
In another embodiment of the present invention, the material of above-mentioned the second electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
The present invention reintroduces a kind of manufacture method of resistance-type memory, and it comprises formation the first electrode, and described the first electrode comprises first and second portion.Formation is with respect to the second electrode of the first electrode.Between the first electrode and the second electrode, form the first dielectric layer.In the first dielectric layer, form the second dielectric layer and variable-resistance material layer, wherein variable-resistance material layer has sidewall and relative first surface and second surface, the second dielectric layer is around the sidewall of variable-resistance material layer, the first of the first electrode connects the first surface of variable-resistance material layer, the second electrode is electrically connected the second surface of variable-resistance material layer, second portion connects around the sidewall Qie Yu first of variable-resistance material layer, and the second dielectric layer is between the second portion and variable-resistance material layer of the first electrode.
In an embodiment more of the present invention, the manufacture method of above-mentioned resistance-type memory comprises the following steps.Form the second electrode.On the second electrode, form the first dielectric layer.In the first dielectric layer, form perforate, described perforate exposes part the second electrode.On the sidewall of perforate, form the second dielectric layer.In perforate, insert variable-resistance material layer.Remove part of first dielectric layer, to expose part the second dielectric layer, and form the first electrode on the first dielectric layer and variable-resistance material layer.
In an embodiment more of the present invention, after forming the second dielectric layer and before inserting variable-resistance material layer, be also included in and in perforate, insert conductor layer.
In an embodiment more of the present invention, the first of above-mentioned the first electrode is relative resistive formation, and the second portion of the first electrode is relative conductive formation.
In an embodiment more of the present invention, the method that forms the first electrode on the first dielectric layer and variable-resistance material layer comprises the following steps.In the first dielectric layer, form relative layer of low resistance material with on variable-resistance material layer.Carry out planarization processing procedure, remove the relative layer of low resistance material of part to the first surface that exposes the second dielectric layer and variable-resistance material layer.In relative layer of low resistance material with on variable-resistance material layer, form relative high-resistance material layer, and the relative layer of low resistance material of patterning and relative high-resistance material layer, to form the first electrode.
In an embodiment more of the present invention, the manufacture method of above-mentioned resistance-type memory comprises the following steps.Form the first electrode material layer.On the first electrode material layer, form the first dielectric layer.Remove part of first dielectric layer and part the first electrode material layer, to form perforate and the first electrode, wherein perforate the first electrode material layer is around second portion, and the first electrode material layer being positioned at below second portion is first.On the sidewall of perforate, form the second dielectric layer.In perforate, insert variable-resistance material layer, and form the second electrode on the first dielectric layer and variable-resistance material layer.
In an embodiment more of the present invention, after inserting variable-resistance material layer and before forming the second electrode, be also included in and in perforate, insert conductor layer.
In an embodiment more of the present invention, the first of above-mentioned the first electrode is relative resistive formation, and the second portion of the first electrode is relative conductive formation.
In an embodiment more of the present invention, the method that forms perforate and the first electrode comprises the following steps.Form relative high-resistance material layer.On relative high-resistance material layer, form relative layer of low resistance material.The relative layer of low resistance material of patterning and relatively high-resistance material layer.In relative layer of low resistance material, form the first dielectric layer, and remove part of first dielectric layer and the relative layer of low resistance material of part.
In an embodiment more of the present invention, form the second electrode on the first dielectric layer and variable-resistance material layer before, also comprise and remove part of first dielectric layer, to expose part the second dielectric layer, wherein the second electrode comprises third part and the 4th part, the third part of the second electrode connects the second surface of variable-resistance material layer, the 4th part is around the sidewall of variable-resistance material layer and be connected with third part, and the second dielectric layer is between the 4th part and variable-resistance material layer of the second electrode.
In an embodiment more of the present invention, the third part of above-mentioned the second electrode is relative resistive formation, and the 4th part of the second electrode is relative conductive formation.
In an embodiment more of the present invention, the method that forms the second electrode on the first dielectric layer and variable-resistance material layer comprises the steps.In the first dielectric layer, form relative layer of low resistance material with on variable-resistance material layer.Carry out planarization processing procedure, remove the relative layer of low resistance material of part to the second surface that exposes the second dielectric layer and variable-resistance material layer.In relative layer of low resistance material with on variable-resistance material layer, form relative high-resistance material layer, and the relative layer of low resistance material of patterning and relative high-resistance material layer, to form the second electrode.
Based on above-mentioned, in resistance-type memory of the present invention, the part being positioned on variable-resistance material layer of electrode is compared and is had less thickness with the other parts of electrode, so the part being positioned on variable-resistance material layer of electrode can have higher resistance.Thus, when operating current is flowed through electrode, can on variable-resistance material layer, produce preferably heating effect, and then effectively change the resistance states of variable-resistance material layer, and avoided the waste of energy and can improve the operating efficiency of element.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate appended graphic being described in detail below.
Accompanying drawing explanation
Fig. 1 is the perspective view of a resistance-type memory.
The manufacturing flow chart of the resistance-type memory that Fig. 2 A to Fig. 2 D is the first embodiment of the present invention.
Fig. 3 is the generalized section of the resistance-type memory of the second embodiment of the present invention.
The manufacturing flow chart of the resistance-type memory that Fig. 4 A to Fig. 4 C is the third embodiment of the present invention.
Fig. 5 is the generalized section of the resistance-type memory of the fourth embodiment of the present invention.
The manufacturing flow chart of the resistance-type memory that Fig. 6, Fig. 7 A to Fig. 7 B are the fifth embodiment of the present invention.
Fig. 8 A and Fig. 8 B schematic diagram for the resistance-type memory of the first embodiment of the present invention is operated, wherein Fig. 8 B is the profile along the C-C line of Fig. 8 A.
Fig. 9 A and Fig. 9 B schematic diagram for the resistance-type memory of the first embodiment of the present invention is carried out to another operation, wherein Fig. 8 B is the profile along the C-C line of Fig. 8 A.
Main element symbol description
100: dielectric substrate
102,114,201,202,214,714: electrode
104,108: dielectric layer
106: perforate
110: conductor layer
112: variable-resistance material layer
114a, 202a: first
114b, 202b: second portion
714a: third part
714b: the 4th part
D
1, D
2, D
3, D
4: thickness
I
1, I
2: electric current
Embodiment
Below please refer to appended graphic, to understand more fully embodiments of the invention.Yet the present invention can many multi-form realizations, and should be interpreted as being limited to embodiment as herein described.
Fig. 1 is the perspective view of a resistance-type memory.Please refer to Fig. 1, resistance-type memory 10 comprises the electrode 12 of strip, the electrode 14 of strip, conductor layer 16 and variable-resistance material layer (not illustrating).In the present embodiment, the bearing of trend of the bearing of trend of electrode 12 and electrode 14 intersects, and electrode 12 can be considered top electrode, and electrode 14 can be considered bottom electrode, and conductor layer 16 is in order to connect variable-resistance material layer and electrode 12 or electrode 14.
The structure of resistance-type memory proposed by the invention presents with structure as shown in Figure 1, and wherein the section along the A-A line gained in Fig. 1 is A section, and is B section along the section of the B-B line gained in Fig. 1.Hereinafter, the manufacture method of resistance-type memory of the present invention will be described with A section and/or B section in detail.
The manufacturing flow chart of the resistance-type memory that Fig. 2 A to Fig. 2 D is the first embodiment of the present invention, it is the profile along A section.
First, please refer to Fig. 2 A, in dielectric substrate 100, form the electrode 102 of strip.Dielectric substrate 100 is for example the dielectric layer being formed in silicon base.The material of electrode 102 is for example titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.The formation method of electrode 102 is for example in dielectric substrate 100, first to form conductor material layer, then conductor material layer described in patterning.Then, on electrode 102, form dielectric layer 104.The material of dielectric layer 104 is for example silica.The formation method of dielectric layer 104 is for example to carry out chemical vapor deposition process.Then, form perforate 106 in dielectric layer 104, wherein perforate 106 exposes partial electrode 102.The formation method of perforate 106 is for example to carry out anisotropic etching processing procedure.In the present embodiment, electrode 102 is the second electrode, and as the bottom electrode of resistance-type memory.
Then, please refer to Fig. 2 B, on the sidewall of perforate 106, form sidewall dielectric layer 108.The material of sidewall dielectric layer 108 is for example silicon nitride.The formation method of sidewall dielectric layer 108 is for example prior to being conformally formed dielectric materials layer in dielectric substrate 100, then dielectric materials layer is carried out to anisotropic etching processing procedure, to remove on dielectric layer 104 and the dielectric materials layer being positioned on the partial electrode 102 that perforate 106 exposed, and form sidewall dielectric layer 108.Then, conductor material is inserted in part perforate 106, to form conductor layer 110.Conductor material is for example titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.Then, variable-resistance material is inserted in perforate 106, to form variable-resistance material layer 112 (being memory element).Variable-resistance material is for example chalcogen compound or transition metal oxide.Chalcogen compound is for example germanium antimony single alloy (GeSbTe), silver-colored indium antimony single alloy (AgInSbTe), aluminium arsenic single alloy (AlAsTe) or its analog.Transition metal oxide is for example tungsten oxide (WO
x), hafnium oxide (HfO
x), tantalum oxide (TaO
x), titanium oxide (TiO
x), cupric oxide (CuO
x), nickel oxide (NiO
x), zinc oxide (ZnO
x) or its analog.In the present embodiment, in the material of conductor layer 110 situation identical with the material of electrode 102, conductor layer 110 can be considered the projection of electrode 102.Yet the present invention is not limited to this.In other embodiments, according to the demand in practical application, electrode 102 can not have conductor layer 110, but variable-resistance material layer 112 is formed in whole perforate 106, and the partial electrode 102 exposing with perforate 106 is connected.
In the present embodiment; the etch-rate of sidewall dielectric layer 108 is less than the etch-rate of dielectric layer 104; using and in follow-up etch process, (be described in hereinafter) protective layer as variable-resistance material layer 112 and conductor layer 110, avoid variable-resistance material layer 112 and conductor layer 110 to come out and cause the problem of short circuit.In other embodiments, if can avoid above-mentioned short circuit problem, without form sidewall dielectric layer 108 in perforate 106.
Please refer to Fig. 2 C, remove part dielectric layer 104, to expose partial sidewall dielectric layer 108.The method that removes part dielectric layer 104 is for example to carry out anisotropic etching processing procedure.
Please refer to Fig. 2 D, on dielectric layer 104 and variable-resistance material layer 112, form the electrode 114 of strip, to complete the making of the resistance-type memory of the present embodiment.The material of electrode 114 is for example titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.The formation method of electrode 114 is for example first to form conductor material layer, then conductor material layer described in patterning.Electrode 114 comprises the 114a of first and second portion 114b, wherein second portion 114b keeps apart with variable-resistance material layer 112 around variable-resistance material layer 112 and by sidewall dielectric layer 108, and being positioned at second portion 114b, the 114a of first is connected with variable-resistance material layer 112 with the variable-resistance material layer 112Shang，Qie 114a of first.In the present embodiment, electrode 114 is the first electrode, and as the top electrode of resistance-type memory.
In addition be positioned at, the thickness D of the electrode 114 (comprising the 114a of first and second portion 114b) on dielectric layer 104
1be greater than the thickness D of the electrode 114 (114a of first) on variable-resistance material layer 112
2.Therefore, while operating the resistance-type memory of the present embodiment, the sectional area that is positioned at the vertical current direction of the electrode 114 on dielectric layer 104 is greater than the sectional area of the vertical current direction of the electrode 114 being positioned on variable-resistance material layer 112, thereby the electrode 114 that makes to be positioned on variable-resistance material layer 112 has higher current density.Therefore, when operation resistance-type memory of the present invention, when operating current is flowed through while being positioned at the electrode 114 on variable-resistance material layer 112, the electrode 114 being positioned on variable-resistance material layer 112 can have preferably heating effect, and then can effectively change the resistance states of variable-resistance material layer 112, and therefore improved the operating efficiency of resistance-type memory.
Other one carries, and in the present embodiment, the material of the electrode 114 114a of first and second portion 114b is identical, and meaning is that electrode 114 is single layer structure.Yet the present invention is not limited to this.
Fig. 3 is the generalized section of the resistance-type memory of the second embodiment of the present invention, and it is the profile along A section.In the present embodiment, the element identical with Fig. 2 D represents the label with identical.Please refer to Fig. 3, the material of the electrode 114 114a of first and second portion 114b is not identical.That is to say, electrode 114 has double-decker, and wherein the resistance of the material of the 114a of first is relative resistive formation compared with the resistance Gao，Yi Ji 114a of first of the material of second portion 114b, and second portion 114b is relative conductive formation.The material of resistive formation is for example titanium nitride, tantalum nitride or polysilicon relatively, and the material of conductive formation is for example tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy relatively.In the present embodiment, the formation method of electrode 114 comprises the following steps: prior to forming relative layer of low resistance material on dielectric layer 104, and this relative layer of low resistance material covers variable-resistance material layer 112.Then, carry out planarization processing procedure, to remove the relative layer of low resistance material of part to exposing variable-resistance material layer 112.Then, in relative layer of low resistance material with on variable-resistance material layer 112, form relative high-resistance material layer.Afterwards, the relative layer of low resistance material of patterning and relatively high-resistance material layer, have double-deck electrode 114 to form.
Above-mentioned while having double-deck resistance-type memory in operation, before operating current flows into electrode 114 and the variable-resistance material layer 112 of flowing through, operating current mainly can flow in relative conductive formation (second portion 114b).Because the resistance of relative conductive formation is lower, therefore now can not produce too much heat energy.When operating current wants to flow through variable-resistance material layer 112, because variable-resistance material layer 112 top are that relative resistive formation (114a of first) and its have less current flowing area, therefore the relative resistive formation of variable-resistance material layer 112 top has preferably heating effect, and then can effectively change the resistance states of variable-resistance material layer 112.
The manufacturing flow chart of the resistance-type memory that Fig. 4 A to Fig. 4 C is the third embodiment of the present invention, it is the profile along B section.In addition, element identical in the 3rd embodiment and the first embodiment represents the label with identical, in this NES.
First, please refer to Fig. 4 A, in dielectric substrate 100, form the electrode 201 of strip.The material of electrode 201 is for example titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.The formation method of electrode 201 is for example in dielectric substrate 100, first to form conductor material layer, then conductor material layer described in patterning.Then, on electrode 201, form dielectric layer 104.
Then, please refer to Fig. 4 B, remove part dielectric layer 104, to expose partial electrode 201.Then, remove a part for exposed electrode 201, to form electrode 202 and perforate 106.Electrode 202 comprises the 202a of first and second portion 202b, wherein second portion 202b be positioned at perforate 106 around the 202a of ，Er first be positioned at second portion 202b below.Perforate 106 exposes the 202a of first of part.In the present embodiment, the material of the electrode 202 202a of first and second portion 202b is identical, and meaning is that electrode 202 is single layer structure.In the present embodiment, electrode 202 is the first electrode, and as the bottom electrode of resistance-type memory.
In addition be positioned at, the thickness D of the electrode 202 (202a of first) of perforate 106 belows
4be less than the thickness D of the electrode 202 (comprising the 202a of first and second portion 202b) in other region
3.Therefore,, when the resistance-type memory of operation the present embodiment, the sectional area of vertical current direction that is arranged in the electrode 202 of perforate 106 belows is less than the sectional area of vertical current direction of the electrode 202 in other region.Therefore the current density of electrode 202 that, is arranged in perforate 106 belows is higher than the current density of the electrode 202 in other region.
Then, please refer to Fig. 4 C, carry out the step similar to Fig. 2 B, on the sidewall of perforate 106, form sidewall dielectric layer 108.Then, variable-resistance material is inserted in part perforate 106, to form variable-resistance material layer 112.In the present embodiment, variable-resistance material layer 112 contacts with the electrode 202 that is positioned at perforate 106 belows.Then, conductor material is inserted in perforate 106, to form conductor layer 110.Then, on dielectric layer 104 and variable-resistance material layer 112, form the electrode 214 of strip, to complete the making of the resistance-type memory of the present embodiment.The material of electrode 214 is for example titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.The formation method of electrode 214 is for example in dielectric substrate 100, first to form conductor material layer, then conductor material layer described in patterning.In the present embodiment, electrode 214 is the second electrode, and as the top electrode of resistance-type memory.
In the present embodiment, in the material of conductor layer 110 situation identical with the material of electrode 214, conductor layer 110 can be considered the projection of electrode 214.Yet the present invention is not limited to this.In other embodiments, according to the demand in practical application, electrode 214 can not have above-mentioned conductor layer 110, but variable-resistance material layer 112 is formed in whole perforate 106.
According to described in the first embodiment, should understand, when operating current is flowed through the electrode 202 contacting with variable-resistance material layer 112, compare and can produce preferably heating effect with other region, and then can effectively change the resistance states of variable-resistance material layer 112, and therefore improve the operating efficiency of resistance-type memory.
In the present embodiment, electrode 202 is single layer structure, yet the present invention is not limited to this.
Fig. 5 is the generalized section of the resistance-type memory of the fourth embodiment of the present invention, and it is the profile along B section.In the present embodiment, the element identical with Fig. 4 C represents the label with identical.Please refer to Fig. 5, the material of the electrode 202 202a of first and second portion 202b is not identical.That is to say, electrode 202 has double-decker, and wherein the resistance of the material of the 202a of first is relative resistive formation compared with the resistance Gao，Yi Ji 202a of first of the material of second portion 202b, and second portion 202b is relative conductive formation.The material of resistive formation is for example titanium nitride, tantalum nitride or polysilicon relatively, and the material of conductive formation is for example tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy relatively.In the present embodiment, the formation method of electrode 202 comprises the following steps: first in dielectric substrate 100, to form relative high-resistance material layer.Then, on relative high-resistance material layer, form relative layer of low resistance material.Then, the relative layer of low resistance material of patterning and relatively high-resistance material layer.Then,, in forming the process of perforate 106, remove part layer of low resistance material relatively.
Above-mentioned while having double-deck resistance-type memory in operation, before operating current flows into electrode 202 and the variable-resistance material layer 112 of flowing through, operating current mainly can flow in relative conductive formation (second portion 202b).Because the resistance of relative conductive formation is lower, therefore now can not produce too much heat energy.When operating current wants to flow through variable-resistance material layer 112, because variable-resistance material layer 112 below are that relative resistive formation (202a of first) and its have less current flowing area, therefore the relative resistive formation of variable-resistance material layer 112 below has preferably heating effect, and then can effectively change the resistance states of variable-resistance material layer 112.
Fig. 6 to Fig. 7 B is the manufacturing flow chart of the resistance-type memory of the fifth embodiment of the present invention, and wherein Fig. 7 A is the profile along A section, and Fig. 6 and Fig. 7 B are the profile along B section.In Fig. 6 to Fig. 7 B, the element identical with aforementioned each embodiment represents the label with identical, in this NES.
First, please refer to Fig. 6, after the step described in carrying out Fig. 4 B, carry out the step similar to Fig. 2 B, on the sidewall of perforate 106, form sidewall dielectric layer 108.Then, variable-resistance material is inserted in perforate 106, to form variable-resistance material layer 112.In the present embodiment, because variable-resistance material layer 112 must contact with being arranged in the electrode 202 of its below and the electrode (forming in subsequent step) of the side of being located thereon, therefore variable-resistance material layer 112 must be formed in whole perforate 106.In the present embodiment, electrode 202 is the first electrode, and as the bottom electrode of resistance-type memory.
Then, referring to Fig. 7 A and Fig. 7 B, carry out the step similar to Fig. 2 C to Fig. 2 D, remove part dielectric layer 104, to expose partial sidewall dielectric layer 108.Then, on dielectric layer 104 and variable-resistance material layer 112, form the electrode 714 of strip, to complete the making of the resistance-type memory of the present embodiment.In addition, electrode 714 comprises third part 714a and the 4th part 714b, and electrode 114 can be single layer structure or double-decker.In the present embodiment, electrode 714 is the second electrode, and as the top electrode of resistance-type memory.
In addition, in Fig. 7 A and Fig. 7 B, although illustrate electrode 714 and electrode 202 be all in single layer structure ，Dan this area, have conventionally know that the knowledgeable should be understood that according to aforementioned each embodiment can be according to the structure of the demand adjustment in practical application and collocation electrode 714 and electrode 202.
Other one carries, and in resistance-type memory of the present invention, can improve further operating efficiency by adjusting the width of electrode.By take the resistance-type memory of the first embodiment, describe as example below.
Fig. 8 A and Fig. 8 B schematic diagram for the resistance-type memory of the first embodiment of the present invention is operated, wherein Fig. 8 B is the profile along the C-C line of Fig. 8 A.Please refer to Fig. 8 A and Fig. 8 B, the width design of electrode 114 can be become to enough wide, make as operating current I
1before the variable-resistance material layer 112 of the memory cell that flows into electrode 114 and will operate in arrival, operating current I
1can be mainly by the variable-resistance material layer 112 of other memory cell lower part (being the larger part of thickness of electrode 114) of resistance around, be flow through, and the higher part (being the less part of thickness of electrode 114) of resistance on the variable-resistance material layer 112 of these memory cell of not flowing through.Therefore, until operating current I
1while arriving the memory cell that will control, operating current I
1higher part (being the less parts of electrode 114 thickness) this variable-resistance material layer 112 of flowing through of resistance on the variable-resistance material layer 112 of the memory cell that just flow direction will operate.
Fig. 9 A and Fig. 9 B schematic diagram for the resistance-type memory of the first embodiment of the present invention is carried out to another operation, wherein Fig. 9 B is the profile along the D-D line of Fig. 9 A.Please refer to Fig. 9 A and Fig. 9 B, the width design of electrode 114 can be become to enough narrow, to force operating current I
2when flowing through each memory cell, must need the higher part (part that electrode 114 thickness are less) of resistance of flowing through on each variable-resistance material layer 112.
In sum, in the resistance-type memory of various embodiments of the present invention, the part being positioned on variable-resistance material layer of electrode has less thickness, therefore has higher resistance.Thus, when operating current is flowed through electrode on variable-resistance material layer, can produce preferably heating effect, and then effectively change the resistance states of variable-resistance material layer, and therefore improve operating efficiency.
Although the present invention discloses as above with embodiment; so it,, not in order to limit the present invention, has and conventionally knows the knowledgeable in any affiliated technical field, without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when defining and be as the criterion depending on claim.
Claims (29)
1. a resistance-type memory, is characterized in that, comprising:
The first electrode, has first and second portion;
The second electrode, configures with respect to described the first electrode;
Variable-resistance material layer, there is sidewall and relative first surface and second surface, the described first surface of wherein said variable-resistance material layer is connected with the described first of described the first electrode, the described second surface of described variable-resistance material layer and described the second electrode are electrically connected, and described second portion is around the described sidewall of described variable-resistance material layer and be connected with described first;
The first dielectric layer, is disposed between described the first electrode and described the second electrode; And
The second dielectric layer, is disposed between described variable-resistance material layer and the described second portion of described the first electrode.
2. resistance-type memory as claimed in claim 1, is characterized in that, the material of described first is different from the material of described second portion, and the resistance of the material of the more described second portion of resistance of the material of described first is high.
3. resistance-type memory as claimed in claim 2, is characterized in that, the material of described first comprises titanium nitride, tantalum nitride or polysilicon, and the material of described second portion comprises tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
4. resistance-type memory as claimed in claim 1, it is characterized in that, the material of described first is identical with the material of described second portion, and the material of described the first electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
5. resistance-type memory as claimed in claim 1, is characterized in that, also comprises conductor layer, and described conductor layer connects described variable-resistance material layer and described the second electrode.
6. resistance-type memory as claimed in claim 1, is characterized in that, the material of described variable-resistance material layer comprises chalcogen compound or transition metal oxide.
7. resistance-type memory as claimed in claim 1, it is characterized in that, described the second electrode has third part and the 4th part, the described second surface of described variable-resistance material layer is connected with the described third part of described the second electrode, and described the 4th part is around the described sidewall of described variable-resistance material layer and be connected with described third part.
8. resistance-type memory as claimed in claim 7, it is characterized in that, described the second dielectric layer is disposed between described variable-resistance material layer and the described second portion of described the first electrode and is disposed between described the 4th part of described variable-resistance material layer and described the second electrode.
9. resistance-type memory as claimed in claim 7, is characterized in that, the material of described third part is different from described tetrameric material, and the resistance of the more described tetrameric material of resistance of the material of described third part is high.
10. resistance-type memory as claimed in claim 9, is characterized in that, the material of described third part comprises titanium nitride, tantalum nitride or polysilicon, and described tetrameric material comprises tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
11. resistance-type memories as claimed in claim 7, it is characterized in that, the material of described third part is identical with described tetrameric material, and the material of described the second electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
12. 1 kinds of resistance-type memories, is characterized in that, comprising:
The first electrode, has the first thickness and the second thickness, and described the first thickness is greater than described the second thickness;
The second electrode, configures with respect to described the first electrode;
Memory element, has first surface and second surface, and has between described first electrode and described the second electrode of described the second thickness; And
Dielectric layer, around described memory element, wherein said dielectric layer becomes copline with the described first surface of described memory element, and described dielectric layer contacts described first electrode with described the second thickness with the described first surface of described memory element.
13. resistance-type memories as claimed in claim 12, is characterized in that, the material of described the first electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
14. resistance-type memories as claimed in claim 12, is characterized in that, also comprise conductor layer, and described conductor layer connects described memory element and described the second electrode.
15. resistance-type memories as claimed in claim 12, is characterized in that, the material of described memory element comprises chalcogen compound or transition metal oxide.
16. resistance-type memories as claimed in claim 12, it is characterized in that, described the second electrode has the 3rd thickness and the 4th thickness, described the 3rd thickness is greater than described the 4th thickness, described memory element has described first electrode of described the second thickness and is having between described second electrode of described the 4th thickness, and described dielectric layer becomes copline with the described second surface of described memory element, and described dielectric layer contacts described second electrode with described the 4th thickness with the described second surface of described memory element.
17. resistance-type memories as claimed in claim 16, is characterized in that, the material of described the second electrode comprises titanium nitride, tantalum nitride, tungsten, copper, aluminium, Al-zn-mg-cu alloy or al-si-cu alloy.
The manufacture method of 18. 1 kinds of resistance-type memories, is characterized in that, comprising:
Form the first electrode, described the first electrode comprises first and second portion;
Formation is with respect to the second electrode of described the first electrode;
Between described the first electrode and described the second electrode, form the first dielectric layer;
In described the first dielectric layer, form the second dielectric layer and variable-resistance material layer, wherein said variable-resistance material layer has sidewall and relative first surface and second surface, described the second dielectric layer is around the described sidewall of described variable-resistance material layer, the described first of described the first electrode connects the described first surface of described variable-resistance material layer, described the second electrode is electrically connected the described second surface of described variable-resistance material layer, described second portion is around the described sidewall of described variable-resistance material layer and be connected with described first, and described the second dielectric layer is between the described second portion and described variable-resistance material layer of described the first electrode.
The manufacture method of 19. resistance-type memories as claimed in claim 18, is characterized in that, comprising:
Form described the second electrode;
On described the second electrode, form described the first dielectric layer;
In described the first dielectric layer, form perforate, described perforate exposes described the second electrode of part;
On the sidewall of described perforate, form described the second dielectric layer;
In described perforate, form described variable-resistance material layer;
Remove described the first dielectric layer of part, to expose described the second dielectric layer of part; And
On described the first dielectric layer and described variable-resistance material layer, form described the first electrode.
The manufacture method of 20. resistance-type memories as claimed in claim 19, is characterized in that, after forming described the second dielectric layer and before inserting described variable-resistance material layer, is also included in described perforate and forms conductor layer.
The manufacture method of 21. resistance-type memories as claimed in claim 19, is characterized in that, the described first of described the first electrode is relative resistive formation, and the described second portion of described the first electrode is relative conductive formation.
The manufacture method of 22. resistance-type memories as claimed in claim 21, is characterized in that, the method that forms described the first electrode on described the first dielectric layer and described variable-resistance material layer comprises:
In described the first dielectric layer, form relative layer of low resistance material with on described variable-resistance material layer;
Carry out planarization processing procedure, remove the described relative layer of low resistance material of part to the described first surface that exposes described the second dielectric layer and described variable-resistance material layer;
In described relative layer of low resistance material, form relative high-resistance material layer with on described variable-resistance material layer; And
Relative layer of low resistance material and described relative high-resistance material layer described in patterning, to form described the first electrode.
The manufacture method of 23. resistance-type memories as claimed in claim 18, is characterized in that, comprising:
Form the first electrode material layer;
On described the first electrode material layer, form described the first dielectric layer;
Remove described the first dielectric layer of part and described the first electrode material layer of part, to form perforate and described the first electrode, wherein, described perforate described the first electrode material layer is around described second portion, and described the first electrode material layer being positioned at below described second portion is described first;
On the sidewall of described perforate, form described the second dielectric layer;
In described perforate, insert described variable-resistance material layer; And
On described the first dielectric layer and described variable-resistance material layer, form described the second electrode.
The manufacture method of 24. resistance-type memories as claimed in claim 23, is characterized in that, after inserting described variable-resistance material layer and before forming described the second electrode, is also included in described perforate and inserts conductor layer.
The manufacture method of 25. resistance-type memories as claimed in claim 23, is characterized in that, the described first of described the first electrode is relative resistive formation, and the described second portion of described the first electrode is relative conductive formation.
The manufacture method of 26. resistance-type memories as claimed in claim 25, is characterized in that, forms the method for described perforate and described the first electrode, comprising:
Form relative high-resistance material layer;
On described relative high-resistance material layer, form relative layer of low resistance material;
Relative layer of low resistance material and described relative high-resistance material layer described in patterning;
In described relative layer of low resistance material, form described the first dielectric layer; And
Remove described the first dielectric layer of part and the described relative layer of low resistance material of part.
The manufacture method of 27. resistance-type memories as claimed in claim 23, it is characterized in that, form described the second electrode on described the first dielectric layer and described variable-resistance material layer before, also comprise and remove described the first dielectric layer of part, to expose described the second dielectric layer of part, wherein said the second electrode comprises third part and the 4th part, the described third part of described the second electrode connects the described second surface of described variable-resistance material layer, described the 4th part is around the described sidewall of described variable-resistance material layer and be connected with described third part, and described the second dielectric layer is between described the 4th part and described variable-resistance material layer of described the second electrode.
The manufacture method of 28. resistance-type memories as claimed in claim 27, is characterized in that, the described third part of described the second electrode is relative resistive formation, and described the 4th part of described the second electrode is relative conductive formation.
The manufacture method of 29. resistance-type memories as claimed in claim 28, is characterized in that, the method that forms described the second electrode on described the first dielectric layer and described variable-resistance material layer comprises:
In described the first dielectric layer, form relative layer of low resistance material with on described variable-resistance material layer;
Carry out planarization processing procedure, remove the described relative layer of low resistance material of part to the described second surface that exposes described the second dielectric layer and described variable-resistance material layer;
In described relative layer of low resistance material, form relative high-resistance material layer with on described variable-resistance material layer; And
Relative layer of low resistance material and described relative high-resistance material layer described in patterning, to form described the second electrode.
Applications Claiming Priority (6)
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| US201261663651P | 2012-06-25 | 2012-06-25 | |
| US61/663,651 | 2012-06-25 | ||
| US13/601,209 US9070860B2 (en) | 2012-06-25 | 2012-08-31 | Resistance memory cell and operation method thereof |
| US13/601,209 | 2012-08-31 | ||
| US201361751263P | 2013-01-11 | 2013-01-11 | |
| US61/751,263 | 2013-01-11 |
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