CN103457496A - Single-stage booster inverter - Google Patents

Abstract

The invention discloses a single-stage boost inverter, which includes a coupling inductor, a capacitor I, a capacitor II, a diode, an input inductor, and an inverter bridge; wherein the coupling inductor includes a winding I and a winding II, and the winding I, winding II Including a first end and a second end respectively, the first end of the winding I and the first end of the winding II have the same name as each other, the second end of the winding I and the second end of the winding II have the same name as each other; The first end of the winding I is connected to the first end of the winding II, and the turn ratio n of the winding I and the winding II is limited in a certain range. When 1<n≤2, the voltage boosting capability is relatively high. This solution uses a small turn ratio to achieve a high boost capability. The total power flowing through the inverter is provided by the coupled inductor and capacitor, so the volume and weight of the coupled inductor are reduced accordingly. The inverter input The current is continuous, and the damage caused to the device by the resonant current during startup is suppressed.

Description

A single-stage boost inverter

technical field

The invention relates to a single-stage step-up inverter, which is especially suitable for electric vehicle motor drive systems and new energy power generation systems with variable input voltages for DC buses requiring boosted power supply.

Background technique

The general structure of the traditional voltage source inverter is composed of the front end of the diode rectifier (AC power supply) or DC power supply, the filter capacitor of the DC link and the inverter bridge, as shown in Figure 1. Usually this kind of voltage source inverter has the following limitations or deficiencies:

(1) The AC load must be inductive or have to be connected in series with the AC power supply to enable the voltage source inverter to work normally.

(2) The AC output voltage is limited to be lower than but not higher than the DC bus voltage. Therefore, for DC/AC power conversion, the traditional voltage source inverter is a step-down inverter. For DC/AC power conversion applications with low DC voltage and higher AC output voltage, an additional DC/DC boost converter is required. This additional power conversion stage increases the cost of the system and reduces the conversion efficiency. .

(3) The upper and lower devices of each bridge arm cannot be turned on at the same time, whether it is intentional or caused by electromagnetic interference, otherwise, a direct short circuit will occur and the device will be damaged. Shoot-through problems caused by false triggers caused by electromagnetic interference are a major killer of converter reliability.

In some specific applications of motor control and power conversion, due to the above deficiencies, ordinary voltage source inverters are just the bottleneck to realize system functions, restricting the development and progress of related technologies.

In the electric drive system of pure electric vehicles and hybrid electric vehicles, the DC voltage is generally determined by the battery voltage, so the speed range of the constant torque output of the driving motor is determined by the battery voltage. The acceleration ability will be reduced. To improve the high-speed handling performance, the DC voltage driving the inverter can be boosted and adjusted, which can effectively improve the handling performance of the vehicle. For example, the drive technology scheme represented by Prius is to boost the battery voltage through a DC/DC converter to obtain a stable DC voltage, and then supply it to the drive system of the electric vehicle. However, this topology inserts a first-stage Boost chopper circuit before the voltage source inverter to realize two-stage conversion, which has low efficiency and poor reliability, which increases the cost of the system. Similar problems also exist in the ever-changing electric traction field of rail transit. The power supply voltage of electric traction often has large fluctuations, especially large drops, which have an impact on the traction output of normal high-speed vehicles. , if the inverter can be equipped with the self-adjustment function of the bus voltage, the driving stability will be greatly improved. Therefore, it is of great significance to study an inverter with simple topology, high efficiency, high reliability, and adaptable to a large input voltage range.

In 2002, Professor Peng Fangzheng proposed the Z-source inverter. As shown in Figure 2, a passive network is added to the traditional inverter to couple the main circuit of the inverter with the power supply. The introduction of the Z-source network can overcome the shortcomings of the above-mentioned traditional voltage source inverter. There have been many literature reports on the research on the working principle of the Z-source inverter. Its biggest feature is that it can adjust the DC bus voltage of the inverter bridge, that is, the Z-source inverter can increase the voltage of the DC capacitor to Greater than the expected value of the average DC voltage of the rectifier. When the input voltage drops or the load requires a higher voltage, the output voltage can be increased by using the "straight-through zero vector" state that the traditional voltage source inverter does not have. The so-called "straight-through zero-vector" means that in the zero-vector output state of the inverter, the upper and lower power tubes of the inverter bridge are controlled to pass through, so that the inductor current increases. Because the "straight-through zero vector" is still a zero vector, it has no effect on the inverter modulation PWM output. When it is in a non-straight through zero vector, the inductor releases the energy previously stored to increase the DC bus voltage. With a lower input voltage, the desired DC bus voltage of the inverter is obtained. The most important point of the Z-source inverter is that the "straight-through zero vector" does not affect the output of the inverter's zero vector state, that is, the load PWM voltage of the inverter remains unchanged, and the output voltage is not affected.

In recent years, many scholars have applied Z-source converters to green energy, electric power transmission, etc. The advantages of Z-source inverters can effectively adjust the DC bus voltage of the inverter and overcome the disadvantages of traditional voltage source inverters. Insufficient, but this inverter also has shortcomings such as starting inrush current, resonance, and high withstand voltage of the capacitor.

In 2008, Professor Peng Fangzheng's research group improved the defects and deficiencies of the Z-source inverter, and proposed quasi-Z-source (quasi-Z-source inverter). As shown in Figure 3, the input current is continuous, Avoid inrush current when starting.

Since Z-source inverters and quasi-Z-source inverters have the same boost capability, in order to increase voltage gain and reduce voltage stress, in 2011, our research group proposed a single-stage boost inverter with tapped inductors. The topology is shown in Figure 4. In 2011, Professor Peng Fangzheng's research group proposed a trans-Z-source inverter with intermittent input current;

In 2012, other scholars improved the trans-Z-source inverter by adding an LC network at the input end of the trans-Z-source inverter to make the input current continuous, as shown in Figure 5.

The existing inverter structure is under the condition that the through-duty ratio is constant. As the turn ratio increases, the voltage gain increases accordingly. In order to achieve a high voltage gain, the turn ratio must be increased. In this way, The volume, weight and loss of the high-frequency transformer (coupled inductor) also increase correspondingly with the increase of the turn ratio.

Contents of the invention

The technical problem to be solved by the present invention is to provide a unipolar step-up inverter with small turn ratio and high gain, which solves the problems of large volume, weight and loss of high-frequency transformers.

The present invention adopts the following technical solutions for solving the problems of the technologies described above:

A single-stage boost inverter, including a coupled inductor, a capacitor I, a capacitor II, a diode, an input inductor, and an inverter bridge; wherein the coupled inductor includes a winding I and a winding II; the winding I and the winding II respectively include a first end, the second end, and the first end of the winding I and the first end of the winding II have the same name, the second end of the winding I and the second end of the winding II have the same name; the winding The first end of I is connected to the first end of winding II, and is connected to the cathode of the diode; the positive pole of the external input power supply is connected to one end of the input inductance, and the other end of the input inductance is respectively connected to the diode’s The anode is connected to one end of the capacitor II; the second end of the winding I is respectively connected to the other end of the capacitor II and the positive pole of the input end of the inverter bridge; the second end of the winding II is connected to the positive pole of the capacitor I One end is connected; the negative pole of the external input power supply is respectively connected with the other end of the capacitor I and the negative pole of the input terminal of the inverter bridge.

The turn ratio of the winding I and the winding II is greater than 1 and less than or equal to 2.

The capacitors I and II are electrolytic capacitors, wherein the positive pole of the capacitor I is connected to the second end of the winding II, and the negative pole of the capacitor I is respectively connected to the negative pole of the input terminal of the inverter bridge and the external power supply. The negative pole is connected; the positive pole of the capacitor II is respectively connected to the second end of the winding I and the positive pole of the input end of the inverter bridge, and the negative pole of the capacitor II is respectively connected to the other end of the input inductor and the anode of the diode.

Compared with the prior art, the present invention has the following beneficial effects:

1. The topology is simple, a higher voltage gain is achieved through a smaller turn ratio, and the volume and weight of the coupled inductor are reduced.

2. The input voltage range is large. The reasonable configuration of the coupling inductor turns ratio can stabilize the DC bus voltage.

3. High efficiency and high reliability. Both the topology and the Z-source inverter allow the shoot-through phenomenon, and the shoot-through state is regarded as a normal working state, which avoids the problem of damage to power devices caused by electromagnetic interference. This topology can achieve the purpose of boosting and inverting through one-stage conversion instead of two-stage conversion.

4. The LC network is added to the input end to make the input current continuous, which solves the problem of large inrush current when starting, and also broadens the boosting capacity.

Description of drawings

Fig. 1 is a voltage source inverter in the prior art.

FIG. 2 is a topological structure diagram of a Z-source inverter in the prior art.

Fig. 3 is a topological structure diagram of a quasi-Z-source inverter in the prior art.

FIG. 4 is a topological structure diagram of a single-stage boost inverter with tapped inductors in the prior art.

Fig. 5 is a topological structure diagram of a trans-Z-source inverter with an LC network in the prior art.

FIG. 6 is a topological structure diagram of a single-stage boost inverter of the present invention.

FIG. 7 is an equivalent circuit diagram of a straight-through state of a single-stage boost inverter of the present invention.

FIG. 8 is an equivalent circuit diagram of a non-through state of a single-stage boost inverter of the present invention.

Fig. 9 is a simulation waveform diagram of the present invention.

Fig. 10 is an expanded view of the simulated waveforms of input current and DC bus voltage in the present invention.

FIG. 11 shows the voltage waveforms at both ends of the coupling inductor winding L2 and the winding L1 and the voltage waveform borne by the diode VD1 of the present invention.

Detailed ways

Below in conjunction with accompanying drawing, structure and working process of the present invention will be further described.

As shown in accompanying drawing 6, the single-stage boost inverter of the present invention is improved on the basis of accompanying drawing 5, and its topological structure includes: power supply U _i , coupling inductor Lc, capacitor C1, capacitor C2, diode VD1, input Inductor L3, inverter bridge; wherein the coupled inductance Lc includes windings L1 and L2, and the windings L1 and L2 respectively include a first end and a second end; the positive pole of the power supply _Ui is connected to one end of the input inductance L3 , the current i _in flows from the power supply U _i to the input inductance L3; the other end of the input inductance L3 is respectively connected to the anode of the diode VD1 and one end of the capacitor C2; the cathode of the diode VD1 is respectively connected to the winding L1 , the first end of L2 is connected; the second end of the winding L1 is respectively connected to the other end of the capacitor C2 and the positive pole of the input end of the inverter bridge; the second end of the winding L2 is connected to one end of the capacitor C1 The negative pole of the power supply U _i is respectively connected to the other end of the capacitor C1 and the negative pole of the input end of the inverter bridge, and the inverter bridge includes switching tubes T1-T6; the number of turns of the windings L1 and L2 are respectively N1 , N2.

In this embodiment, capacitors C1 and C2 are both electrolytic capacitors.

Diode VD1 is necessary, so that the coupled inductor stores energy when passing through.

The working mode of this topology is shown in accompanying drawing 7, accompanying drawing 8, and its working process is:

Mode 1: The equivalent circuit of the circuit shown in Figure 7 when the inverter bridge is in a straight-through state. The circuit has two loops, and the loop directions have been marked with dotted lines in Figure ₇ . The capacitor C2 forms a loop; the capacitor C1 and the coupled inductance Lc form another loop. The power supply U _i and the capacitor C2 discharge to the input inductance L3, the voltage at one end of the input inductance L3 connected to the power supply U _i is positive, the voltage at the other end is negative, and the voltage at both ends is u _L3 . Capacitor C1 discharges, coupled inductance Lc stores energy, and induced electromotive force is generated at both ends of winding L1. The voltage at the first end of winding L1 is positive and the voltage at the second end is negative, and the voltage at both ends is U _L1 ; induced electromotive force is generated at both ends of L2 , the voltage at the first end of the winding L2 is positive, the voltage at the second end is negative, the voltage at both ends is U _L2 , and the output currents of the windings L1 and L2 are respectively i _L1 and i _L2 . The voltage at both ends of the diode VD1 is u _VD1 =-u _L3 -u _L1 , and the diode VD1 is cut off due to the reverse voltage. As shown in FIG. 11 , in the straight-through state, the voltage waveform borne by the diode VD1 is negative on the negative half axis. In short, when the circuit is in the straight-through state, the capacitors C1 and C2 release energy, and the input inductor L3 and coupling inductor Lc store energy; the turns of the winding L1 and the winding L2 are N1 and N2 respectively, and the turn ratio is n=N1/N2, N1> N2. According to the analysis of the above circuit, the following expression can be obtained:

u _L1 = nu _L2 (1)

n=N1/N2, N1>N2 (2)

u _L1 =u _L2 +u _C1 (3)

u _L3 =u _i +u _C2 (4)

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 5</span>}<span\; class="notranslate">\; )</span>$

Wherein, u _C1 and u _C2 are the voltages at both ends of the capacitors C1 and C2 respectively.

Mode 2: The equivalent circuit of the circuit shown in Figure 8 when the inverter bridge is in a non-straight-through state. The circuit has three loops, and the loop directions have been marked with dotted lines in Figure ₈ . Capacitor C2 constitutes the first loop of the inverter bridge; power supply U _i , input inductor L3, diode VD1, winding L2 of coupled inductor Lc, and capacitor C1 form the second loop; power supply U _i , input inductor L3, diode VD1, and coupling inductor Lc The winding L1 and the inverter bridge form the third circuit. The input inductance L3 is discharged, and the voltage at one end of the input inductance L3 connected to the power supply U _i is positive, and the voltage at the other end is negative, and the voltage at both ends is u _L3 ; the coupling inductance Lc is discharged, and the induced electromotive force voltage at both ends of the winding L2 is U _L2 , the voltage at the first terminal is positive, and the voltage at the second terminal is negative; the induced electromotive force voltage generated at both ends of the winding L1 is U _L1 , the voltage at the first terminal is positive, and the voltage at the second terminal is negative; because the voltage borne by the diode VD1 is u _VD1 =u _L3 +u _L1 , so the diode VD1 bears the forward voltage and conducts. The first loop: the power supply and input inductor L3 charge the capacitor C2 and also supply power to the load; the second loop: the power supply, input inductor L3 and coupling inductor L1 supply power to the load; the third loop: power supply, input inductor L3 and coupling inductor L2 Charge capacitor C1.

When the circuit is in a non-straight-through state, capacitors C1 and C2 store energy, and both input inductor L3 and coupling inductor Lc release energy. According to the analysis of the above circuit, the following expression can be obtained:

_uL1 = _-uC2 (6)

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u\; L"\; filenames="130815152852.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="1"\; label="u\; L"\; filenames="130815152852.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 7</span>}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="3"\; label="u\; L"\; filenames="130815153012.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="3"\; label="u\; L"\; filenames="130815153012.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 8</span>}<span\; class="notranslate">\; )</span>$

When the circuit is in a steady state, according to the principle of inductive volt-second balance, the average voltage of the winding L2 of the coupled inductor in a switching period T _s is 0, from formula (5) and formula (7):

$\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; DT</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 9</span>}<span\; class="notranslate">\; )</span>$

Among them, D is the direct duty cycle, and the expression of the voltage relationship between capacitor C1 and capacitor C2 can be obtained from formula (9):

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; d</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; )</span>$

When the circuit is in a steady state, according to the principle of inductance volt-second balance, the average voltage of the input inductance L3 in one switching cycle is 0, which can be obtained from formulas (4) and (8):

$<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; DT</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 11</span>}<span\; class="notranslate">\; )</span>$

Substituting Equation (10) into Equation (11) can obtain the relationship expression between the voltage of capacitor C2, capacitor C1 and the voltage of power supply U _i :

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; d</span>}}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}$

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; D.</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}$

In the effective vector state, the peak value of the DC bus voltage u _PN of the inverter bridge is:

${\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; PN</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; C"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="2"\; label="u\; L"\; filenames="130815152843.png,130815152848.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">u</figure-callout></span><figure-callout\; id="1"\; label="u\; C"\; filenames="130815152852.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; D.</span>}}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 12</span>}<span\; class="notranslate">\; )</span>$

Let boost factor $B=\frac{1}{1-(2+\frac{1}{\mathrm{no}-1})\mathrm{D.}}.$

It can be seen from formula (12) that the relationship between the DC bus voltage and the input voltage of the inverter bridge and the boost factor are related to the turn ratio n and the through-duty ratio D. When the through-duty ratio D is constant, the adjustment turns Ratio n can change the boost factor B, thereby adjusting the DC bus voltage. The value of the turn ratio n affects the boost capability. When the boost capability of the circuit to be designed is higher than that of the traditional Z-source inverter or quasi-Z-source inverter, the value range of the turn ratio is: 1<n≤2, that is, the boost capability is higher than

The above theoretical analysis shows that the topology has a boost function, and the smaller the turn ratio, the greater the voltage gain, that is, the higher the boost capability.

其n≥1，而本方案拓扑结构的升压因子B中匝比n的范围为1<n≤2。从而可以看出在实现较高电压增益的情况下，匝比的取法不同，本方案的结构是匝比越小电压增益越大，而tran-Z-source逆变器则是匝比越大电压增益越大。The boost factor of the Tran-Z-source inverter is

Its n≥1, and the range of the turn ratio n in the boost factor B of the topological structure of this scheme is 1<n≤2. It can be seen that in the case of achieving a higher voltage gain, the method of taking the turn ratio is different. The structure of this scheme is that the smaller the turn ratio is, the greater the voltage gain is, and the tran-Z-source inverter is the larger the turn ratio. The greater the gain.

When the topology of this scheme is n>2, the boost factor That is, it is approximately equal to the boost factor of the traditional Z-source inverter and quasi-Z-source inverter circuit topologies shown in Figures 2 and 3 .

Use Saber simulation software to simulate this topology structure, simulation parameters: input voltage 100V, switching frequency 10KHz, modulation ratio 0.8, direct duty cycle 0.2, resistive load R=20Ω, L=29mH, coupling inductor L2=2mH, The turn ratio is 1.7:1, the input inductance is 500uH, the capacitor C1=300uF, and the capacitor C2=100uF. The simulation waveforms are shown in Figure 9, Figure 10, and Figure 11.

The simulation waveforms given in sequence in accompanying drawing 9 are input voltage, input current, DC bus voltage, capacitor C2 voltage, capacitor C1 voltage, and output phase voltage u _an ; as shown in accompanying drawing 9, the output load phase voltage is 104Vrms, which is higher than the input Voltage, realizing the step-up inverter. It is verified by simulation that the topology realizes the boost, and the correctness of the theoretical analysis is verified.

The simulation waveforms given in turn in Figure 10 are expanded input current and DC bus voltage waveforms; as shown in Figure 10, the input current is continuous, about 10A, and the input voltage amplitude is 100V; the DC bus voltage is a series of rectangular waves , in the straight-through state, the DC bus voltage amplitude is 0, and in the non-through state, the DC bus voltage amplitude is boosted to approximately 300V, which is about three times the input voltage amplitude, and the DC link realizes the boost function, so that The DC bus voltage is raised to 300V.

The simulation waveforms shown in Fig. 11 in turn are the voltage across the winding L2 of the coupled inductor, the voltage across the winding L1, and the voltage waveforms borne by the diode VD1. As shown in Figure 11, when the circuit is in the straight-through state, the diode VD1 is subjected to the reverse voltage to cut off, and its reverse voltage amplitude is about 650V; The withstand voltage is about 0V. As shown in Figure 11, when the circuit is in the straight-through state, the amplitude of the induced electromotive voltage u _L2 generated by the coupled inductor L2 is 313V, and the amplitude of the induced electromotive voltage u L1 generated _{by L1} is 532.19V, which is about 1.7 times the relationship; the circuit is in a non- In the through state, there is also a relationship of about 1.7 times. The coupled inductance u _L1 is 1.7 times of u _L2 , that is, the relationship of the turn ratio n. From the above simulation analysis, it can be concluded that the topology structure is feasible to realize the boost inverter, and the correctness of the theoretical analysis is verified.

Claims (3)

1. A single-stage boost inverter, comprising a coupled inductor, a capacitor I, a capacitor II, a diode, an input inductor, and an inverter bridge; wherein the coupled inductor includes a winding I and a winding II; the winding I and the winding II include respectively The first end and the second end, and the first end of the winding I and the first end of the winding II have the same name, and the second end of the winding I and the second end of the winding II have the same name; It is characterized in that: the first end of the winding I is connected to the first end of the winding II, and is connected to the cathode of the diode; the positive pole of the external input power supply is connected to one end of the input inductance, and the other end of the input inductance respectively connected to the anode of the diode and one end of the capacitor II; the second end of the winding I is respectively connected to the other end of the capacitor II and the anode of the input end of the inverter bridge; the second end of the winding II It is connected to one end of the capacitor I; the negative pole of the external input power supply is respectively connected to the other end of the capacitor I and the negative pole of the input terminal of the inverter bridge. 2 . The single-stage boost inverter according to claim 1 , wherein the turn ratio of the winding I and the winding II is greater than 1 and less than or equal to 2. 3 . 3. The single-stage boost inverter according to claim 1, characterized in that: said capacitor I and capacitor II are electrolytic capacitors, wherein the positive pole of said capacitor I is connected to the second end of said winding II , the negative pole of the capacitor I is connected to the negative pole of the input terminal of the inverter bridge and the negative pole of the external power supply respectively; the positive pole of the capacitor II is connected to the second terminal of the winding I and the positive pole of the input terminal of the inverter bridge respectively, and the capacitor The negative electrode of II is respectively connected to the other end of the input inductor and the anode of the diode.

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