CN103441821A - Digital subaudio frequency weak signal processing method - Google Patents
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Abstract
The invention relates to the digital mobile wireless communication technology, in particular to a digital subaudio frequency weak signal processing method. According to the method, first, a digital subaudio frequency signal is oversampled, and all obtained sampling points are accumulated; if reaching a certain symbol length, the accumulated sampling points are subjected to bit synchronization through a bit synchronization algorithm; then, level values of all symbols are classified through an aggregation algorithm, positive / negative level standard values are calculated in a set, and a decision threshold is calculated; sampling decision is conducted at the optimal sampling point of each symbol of the digital subaudio frequency signal, an average algorithm is added into the sampling decision calculation of each symbol, and therefore digital subaudio frequency code meta-information is obtained, namely the extraction of a digital subaudio frequency code is completed. Compared with a traditional method, the digital subaudio frequency weak signal processing method is not affected by hardware sampling rate errors, can obtain the accurate optimal sampling points and decision level in a communication environment with a low signal to noise ratio, effectively reduces the bit error rate of digital subaudio frequency weak signal reception, is wide in application range, and has promotional value.
Description
Technical field
The present invention relates to the digital mobile radio communication technology, particularly relate to a kind of digital infrasonic frequency weak signal processing method.
Background technology
Digital mobile radio communication system (locomotive station, intercom) is in audio signal modulation, and the frequency range of being everlasting lower than audio-frequency unit adds an infrasonic frequency signal, at receiving terminal, by having judged whether the infrasonic frequency signal, determines whether opening noise elimination.Add infrasonic frequency can improve the antijamming capability of digital mobile radio communication system, the selective calling function such as realize different group callings, generally call.
Infrasonic frequency is divided into simulation infrasonic frequency CTCSS and digital infrasonic frequency DCS, and CTCSS and DCS belong to international signaling standard, and wherein CTCSS has 38 standard code, and the DCS code character is generally 83 or 104.Due to the optional code character quantity of DCS, more than CTCSS, the DCS signal digital is processed flexibly, and the Golay coding has error correction, so DCS has some superiority than CTCSS.
The standard baud rate of numeral infrasonic frequency DCS is 134.3Hz, and frequency is lower, and because the waveform frequency that company 1 and 0, the DCS of company code are arranged in the DCS code is lower, about 25Hz～60Hz.For frequency low signal like this, if comprise direct current in signal, this direct current can not be by filtering at hardware circuit series winding electric capacity, because the electric capacity of series winding is in the filtering direct current, can cause the DCS distorted signals serious, so this direct current signal need to filtering in Digital Signal Processing.
Owing in digital infrasonic frequency DCS, having only required baud rate, and for the not restriction of infrasonic frequency signal frequency modulation, so the demodulation of receiver output infrasonic frequency amplitude is unfixing, and the inconsistent variation that may cause the signal frequency modulation due to hardware circuit, the signal amplitude of receiving terminal demodulation output may change, so the digital infrasonic frequency DCS wave-shape amplitude of demodulation output is also uncertain, and can't the hardware filtering due to direct current signal, need in Digital Signal Processing, accurately calculate the decision threshold of DCS code.
In the processing procedure of digital signal, bit synchronization is one of key of processing.Owing to not reserving synchronizing sequence in the coding rule of digital infrasonic frequency DCS, so, when receiving the DCS signal, can not reach bit synchronization by processing synchronizing sequence.The bit synchronization of traditional DCS signal acceptance method is to realize by adjusting local synchronized sampling clock, adjusts sampling clock and realizes that to 134.3Hz the sample rate of receiving terminal is consistent with DCS code sign rate.There is following shortcoming in traditional DCS method of reseptance:
1) due to hardware differences, may there be error in the sample rate of 134.3Hz, and sampling will cause error accumulation for a long time.
2) synchronized sampling can't guarantee the optimum sampling point sampling at each symbol, easily affected by noise when weak signal.
When 3) weak signal is sampled, the sampled point noise may cause the code value mistake in judgment.
4) DC component of signal may cause the code value mistake in judgment.
Reception numeral infrasonic frequency DCS code for can be correct when the weak signal, need a kind of signal processing method of design.
Summary of the invention
Problem in view of above-mentioned prior art exists, the objective of the invention is to design a kind of digital infrasonic frequency weak signal processing method.Pass through the method, realized the equalisation of over-sampled signals to DCS, then utilize an early slow door algorithm to realize bit synchronization, utilize subsequently the level value classification of aggregation algorithms to each symbol, and calculate positive and negative level standard value from set, calculate decision threshold, and add average algorithm in the calculating of each symbol sampling judgement, finally complete the process that the DCS code receives.
The technical scheme that the present invention takes is: a kind of digital infrasonic frequency weak signal processing method, it is characterized in that, at first the method carries out over-sampling to digital infrasonic frequency signal, each sampled point obtained is added up, if cumulative sampled point is synchronous by bit-synchronization algorithm completion bit to a symbol lengths; Use subsequently the level value classification of aggregation algorithms to each symbol, and calculate positive and negative level standard value from set, calculate decision threshold; The judgement of sampling at the optimum sampling point place of each symbol of digital infrasonic frequency signal, and add average algorithm in the calculating of each symbol sampling judgement, obtain digital infrasonic frequency code element information, complete the extraction of digital infrasonic frequency code.
The beneficial effect that the present invention produces is: the present invention compares conventional method, be not subject to the impact of hardware sampling rate error, and under the communication environment of low signal-to-noise ratio, can obtain accurate optimum sampling point and decision level, and then effectively reduce the error rate that digital infrasonic frequency weak signal receives.Applied widely, there is promotional value.
The accompanying drawing explanation
Fig. 1 is overall flow figure of the present invention;
Fig. 2 is the synchronous flow chart of bit-synchronization algorithm completion bit;
Fig. 3 is that aggregation algorithms is calculated the decision threshold flow chart;
Fig. 4 is that digital infrasonic frequency code element information flow chart is obtained in the sampling judgement;
Fig. 5 is that the present invention is applied to the locomotive station system block diagram;
Fig. 6 is locomotive station infrasonic frequency part schematic diagram.
Embodiment
In order more clearly to understand the present invention, describe in detail in conjunction with the accompanying drawings and embodiments: with reference to Fig. 1, at first this method is selected digital infrasonic frequency signal is carried out to over-sampling under the sampling rate of 1.2KHz, each sampled point obtained is added up, if cumulative sampled point is synchronous by bit-synchronization algorithm completion bit to a symbol lengths; Use subsequently the level value classification of aggregation algorithms to each symbol, and calculate positive and negative level standard value from set, calculate decision threshold; The judgement of sampling at the optimum sampling point place of each symbol of digital infrasonic frequency signal, and add average algorithm in the calculating of each symbol sampling judgement, obtain digital infrasonic frequency code element information, complete the extraction of digital infrasonic frequency code.
This method utilizes over-sampling to obtain the sampling buffering of DCS waveform, then waveform averaged, and the DC component of the current DCS waveform of rough estimate.Then utilize early door algorithm completion bit simultaneous operation late, calculate the door and the integration of door late morning that current sampling point is corresponding, relative error is adjusted sampling point position, calculates the signal energy value of the whole symbol lengths that current sampling point is corresponding, and with this error of calculation thresholding.When morning, a door error was less than this error threshold late, think that present bit synchronously completes.
After bit synchronization completes, obtain the optimum sampling point of each symbol, find maximum and minimum value in all symbols, and once for benchmark, set up positive and negative two set, optimum sampling point to each symbol is classified, if the distance of this level point value and positive fiducial value is less than thresholding, just puts into and gathers, if in like manner with the distance of negative fiducial value, be less than thresholding, put into negative set.After whole DCS signal 23 bits of traversal, from just gathering and bear the central point of difference set of computations set, as the standard value of positive negative level, and calculate direct current with this, this direct current is set to decision threshold.
Due to the DC component before bit synchronization, by whole DCS waveform is averaged and calculated, its direct current is estimated to be inaccurate, and larger fluctuation is arranged, and the direct current that aggregation algorithms is calculated is comparatively accurate, but the prerequisite of aggregation algorithms is bit synchronization, completes.So before bit synchronization completes, bit-synchronization algorithm adopts the direct current of the algorithm rough estimate of averaging, and, after bit synchronization completes, bit-synchronization algorithm replaces with by this direct current the D. C. value that aggregation algorithms is calculated, D. C. value can make follow-up bit-synchronization algorithm more accurate more accurately.
After completion bit synchronized algorithm and aggregation algorithms are calculated decision threshold, the algorithm judgement of sampling at the optimum sampling point place of each symbol, for the interference of noise reduction to sampled point under weak signal, algorithm is selected the level value of the some points in average optimum sampling point left and right, be worth with decision threshold and compare with this, finally obtain the DCS code.
With reference to Fig. 2, bit-synchronization algorithm completion bit synchronously has the following steps:
Step 201: digital infrasonic frequency signal is carried out to over-sampling under the sampling rate of 1.2KHz.The symbol rate of numeral infrasonic frequency signal is 134.3Hz, and carry out the operations such as bit synchronization due to needs, need to adjust dynamically, so need to be to equalisation of over-sampled signals, in this method, select digital infrasonic frequency signal is sampled under the sampling rate of 1.2KHz, each symbol is 9 sampled points like this.
Step 202: if previous symbol period has completed bit synchronization, the DC component of using previous symbol period aggregation algorithms accurately to estimate.Because the core of bit-synchronization algorithm is to use early door synchronous method late, and the method judges after current sampled point need to move forward still that moving is relatively early door integration and the relation of an integration late, and this relation is comparatively responsive to DC component, so need to remove the DC component of signal.9 sampled points of every collection, reach the length of a symbol period, bit-synchronization algorithm all can carry out that once to attempt completion bit synchronous, if previous symbol period has completed bit synchronization, algorithm has obtained the optimum sampling point of symbol on bit synchronous basis, and utilize aggregation algorithms to obtain level value accurately, and calculate DC component accurately with this.This step is used the DC component accurately calculated by aggregation algorithms.
Step 203: if previous symbol period does not have completion bit synchronous,, to whole digital infrasonic frequency calculated signals mean value, obtain the rough estimate DC component.Do not complete in bit synchronous situation, current symbol sampling determination point is not on the optimum sampling point of symbol, so the DC component that current aggregation algorithms is calculated does not have reference value, this step obtains the rough estimate DC component to whole DCS calculated signals mean value.Computing formula is as follows:
In formula, CT is the rough estimate DC component, d
nfor n sampled point of DCS signal, the sampled point number that N is whole DCS signal, under the sampling rate of 1.2KHz, mono-group of DCS signal of N=207(is totally 23 symbols, 9 sampled points of each symbol).
Step 204: if synchronously adjust number of times, do not exceed threshold value, take current sampled point as benchmark, set early door scope and door scope late, all sampled points in scope are removed to DC component, and calculate respectively early door scope sampled point and the integrated value of door scope sampled point late.Early the length of door and slow door is chosen as and is slightly larger than
symbol lengths, for this sampling rate, the door length be chosen as 5 sampled points.The too short meeting of door length causes the bit synchronization evaluated error larger, and the long meeting of door length causes operand to strengthen.Computing formula is as follows:
The integrated value that in formula, SE is door morning, S
lfor the integrated value of slow door, the length that L is door, this step L=5, d
nn the sampled point for the DCS signal.
Step 205: calculate the energy value of current sign length waveform, according to this energy value error of calculation thresholding.Because the amplitude of input signal is uncertain, thus early late the error threshold of door be also uncertain, this step is selected to carry out error of calculation thresholding by the energy that calculates a symbol lengths waveform.Computing formula is as follows:
E in formula
sbe the energy of a symbol lengths waveform, the sampled point number that S is a symbol, this step S=9, d
nn the sampled point for the DCS signal.
Early the error threshold of slow door is chosen as energy
.Computing formula is as follows:
T in formula
eerror threshold for slow door morning.
Step 206: calculate early door scope sampled point and the error of the integrated value of door scope sampled point late.Calculate the error of the integrated value of two doors in slow door algorithm morning, i.e. S
e-S
l, when the waveform to removing DC component is carried out early late the door algorithm, be the offset direction that the symbol of error that can be by judging two doors is determined sampled point.
Step 207: if early late the error of the integrated value of door, for just and be greater than error threshold, means that sampled point is leading, by this sampling location point that moves to left, then carry out next rotation bit synchronized algorithm, until surpass synchronous adjustment frequency threshold value or completion bit synchronous.
Step 208: if early the error of the integrated value of slow door is greater than error threshold for negative and absolute value, mean that sampled point has lagged behind, by this sampling location point that moves to right, then carry out next rotation bit synchronized algorithm, until surpass synchronous adjust frequency threshold value or completion bit synchronous.
Step 209: if current morning late the absolute value of the error of the integrated value of door be less than error threshold, think that completion bit is synchronous, current sampled point can be thought the optimum sampling point of symbol.
With reference to Fig. 3, aggregation algorithms is calculated decision threshold and is had the following steps:
Step 301: level maximum and the minimum value of searching the digital infrasonic frequency signal received.Search the level maximum L of 23 symbols of DCS signal
maxwith minimum value L
min.
Step 302: with level maximum L
maxset up and just gather for benchmark, with level minimum value L
minfor benchmark is set up negative set, and by level maximum L
maxwith minimum value L
min1/2 being set to apart from decision threshold of distance, definition level maximum L
maxfor positive benchmark, level value minimum value L
minfor negative benchmark.
Step 303: if all symbols (23 symbols) search does not complete, calculate the distance of current sign level and positive benchmark.Computing formula is as follows:
In formula
be n symbol level S
nwith positive benchmark L
maxdistance.
Step 304: if the distance of current sign level and positive benchmark be less than setting apart from decision threshold, this symbol just is included into and gathers.
Step 305: if the distance of current sign level and positive benchmark be greater than setting apart from decision threshold, calculate the distance of current sign level and negative benchmark.Computing formula is as follows:
In formula
be n symbol level S
nwith negative benchmark L
mindistance.
Step 306: if the distance of current sign level and negative benchmark be less than setting apart from decision threshold, this symbol is included into to negative set.
Step 307: return to step 303, calculate the distance of next symbol to positive benchmark and negative benchmark, and put into corresponding set.Travel through 23 symbols of DCS signal.
Step 308: if all symbols (23 symbols) have been searched for, calculate each symbol in just gathering and close to the distance of other symbol.Computing formula is as follows:
In formula
for positive set symbol level S
mto just gathering other symbol level S
nthe distance close, the number that M is positive set symbol.
Step 309: find and just gather middle distance and close minimum symbol S
m, by the level S of this symbol
mbe defined as positive level standard value L
p.
Step 310: in the negative set of calculating, the distance of each symbol and other symbol is closed.Computing formula is as follows:
In formula
for negative set symbol level S
mto negative other symbol of set S
ndistance close, M is the number of negative set symbol.
Step 311: find negative set middle distance to close minimum symbol S
m, by the level S of this symbol
mbe defined as negative level standard value L
n.
Step 312: calculate DC component by positive level standard value and negative level standard value, this DC component is set to the decision threshold of DCS sampling judgement.Computing formula is as follows:
C in formula
rfor the DC component exact value, this value is set to the decision threshold of DCS sampling judgement.
With reference to Fig. 4, the sampling judgement is obtained digital infrasonic frequency code element information and is had the following steps:
Step 401: the optimum sampling point position of calculating current sign.1.2KHz, under sampling rate, each symbol has 9 sampled points, so the optimum sampling point position of each symbol is that symbol optimum sampling point position is offset 9 points backward before.
Step 402: calculate near the average of putting optimum sampling point.Because DCS Signal-to-Noise under weak signal is less, noise jamming will cause the optimum sampling point position level fluctuation of each symbol larger, and then mistake in judgment likely, so this step select near point optimum sampling point is got to average, thereby the noise reduction fluctuation is on the impact of judgement.Computing formula is as follows:
A in formula
mfor the symbol average of corresponding optimum sampling point position m, S
nfor n sampled point of DCS signal, E is the scope of getting average, selects to comprise each two points of left and right in this step and averages, so E=2.
Step 403: if near optimum sampling point, the average of point is greater than the decision threshold that digital infrasonic frequency sampling is adjudicated, adjudicating current sign is 1.
Step 404: if near optimum sampling point, the average of point is less than the decision threshold that digital infrasonic frequency sampling is adjudicated, adjudicating current sign is 0.
By each symbol of the DCS signal judgement of sampling to input, obtain the DCS digital signal, digital signal is carried out to decode operation, finally complete DCS code receiving course.
With reference to Fig. 5, Fig. 5 is that the present invention is applied to the locomotive station system block diagram.The radio band signal, after antenna reception, completes down-conversion and demodulation operation by channel device.Waveform after demodulation is divided into audio-frequency unit and infrasonic frequency part by the baseband filtering circuit, and then the supplied with digital signal treatment circuit completes the digital processing to signal, is converted into the operations such as voice.Signal is converted to simulated sound by voicefrequency circuit subsequently, then by loudspeaker, changes the sound of hearing into people's ear.
With reference to Fig. 6, the particular hardware that has provided the DCS signal processing of locomotive station in figure forms.Network label sub-tone in figure is the infrasonic frequency signal input part, and the signal of the signal of channel device demodulation after the infrasonic frequency low pass filter is in this network label place input.Capacitor C 129 is capacitance, the DC component of filtering infrasonic frequency signal.Device N15A is operational amplifier chip 2904, this chip and resistance R 178, resistance R 177 form reverse amplification circuit, for the infrasonic frequency signal is amplified, the noise section that capacitor C 130 is higher for rejection frequency, the power supply of 5V is by 8 pin inputs of operational amplifier chip 2904, and capacitor C 135 and capacitor C 132 are for the noise of filtering 5V power supply.The voltage of 5V is by resistance R 176 and resistance R 175 dividing potential drops, and by 3 pin inputs of operational amplifier chip 2904, as the reference voltage of operational amplifier chip 2904.Capacitor C 131 is for the DC component of filtering sign-changing amplifier output.Resistance R 186 and R185, by the 3.3V decile of powering, for a positive fixed-bias transistor circuit of stack on the infrasonic frequency signal, are converted into positive voltage by whole infrasonic frequency signal, facilitate the ADC of back to gather.Capacitor C 140 is for the high fdrequency component of filtering infrasonic frequency signal.
Digital signal processing circuit is chosen as the mixture control 56F8322 that Freescale company produces, this chip has the operational capability of DSP and the function of microcontroller, this chip has 6 ADC input pins, the ADC input pin ANA4 of this programme choice for use 23 pin is as input, the infrasonic frequency signal that the input demodulation obtains, chip 56F8322 is the speed collection DCS signal with 1.2KHz by on-chip timer, then in sheet, completes the computing of algorithm, finally completes the reception of DCS code.
According to the above description, can realize the solution of the present invention in conjunction with art technology.
Claims (4)
1. a digital infrasonic frequency weak signal processing method, it is characterized in that, at first the method carries out over-sampling to digital infrasonic frequency signal, and each sampled point obtained is added up, if cumulative sampled point is synchronous by bit-synchronization algorithm completion bit to a symbol lengths; Use subsequently the level value classification of aggregation algorithms to each symbol, and calculate positive and negative level standard value from set, calculate decision threshold; The judgement of sampling at the optimum sampling point place of each symbol of digital infrasonic frequency signal, and add average algorithm in the calculating of each symbol sampling judgement, obtain digital infrasonic frequency code element information, complete the extraction of digital infrasonic frequency code.
2. a kind of digital infrasonic frequency weak signal processing method according to claim 1, is characterized in that, bit-synchronization algorithm completion bit synchronously has the following steps:
Step 201: digital infrasonic frequency signal is carried out to over-sampling;
Step 202: if previous symbol period has completed bit synchronization, the DC component of using previous symbol period aggregation algorithms accurately to estimate;
Step 203: if previous symbol period does not have completion bit synchronous,, to whole digital infrasonic frequency calculated signals mean value, obtain the rough estimate DC component;
Step 204: if synchronously adjust number of times, do not exceed threshold value, take current sampled point as benchmark, set early door scope and door scope late, all sampled points in scope are removed to DC component, and calculate respectively early door scope sampled point and the integrated value of door scope sampled point late;
Step 205: calculate the energy value of current sign length waveform, according to this energy value error of calculation thresholding;
Step 206: calculate early door scope sampled point and the error of the integrated value of door scope sampled point late;
Step 207: if early late the error of the integrated value of door is for just and be greater than error threshold, the point that this sampling location moved to left, then carry out next rotation bit synchronized algorithm, until surpass synchronous adjustment frequency threshold value or completion bit synchronous;
Step 208: if early late the error of the integrated value of door is greater than error threshold for negative and absolute value, the point that this sampling location moved to right, then carry out next rotation bit synchronized algorithm, until surpass synchronous adjust frequency threshold value or completion bit synchronous;
Step 209: if current morning late the absolute value of the error of the integrated value of door be less than error threshold, think that completion bit is synchronous, current sampled point can be thought the optimum sampling point of symbol.
3. a kind of digital infrasonic frequency weak signal processing method according to claim 1, is characterized in that, uses aggregation algorithms to calculate decision threshold and have the following steps:
Step 301: level maximum and the minimum value of searching the digital infrasonic frequency signal received;
Step 302: the level maximum of take is set up and is just gathered as benchmark, the level minimum value of take is set up and is born set as benchmark, and 1/2 of the distance of level maximum and minimum value is set to apart from decision threshold, definition level maximum is positive benchmark, the level value minimum value is negative benchmark;
Step 303: if all symbol search do not complete, calculate the distance of current sign level and positive benchmark;
Step 304: if the distance of current sign level and positive benchmark be less than setting apart from decision threshold, this symbol just is included into and gathers;
Step 305: if the distance of current sign level and positive benchmark be greater than setting apart from decision threshold, calculate the distance of current sign level and negative benchmark;
Step 306: if the distance of current sign level and negative benchmark be less than setting apart from decision threshold, this symbol is included into to negative set;
Step 307: return to step 303, calculate the distance of next symbol to positive benchmark and negative benchmark, and put into corresponding set;
Step 308: if all symbol search complete, calculate each symbol in just gathering to other symbol apart from closing;
Step 309: find and just gather middle distance and close minimum symbol, the level of this symbol is defined as to the positive level standard value;
Step 310: in the negative set of calculating, the distance of each symbol and other symbol is closed;
Step 311: find negative set middle distance to close minimum symbol, the level of this symbol is defined as to the negative level standard value;
Step 312: calculate DC component by positive level standard value and negative level standard value, this DC component is set to the decision threshold of digital infrasonic frequency sampling judgement.
4. a kind of digital infrasonic frequency weak signal processing method according to claim 1, is characterized in that, the sampling judgement is obtained digital infrasonic frequency code element information and had the following steps:
Step 401: the optimum sampling point position of calculating current sign;
Step 402: calculate near the average of putting optimum sampling point;
Step 403: if near optimum sampling point, the average of point is greater than the decision threshold that digital infrasonic frequency sampling is adjudicated, adjudicating current sign is 1;
Step 404: if near optimum sampling point, the average of point is less than the decision threshold that digital infrasonic frequency sampling is adjudicated, adjudicating current sign is 0.
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| CN104378135A (en) * | 2014-11-14 | 2015-02-25 | 天津七一二通信广播有限公司 | Reconnection communication forwarding radio station for digital and analog mixed signals |
| CN104486060A (en) * | 2014-12-24 | 2015-04-01 | 中电科（宁波）海洋电子研究院有限公司 | Bit synchronization method and system based on sliding integration |
| CN114465628A (en) * | 2022-01-19 | 2022-05-10 | 南京中新赛克科技有限责任公司 | Accurate sub-audio CTCSS frequency searching system and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104378135A (en) * | 2014-11-14 | 2015-02-25 | 天津七一二通信广播有限公司 | Reconnection communication forwarding radio station for digital and analog mixed signals |
| CN104486060A (en) * | 2014-12-24 | 2015-04-01 | 中电科（宁波）海洋电子研究院有限公司 | Bit synchronization method and system based on sliding integration |
| CN104486060B (en) * | 2014-12-24 | 2017-07-21 | 中电科（宁波）海洋电子研究院有限公司 | A kind of bit bit synchronization method and system based on running integral |
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