CN103425226B - Memory card device, computer system and solid state disk control method thereof - Google Patents

Memory card device, computer system and solid state disk control method thereof Download PDF

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Publication number
CN103425226B
CN103425226B CN201210154004.6A CN201210154004A CN103425226B CN 103425226 B CN103425226 B CN 103425226B CN 201210154004 A CN201210154004 A CN 201210154004A CN 103425226 B CN103425226 B CN 103425226B
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memory card
controller
hard disk
disk interface
solid hard
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CN201210154004.6A
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CN103425226A (en
Inventor
殷志杰
林哲纬
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Acer Inc
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Acer Inc
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Abstract

The invention provides a kind of memory card device, computer system and solid state disk control method thereof.The solid state disk control method carried comprises the following steps.There is provided a main frame, this main frame comprises embedded controller, chipset and testing circuit.There is provided a memory card device, this memory card device comprises the first controller, solid hard disk interface and identification circuit.When memory card device is connected to main frame, solid hard disk interface is couple to embedded controller, chipset and testing circuit, uses and makes testing circuit react on identification circuit generation one detection voltage.If memory card device enters battery saving mode, and after a Preset Time, then chipset transmits an enable signal to solid hard disk interface according to detection voltage, uses and makes memory card device enter complete park mode.

Description

Memory card device, computer system and solid state disk control method thereof
Technical field
The invention relates to a kind of solid state hard disc control technology, and relate to a kind of memory card device, computer system and its solid state disk control method especially.
Background technology
For the device of existing tool Winchester disk drive (harddiskdrive, HDD) or solid state hard disc (solidstatedisk, SSD), when idle condition, battery saving mode can be entered by the setting of power management.So-called battery saving mode can be divided into partial sleep pattern (partialmode) and slumber mode (slumbermode).But when aforementioned means entering part sleep pattern, host side still needs every 10 μ s to wake up once, or when aforementioned means enters slumber mode, host side also needs every 10ms to wake up once.That is, aforementioned means cannot enter complete dormancy, so cannot close electricity and there is the phenomenon of power consumption.
In addition, for existing SSD device, SSD device only has one group for the control data IC stored and the storage particle preserved for data, therefore after use for a long time, storage particle on SSD device likely can damage, so there is the risk of Missing data, time serious, more may cause using the electronic equipment of SSD device cannot normal operation.As can be seen here, current SSD device still has many improvements.
Summary of the invention
In view of this, the present invention proposes a kind of memory card device, computer system and its solid state disk control method, uses the problem solved involved by prior art.
The present invention proposes a kind of computer system, and it comprises a main frame and a memory card device.Main frame comprises an embedded controller, a chipset and a testing circuit.Chipset is couple to embedded controller.Testing circuit is couple to embedded controller.Memory card device comprises one first controller, a solid hard disk interface and an identification circuit.Solid hard disk interface couples the first controller.Identification circuit couples solid hard disk interface.When memory card device is connected to main frame, solid hard disk interface is couple to embedded controller, chipset and testing circuit, uses and makes testing circuit react on identification circuit generation one detection voltage.If memory card device enters battery saving mode, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, then chipset transmits an enable signal to solid hard disk interface according to detection voltage, uses and makes memory card device enter complete park mode.
The present invention separately proposes a kind of solid state disk control method, comprises the following steps.There is provided a main frame, wherein main frame comprises an embedded controller, a chipset and a testing circuit, and embedded controller is couple to chipset and testing circuit.There is provided a memory card device, wherein memory card device comprises one first controller, a solid hard disk interface and an identification circuit, and solid hard disk interface is couple to the first controller and identification circuit.When memory card device is connected to main frame, solid hard disk interface is couple to embedded controller, chipset and testing circuit, uses and makes testing circuit react on identification circuit generation one detection voltage.If memory card device enters battery saving mode, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, then chipset transmits an enable signal to solid hard disk interface according to detection voltage, uses and makes memory card device enter complete park mode.
The present invention separately proposes a kind of memory card device, and be suitable for a main frame and use, wherein main frame comprises an embedded controller, a chipset and a testing circuit, and embedded controller is couple to chipset and testing circuit.Memory card device comprises one first controller, a solid hard disk interface and an identification circuit, and solid hard disk interface is couple to the first controller and identification circuit.When memory card device is connected to main frame, solid hard disk interface is couple to embedded controller, chipset and testing circuit, uses and makes testing circuit react on identification circuit generation one detection voltage.If memory card device enters battery saving mode, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, then chipset transmits an enable signal to solid hard disk interface according to detection voltage, uses and makes memory card device enter complete park mode.
In one embodiment of this invention, solid hard disk interface is miniature sequence advanced technology attachment (miniserialadvancedtechnologyattachment, mSATA) interface.
In one embodiment of this invention, testing circuit comprises one first resistance and one second resistance, and the first resistance is coupled between embedded controller and an earth terminal.Second resistance is coupled between an operating voltage and solid hard disk interface.
In one embodiment of this invention, memory card device also comprises a first memory unit, a second controller and a second memory unit.First memory unit operates in order to react on the control of the first controller, and wherein the first controller is coupled to the standard pin of solid hard disk interface.Second controller couples the outer reservation pin of the standard pin of solid hard disk interface.Second memory unit process in second controller control and operate.
In one embodiment of this invention, first memory unit and second memory unit mutually do data backup and form the disk of a stripe set (RAID0).
Due to above reason, the present invention adopts testing circuit because of main frame, and memory card device adopts identification circuit, can produce a detection voltage, make main frame learn the kind of memory card device when memory card device is connected to main frame.And enter battery saving mode at memory card device, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, main frame transmits an enable signal to memory card device according to detection voltage, uses and makes memory card device enter complete park mode, reaches and closes electricity and power saving.On the other hand, the present invention can make memory card device expand to two groups of controllers for data storing, mutually do data backup and form the disk application of a stripe set (RAID0), so can pulling speed, data backup and lower the risk of Missing data significantly.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Accompanying drawing explanation
Accompanying drawing is below a part for instructions of the present invention, shows embodiments of the invention, and accompanying drawing illustrates principle of the present invention together with the description of instructions.
Fig. 1 is the schematic diagram of the computer system according to one embodiment of the invention;
Fig. 2 is the schematic diagram of the computer system according to another embodiment of the present invention;
Fig. 3 is the process flow diagram of the solid state disk control method according to one embodiment of the invention.
Description of reference numerals:
10: memory cell;
12: controller;
30: identification circuit;
40: solid hard disk interface;
50: memory card device;
60: embedded controller;
70: chipset;
80: testing circuit
90: main frame;
100: computer system;
GND: earth terminal;
Pin12, Pin8: the reservation pin outside standard pin;
R1, R2: resistance;
SDEVSLP: enable signal;
VCC: operating voltage;
VDET: detect voltage;
S301 ~ S315: each step of the solid state disk control method of one embodiment of the invention.
Embodiment
With detailed reference to embodiments of the invention, and the example of described embodiment is described in the accompanying drawings.In addition, all may part, in graphic and embodiment, use the element/component of identical label to represent identical or similar portions.
Fig. 1 is the schematic diagram of the computer system 100 according to one embodiment of the invention.Refer to Fig. 1.Computer system 100 comprises memory card device 50 and main frame 90.Wherein main frame 90 comprises embedded controller 60, chipset 70 and testing circuit 80.Further, embedded controller 60 is coupled between chipset 70 and testing circuit 80.
Memory card device 50 is a kind of device of solid state hard disc (solidstatedisk, SSD), and it comprises memory cell 10, controller 12, solid hard disk interface 40 and identification circuit 30.Solid hard disk interface 40 is coupled between controller 12 and identification circuit 30.And memory cell 10 can react on the control of controller 12 and operate.Memory cell 10 can be not b gate flash memory (NANDflashmemory), but not as limit.
When memory card device 50 is connected to main frame 90, solid hard disk interface 40 can be couple to embedded controller 60, chipset 70 and testing circuit 80, uses to make testing circuit 80 can react on identification circuit 30 to produce a detection voltage VDET.On the other hand, the battery saving mode of power management can be partial sleep pattern and slumber mode.If memory card device 50 enters battery saving mode, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, then chipset 70 can transmit an enable signal SDEVSLP to solid hard disk interface 40 according to detection voltage VDET, uses and makes memory card device 50 close electric energy and enter complete park mode.
In some embodiments, identification circuit 30 can comprise resistance R1, and this resistance R1 is coupled between operating voltage VCC and solid hard disk interface 40.Testing circuit 80 comprises resistance R2, and this resistance R2 is coupled between embedded controller 60 and earth terminal GND.When memory card device 50 is connected to main frame 90, by voltage divider principle, a detection voltage VDET can be produced.Embedded controller 60 can distinguish the kind of memory card device according to the level of inputted detection voltage VDET.For not there is the memory card device of identification circuit 30, detect the zero potential that voltage VDET can be earth terminal.
Based on above-mentioned, the embodiment of the present invention adopts testing circuit because of main frame, and memory card device adopts identification circuit, and can produce a detection voltage when memory card device is connected to main frame, makes main frame learn the kind of memory card device.And enter battery saving mode at memory card device, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, main frame transmits an enable signal to memory card device according to detection voltage, use and make memory card device enter complete park mode, reach the object of closing electricity and power saving.
Clearer, solid hard disk interface 40 can be miniature sequence advanced technology attachment (miniserialadvancedtechnologyattachment, mSATA) interface.About mSATA interface 40, there are 52 pins, wherein standard pin be the 2nd, 4,6,9,15,18,21,23-35,37,39-41,43,45,47-52, remaining pin is for retaining pin.The 12nd pin Pin12 in pin and the 8th pin Pin8 is retained with being connected to for the design receiving enable signal SDEVSLP can be configured for identification circuit 30.Note that configured reservation pin is not as limit, all are looked closely actual design demand and discuss.
Fig. 2 is the schematic diagram of the computer system 200 according to another embodiment of the present invention.Refer to Fig. 2.Computer system 200 comprises main frame 90 and memory card device 150, and wherein computer system 200 is similar to the framework of computer system 100, and identical part asks for an interview the content of Fig. 1 embodiment.Now only be described in detail for difference.
Memory card device 150 comprises memory cell 10, controller 12, memory cell 20, controller 22 and solid hard disk interface 40.Memory cell 10 operates in order to react on the control of controller 12, and its middle controller 12 is coupled to the standard pin of solid hard disk interface 40.Memory cell 20 reacts on the control of controller 22 and operates, and controller 22 couple solid hard disk interface 40 standard pin outside reservation pin.The present embodiment can make memory card device 150 expand to two groups of controllers 12,22 for data storing.
It is worth mentioning that at this, for Redundant Array of Independent Disks (RAID) (RedundantArrayofIndependentDisks, RAID) application, memory card device 150 (Ssd apparatus) can make memory cell 10,20 mutually do data backup and form the disk application of a stripe set (RAID0), and RAID0's is fastest, thus memory card device 150 can pulling speed, data backup and lower the risk of Missing data significantly.
In addition, when solid hard disk interface 40 is mSATA interface, controller 12 can be coupled to solid hard disk interface 40 standard pin the 23rd, 25,31,33 pins.Controller 22 can be coupled to the standard pin of mSATA interface 40 outer reservation pin the 3rd, 5,11,13 pins, or be coupled to the 36th, 38,46,48 pins.Note that configured reservation pin is not as limit, all are looked closely actual design demand and discuss.
Based on the content that above-described embodiment discloses, can converge whole go out a kind of general solid state disk control method.Clearer, Fig. 3 is depicted as the process flow diagram of the solid state disk control method of one embodiment of the invention.Please refer to Fig. 1 and Fig. 3, the solid state disk control method of the present embodiment can comprise the following steps:
Step S301, provides a main frame 90.Main frame 90 comprises embedded controller 60, chipset 70 and testing circuit 80, and wherein embedded controller 60 is couple to chipset 70 and testing circuit 80.
Step S303, provides a memory card device 50.Memory card device 50 comprises controller 12, solid hard disk interface 40 and identification circuit 30, and wherein solid hard disk interface 40 is couple to controller 12 and identification circuit 30.
Step S305, is connected main frame 90 with memory card device 50.Then carry out step S307, judge whether to produce and detect voltage VDET, if judged result is yes, then enter step S309.Wherein, when memory card device 50 is connected to main frame 90, solid hard disk interface 40 can be couple to embedded controller 60, chipset 70 and testing circuit 80, uses to make testing circuit 80 react on identification circuit 30 to produce a detection voltage VDET.
Step S309, judges whether to enter battery saving mode, if judged result is yes, then enters step S311.
Step S311, judges whether through a Preset Time or is waken up pre-determined number but receives use instruction yet, if judged result is yes, then entering step S313.
Step S313, the chipset 70 of main frame 90 transmits the solid hard disk interface 40 of an enable signal SDEVSLP to memory card device 50 according to detection voltage VDET.Then carry out step S315, memory card device 50 enters complete park mode according to enable signal SDEVSLP, reaches the object of closing electricity and power saving.
In sum, the present invention adopts testing circuit because of main frame, and memory card device adopts identification circuit, can produce a detection voltage, make main frame learn the kind of memory card device when memory card device is connected to main frame.And enter battery saving mode at memory card device, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, main frame transmits an enable signal to memory card device according to detection voltage, uses and makes memory card device enter complete park mode, reaches and closes electricity and power saving.On the other hand, the present invention can make memory card device expand to two groups of controllers for data storing, mutually do data backup and form the disk application of a stripe set (RAID0), so can pulling speed, data backup and lower the risk of Missing data significantly.
Last it is noted that above each embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein some or all of technical characteristic; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.

Claims (8)

1. a computer system, is characterized in that, comprising:
One main frame, comprising:
One embedded controller;
One chipset, couples this embedded controller; And
One testing circuit, couples this embedded controller; And
One memory card device, comprising:
One first controller;
One solid hard disk interface, couples this first controller;
One identification circuit, couples this solid hard disk interface;
One first memory unit, react on the control of this first controller and operate, wherein this first controller is coupled to the standard pin of this solid hard disk interface;
One second controller, the reservation pin outside the standard pin coupling this solid hard disk interface; And
One second memory unit, reacts on the control of this second controller and operates:
Wherein, when this memory card device is connected to this main frame, this solid hard disk interface is couple to this embedded controller, this chipset and this testing circuit, uses and makes this testing circuit react on this identification circuit generation one detection voltage; And
If this memory card device enters battery saving mode, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, then this chipset transmits an enable signal to this solid hard disk interface according to this detection voltage, uses and makes this memory card device enter complete park mode.
2. computer system according to claim 1, is characterized in that, this testing circuit comprises:
One first resistance, is coupled between this embedded controller and an earth terminal; And
One second resistance, is coupled between an operating voltage and this solid hard disk interface.
3. computer system according to claim 1, is characterized in that, this first memory unit and this second memory unit mutually do data backup and form the disk of a stripe set.
4. a solid state disk control method, is characterized in that, comprising:
There is provided a main frame, wherein this main frame comprises an embedded controller, a chipset and a testing circuit, and this embedded controller is couple to this chipset and this testing circuit;
There is provided a memory card device, wherein this memory card device comprises one first controller, a solid hard disk interface and an identification circuit, and this solid hard disk interface is couple to the first controller and this identification circuit;
When this memory card device is connected to this main frame, this solid hard disk interface is couple to this embedded controller, this chipset and this testing circuit, uses and makes this testing circuit react on this identification circuit generation one detection voltage; And
If this memory card device enters battery saving mode, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, then this chipset transmits an enable signal to this solid hard disk interface according to this detection voltage, uses and makes this memory card device enter complete park mode;
Wherein this memory card device also comprises:
One first memory unit, react on the control of this first controller and operate, wherein this first controller is coupled to the standard pin of this solid hard disk interface;
One second controller, the reservation pin outside the standard pin being coupled to this solid hard disk interface; And
One second memory unit, reacts on the control of this second controller and operates.
5. solid state disk control method according to claim 4, is characterized in that, this testing circuit comprises:
One first resistance, is coupled between this embedded controller and an earth terminal; And
One second resistance, is coupled between an operating voltage and this solid hard disk interface.
6. a memory card device, be suitable for a main frame and use, it is characterized in that, this main frame comprises an embedded controller, a chipset and a testing circuit, and this embedded controller is couple to this chipset and this testing circuit, and this memory card device comprises:
One first controller;
One solid hard disk interface, couples this first controller;
One identification circuit, couples this solid hard disk interface;
One first memory unit, react on the control of this first controller and operate, wherein this first controller is coupled to the standard pin of this solid hard disk interface;
One second controller, the reservation pin outside the standard pin coupling this solid hard disk interface; And
One second memory unit, reacts on the control of this second controller and operates;
Wherein, when this memory card device is connected to this main frame, this solid hard disk interface is couple to this embedded controller, this chipset and this testing circuit, uses and makes this testing circuit react on this identification circuit generation one detection voltage; And
If this memory card device enters battery saving mode, and through a Preset Time or be waken up pre-determined number but receive yet and use after instruction, then this chipset transmits an enable signal to this solid hard disk interface according to this detection voltage, uses and makes this memory card device enter complete park mode.
7. memory card device according to claim 6, is characterized in that, this testing circuit comprises:
One first resistance, is coupled between this embedded controller and an earth terminal; And
One second resistance, is coupled between an operating voltage and this solid hard disk interface.
8. memory card device according to claim 6, is characterized in that, this first memory unit and this second memory unit mutually do data backup and form the disk of a stripe set.
CN201210154004.6A 2012-05-17 2012-05-17 Memory card device, computer system and solid state disk control method thereof Active CN103425226B (en)

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Publication number Priority date Publication date Assignee Title
CN104952476B (en) * 2015-07-08 2017-07-25 中孚信息股份有限公司 A kind of reliable mobile storage medium and implementation method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7109865B2 (en) * 2002-09-26 2006-09-19 Massachusetts Institute Of Technology Tag interrogation with observable response signal
TWM309163U (en) * 2006-08-02 2007-04-01 Wepro Technology Co Ltd Display device of memory card
CN101192093A (en) * 2006-11-20 2008-06-04 泽玮科技股份有限公司 External hard disk electricity-saving method
TW201106571A (en) * 2009-08-03 2011-02-16 Hon Hai Prec Ind Co Ltd Power control circuit for hard disk drive

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7109865B2 (en) * 2002-09-26 2006-09-19 Massachusetts Institute Of Technology Tag interrogation with observable response signal
TWM309163U (en) * 2006-08-02 2007-04-01 Wepro Technology Co Ltd Display device of memory card
CN101192093A (en) * 2006-11-20 2008-06-04 泽玮科技股份有限公司 External hard disk electricity-saving method
TW201106571A (en) * 2009-08-03 2011-02-16 Hon Hai Prec Ind Co Ltd Power control circuit for hard disk drive

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