CN103399720B - A kind of data processing method and a kind of electronic equipment - Google Patents

A kind of data processing method and a kind of electronic equipment Download PDF

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CN103399720B
CN103399720B CN201310298085.1A CN201310298085A CN103399720B CN 103399720 B CN103399720 B CN 103399720B CN 201310298085 A CN201310298085 A CN 201310298085A CN 103399720 B CN103399720 B CN 103399720B
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data
osd
buffer area
ddr
dma controller
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CN103399720A (en
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孙进伟
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Hisense Visual Technology Co Ltd
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Qingdao Hisense Xinxin Technology Co Ltd
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Abstract

This application discloses a kind of data processing method and a kind of electronic equipment, method comprises: when needs by screen menu type regulate (OSD) data be presented on display module time, by dma controller obtain register configuration shield reading manner; Based on shielding reading manner, determine the initial reading address of osd data in DDR by dma controller; Send corresponding reading order by dma controller to DDR, from DDR, read osd data according to initial reading address, and by osd data successively stored in N number of buffer area, wherein, N is positive integer; Based on shielding reading manner, extract osd data by dma controller with reverse sequence from N number of buffer area, and osd data is sent to display module display, wherein, reverse sequence is contrary stored in order during osd data to N number of buffer area with dma controller.

Description

A kind of data processing method and a kind of electronic equipment
Technical field
The present invention relates to electronic technology field, particularly a kind of data processing method and a kind of electronic equipment.
Background technology
At present, in LCDs, the high definition of screen and large scale, less thickness has become the development trend of LCDs.In order to pursue thinner screen, circuit main board and power panel etc. can be placed as in base by a lot of manufacturer, and be also positioned at the top of screen due to the TCON of screen, distance circuit board is too far away, be unfavorable for the transmission of signal, thus a lot of manufacturer starts to take screen to be inverted, TCON(TimerControlRegister, time schedule controller) be placed on below screen base in, to save the space of LCDs.And for TCON, TCON is the display timing generator for controlling screen, because the display circuit board in display screen is near the first row (mode of screen scanning generally scans in accordance with the order from top to bottom) of screen scanning, and in order to make the control of TCON more accurate, in general TCON is together with the first row of screen scanning.Therefore, after TCON is placed on base, the sequential control mode of TCON can be changed, and then change OSD(on-screendisplay, screen menu type regulative mode) display of data.The picture of osd data now likely for standing upside down, the display of such as, osd data in Fig. 1.
In order to obtain the display image of the osd data of forward, before user interface display image, this osd data is all needed to carry out rotation process, but the applicant finds in the process realizing the application, prior art is generally the method utilizing software, utilize algorithm to rotate existing osd data, form postrotational image and store, then utilize DMA to move rear direct display.And osd data is all be stored in DDR, when CPU from DDR, osd data is read out calculate time, DDR can open up special memory block to store postrotational osd data, and the memory usage causing DDR is comparatively large, the efficiency of the low system of a step-down of going forward side by side.
Therefore, the technical matters that prior art exists is: need DDR to open up special memory block to store postrotational osd data, causes the memory usage of DDR comparatively large, the efficiency of the low system of a step-down of going forward side by side.
Summary of the invention
The invention provides a kind of data processing method and a kind of electronic equipment, special memory block is opened up to store postrotational osd data in order to solve the DDR that needs existed in prior art, cause the memory usage of DDR comparatively large, the technical matters of the efficiency of the low system of a step-down of going forward side by side.
On the one hand, the present invention, by an embodiment of the application, provides following technical scheme:
A kind of data processing method, described method comprises: when screen menu type regulates (OSD) data to be presented on display module by needs, and what obtain register configuration by dma controller shields reading manner; Shield reading manner based on described, determine the initial reading address of described osd data in described DDR by described dma controller; Send corresponding reading order by described dma controller to described DDR, from described DDR, read described osd data according to described initial reading address, and by described osd data successively stored in N number of buffer area, wherein, N is positive integer; Reading manner is shielded based on described, from described N number of buffer area, described osd data is extracted with reverse sequence by described dma controller, and described osd data is sent to the display of described display module, wherein, described reverse sequence is contrary stored in order during described osd data to described N number of buffer area with described dma controller.
On the other hand, the present invention is provided by another embodiment of the application:
A kind of electronic equipment, described electronic equipment comprises: Installed System Memory (DDR), display module, and is connected to the dma module between described DDR and described display module; Described DDR, regulates (OSD) data for storing screen menu type; Described dma module, comprises dma controller, register and N number of buffer area, and wherein, N is positive integer; Wherein said dma controller is connected with described DDR, and described register is connected with described dma controller, described N number of buffer area and described DDR, described display module, and described dma controller three connects; What be configured with described osd data in described register shields reading manner; Described dma controller, for when described osd data is presented on described display module by needs, shields reading manner described in obtaining from described register; Then determine the initial reading address of described osd data in described DDR based on described screen reading manner, and send corresponding reading order to described DDR, from described DDR, read described osd data according to described initial reading address; Then by described osd data stored in N number of buffer area, and from described N number of buffer area, extract described osd data with reverse sequence and be sent to display module display, wherein, described reverse sequence is contrary stored in order during described osd data to described N number of buffer area with described dma controller; Described display module, for receiving from described N number of buffer area and showing described osd data.
One or more technical schemes in technique scheme, have following technique effect or advantage:
Data processing method of the present invention be when needs by screen menu type regulate (OSD) data be presented on display module time, by dma controller obtain register configuration shield reading manner; Then based on shielding reading manner, the initial reading address of osd data in DDR is determined by dma controller; Send corresponding reading order by dma controller to DDR again, from DDR, read osd data according to initial reading address, and by osd data successively stored in N number of buffer area, wherein, N is positive integer; Finally, based on shielding reading manner, from N number of buffer area, extract osd data with reverse sequence by dma controller, and osd data is sent to display module display, wherein, reverse sequence is contrary stored in order during osd data to N number of buffer area with dma controller.The present invention shields reading manner by what configure in reading register, to read data stored in N number of buffer area from DDR, and show with reverse sequence extraction data from N number of buffer area, realize osd data to rotate, hardware is only needed to carry out in whole process, N number of buffer area is used to replace in DDR, open up special memory block, and in a register configuration fall screen reading manner use for dma controller, without the need to using software algorithm, osd data is rotated, too much can not take the internal memory of DDR, and then the service efficiency of system can be improved.The present invention can be applied to flatscreen electronic equipment TCON being positioned over base, and is applicable to common giant-screen electronic equipment.
Accompanying drawing explanation
Fig. 1 is that in the embodiment of the present invention, osd data is the schematic diagram of the picture stood upside down;
Fig. 2 is the structural representation of electronic equipment in the embodiment of the present invention;
Fig. 3 A is the display direction of osd data in the embodiment of the present invention is the schematic diagram of forward;
Fig. 3 B-Fig. 3 C is that the display direction of osd data in the embodiment of the present invention is also for swinging to the schematic diagram of display;
Fig. 4 A is the schematic diagram according to the mode of forward reading in the embodiment of the present invention;
Fig. 4 B is the schematic diagram according to the mode of reverse read in the embodiment of the present invention;
Fig. 5 is the connection diagram of buffer area in the embodiment of the present invention;
Fig. 6 is the schematic diagram extracting osd data in the embodiment of the present invention;
Fig. 7 A is after in the embodiment of the present invention, osd data is extracted data according to reverse sequence by dma controller 21 from N number of buffer area 23, stored in the schematic diagram of display module 3;
Fig. 7 B is the sequential control reason not having TCON in the embodiment of the present invention, the design sketch of display screen when showing osd data;
After Fig. 7 C is the sequential control of comprehensive TCON in the embodiment of the present invention, the design sketch of display screen when showing osd data;
Fig. 8 A-Fig. 8 B is the sequential control reason due to TCON in the embodiment of the present invention, and other when showing osd data of display shields schematic diagram;
Fig. 9 A-Fig. 9 B be in the embodiment of the present invention osd data stored in the schematic diagram of display module 3;
Figure 10 be in the embodiment of the present invention osd data stored in another schematic diagram of display module 3;
Figure 11 is the implementation process figure of data processing method in the embodiment of the present invention.
Embodiment
Special memory block is opened up to store postrotational osd data in order to solve the DDR that needs existed in prior art, cause the memory usage of DDR larger, the technical matters of the efficiency of the low system of a step-down of going forward side by side, the embodiment of the present invention proposes a kind of data processing method and a kind of electronic equipment, and its solution general thought is as follows:
First, the present invention improves at hardware aspect, concrete, and electronic equipment of the present invention comprises Installed System Memory 1(DDR), display module 3, and be connected to the dma module 2 between DDR and display module 3; DDR, regulates (OSD) data for storing screen menu type; Dma module 2, comprises the dma controller 21 be connected with DDR, and the register 22 be connected with dma controller 21; Also has N number of buffer area 23.And in register 22, be configured with the reading manner that shields of osd data; Dma controller 21 is for when osd data is presented on display module 3 by needs, obtain from register 22 and shield reading manner, then the initial reading address of osd data in DDR is determined based on falling to shield reading manner, and send corresponding reading order to DDR, from DDR, read osd data according to initial reading address; Then by osd data stored in N number of buffer area 23, and from N number of buffer area 23, extract osd data with reverse sequence and be sent to display module 3 and show, wherein, reverse sequence is contrary stored in order during osd data to N number of buffer area 23 with dma controller 21; Display module 3, for receiving from dma module 2 and showing osd data.
In addition, data processing method of the present invention be when needs by screen menu type regulate (OSD) data be presented on display module time, by dma controller obtain register configuration shield reading manner; Then based on shielding reading manner, the initial reading address of osd data in DDR is determined by dma controller; Send corresponding reading order by dma controller to DDR again, from DDR, read osd data according to initial reading address, and by osd data successively stored in N number of buffer area, wherein, N is positive integer; Finally, based on shielding reading manner, from N number of buffer area, extract osd data with reverse sequence by dma controller, and osd data is sent to display module display, wherein, reverse sequence is contrary stored in order during osd data to N number of buffer area with dma controller.
The present invention shields reading manner by what configure in reading register, to read data stored in N number of buffer area from DDR, and show with reverse sequence extraction data from N number of buffer area, realize osd data to rotate, hardware is only needed to carry out in whole process, N number of buffer area is used to replace in DDR, open up special memory block, and in a register configuration fall screen reading manner use for dma controller, without the need to using software algorithm, osd data is rotated, too much can not take the internal memory of DDR, and then the service efficiency of system can be improved.
Below by accompanying drawing and specific embodiment, technical solution of the present invention is described in detail, the specific features being to be understood that in the embodiment of the present invention and embodiment is the detailed description to technical solution of the present invention, instead of the restriction to technical solution of the present invention, when not conflicting, the technical characteristic in the embodiment of the present invention and embodiment can combine mutually.
Embodiment one:
In embodiments of the present invention, a kind of data processing method is provided.
Concrete, the method is that hardware supported produces with electronic equipment, therefore, first introduces a kind of electronic equipment in the embodiment of the present invention.
In addition, in embodiments of the present invention, this electronic equipment can be televisor, or computer etc.
Concrete, as shown in Figure 2, this electronic equipment comprises: Installed System Memory 1(DDR), display module 3, and be connected to the dma module 2 between DDR and display module 3.
DDR, regulates (OSD) data for storing screen menu type.
Dma module 2, comprises the dma controller 21 be connected with DDR; The register 22 be connected with dma controller 21; In addition, dma module 2 further comprises N number of buffer area 23, and N number of buffer area 23 and DDR, display module 3, and dma controller 21 three connects.
Introduce the various functions of each device in dma module 2 below.
First, what be configured with osd data in register 22 shields reading manner; Dma controller 21 is for when osd data is presented on display module 3 by needs, obtain from register 22 and shield reading manner, then the initial reading address of osd data in DDR is determined based on falling to shield reading manner, and send corresponding reading order to DDR, from DDR, read osd data according to initial reading address; Then by osd data stored in N number of buffer area 23, and from N number of buffer area 23, extract osd data with reverse sequence and be sent to display module 3 and show, wherein, reverse sequence is contrary stored in order during osd data to N number of buffer area 23 with dma controller 21.
Display module 3, for receiving from dma module 2 and showing osd data.
Lower mask body introduces the function of each device.
For DDR, it is mainly used in storing osd data.When needs display osd data, then can call from DDR.
And osd data generally refers to after user presses Menu key, the rectangle menu of the every reconciling items information of display that screen ejects, comprise color, pattern, geometric configuration etc. by this menu to display work in every index to adjust, thus reach best using state.Such as, in Fig. 1, namely the data of oppositely display are osd datas.
For dma module 2, in fact contain three parts: dma controller 21, the register 22 be connected with dma controller 21, and the N number of buffer area 23 be connected with dma controller 21.
Register 22 is used for storing the reading manner of osd data, and this reading manner is generally divided into two kinds just shielding reading manner and shielding reading manner.These two kinds of modes define according to solution osd data display mode in the display.
The implication of just shielding and fall to shield carries out differentiating based on the vision of user.The implication of just shielding is that the display direction of the osd data shown in display screen is consistent with the display direction of the cable video data shown in display, or with the vision of user, the display direction of the osd data shown in display screen is normal or forward.As Fig. 3 A, during the viewing TV of user, the personage of the XX satellite TV play in TV is normal for user, and the osd data occurred in picture is also normal, the same with the personage of XX satellite TV, is all forward.The implication of screen of falling is that the display direction of the cable video data shown in the display direction of the osd data shown in display screen and display is different, or with the vision of user, the display direction of the osd data shown in display screen is unusual or reverse.As Fig. 1, during the viewing TV of user, personage's forward display of the XX satellite TV play in TV, normal for user, and the osd data occurred in picture is display of standing upside down, contrary with the direction of the personage of XX satellite TV, the display of osd data is equivalent to stood upside down by display screen 180 ° and shows, and is therefore called as down screen.In addition, the osd data in Fig. 3 B and Fig. 3 C is also referred to as down screen.
Just shielding the mode that reading manner reads according to forward, dma controller 21 is read from the initial OPADD of DDR backward, namely reads the reading manner that address is initial OPADD.Initial OPADD is specially user's OPADD that compiling obtains when needing to read osd data.The screen reading manner that falls is the mode according to reverse read, and dma controller 21 determines initial reading address in DDP, then reads from initial reading address in DDR backward, namely reads the reading manner that address is initial reading address.Such as, the data volume stored in DDR is 1000, and initial storage address is 0, to 999 from 0, stores this 1000 data.And the initial OPADD of just shielding reading manner is 1, if according to just shielding reading manner, please refer to Fig. 4 A, the mode that can read according to forward, reading from initial OPADD 1 in DDR, reading 2 successively, 3,4...... is to 999.If according to shielding reading manner, please refer to Fig. 4 B, according to the mode of reverse read, can first calculate initial reading address (if initial reading address is 900), then from initial reading address 900, read 901 successively, 902,903...... is to 999.
Dma controller 21 Main Function includes two parts: Part I is the reading manner based on register 22, sends corresponding reading order to DDR, and read osd data from DDR.Shield reading manner such as based on register 22, send corresponding reading order to DDR to read osd data from DDR.Part II controls osd data to be presented on display module 3.
For N number of buffer area 23, overall, this N number of buffer area 23 is all connected with dma controller 21.And for storing the osd data that dma controller 21 reads from DDR according to initial reading address.Wherein, N is positive integer.In addition, this N number of buffer area 23 also has annexation with DDR and display module 3 respectively, and, when dma controller 21 needs transmission data to show to display module 3, also data can be extracted from this N number of buffer area 23 kinds.
For N number of buffer area 23 inside, each buffer area is relatively independent, and each buffer area is connected with dma controller 21.In addition, each buffer area is also connected with DDR and display module 3.As shown in Figure 5, suppose there are 4 buffer areas, be respectively buffer area 1, buffer area 2, buffer area 3, buffer area 4.These 4 buffer areas are all connected to dma controller 21, DDR, display module 3.
In addition, for N number of buffer area 23, osd data can be deposited in a buffer area, also can stored in multiple buffer area.
For display module 3, be the display chip in display in fact, major function is accept from dma module 2 and show osd data.
From structure above, DDR is directly connected with dma module 2.DDR also can be connected indirectly with dma module 2.Such as in fig. 2, this electronic equipment further comprises bus 4.
In the embodiment of the present application, bus 4 specifically AXI(AdvancedeXtensibleInterface, a kind of bus 4 agreement) bus.Further, bus 4 is specifically connected between DDR and dma controller 21, for transmitting the reading order of dma controller 21 to DDR, so that read osd data from DDR.
And more specifically, when DMA reads data in DDR, different according to the storage mode that register 22 is arranged, there is different reading manners.
When the storage mode that register 22 is arranged is for falling to shield reading manner, the concrete effect of dma controller 21 is as follows:
The first, dma controller 21, when osd data is presented on display module 3 by needs, obtains and shields reading manner from register 22.
The second, the data volume that the screen resolution of initial OPADD and display module 3 that dma controller 21 can obtain DDR takies.
Concrete, because osd data can full screen display in display screen, such as common are the osd data of line TV, when adjusting, is be in full screen in display screen.So to calculate the initial reading address of reading osd data, then must calculate the data volume obtaining screen resolution and take.
3rd, dma controller 21 based on shielding reading manner, according to initial OPADD and data volume, can determine the initial reading address of osd data in DDR.
Such as, in DDR from 0 until 1000, store altogether 1000 data.If initial OPADD is 999.When calculating screen resolution, the data volume of acquisition is 100, so then can with initial OPADD for benchmark, and from 999, export 100 data volumes forward, obtaining initial reading address is 900.If by initial OPADD called after addr1, now addr1=999.Data volume size=100, initial reading address addr2 then has relational expression below:
addr2=addr1-size+1=999-100+1=900。
4th, dma controller 21, based on shielding reading manner, after determining the initial reading address of osd data in DDR, sends corresponding reading order to DDR, from DDR, reads osd data according to initial reading address.
Concrete, after obtaining initial reading address, then can send corresponding reading order, from DDR, read 100 osd datas according to initial reading address.Can read successively from 900 when reading in DDR, reading 1000 end always.Such as Fig. 4 B is the schematic diagram that dma controller 21 reads osd data from 900.
5th, dma controller 21 by read osd data stored in N number of buffer area 23.
Concrete, time in stored in N number of buffer area 23, be also according to 900,901,902...... until 1000 such orders stored in.
6th, dma controller 21, based on shielding reading manner, extracts osd data according to reverse sequence, and osd data is transferred to display module 3 from N number of buffer area 23.
Wherein, the embodiment of the present application by dma controller 21 to N number of buffer area 23 stored in order called after forward sequence during osd data; And reverse sequence is contrary stored in order during osd data to N number of buffer area 23 with dma controller 21.
Concrete, at dma controller 21 based on when screen reading manner extracts osd data in N number of buffer area 23, then extract according to reverse sequence.Such as in figure 6, when extracting osd data, then can be initial extraction address with 1000, according to 1000,999, the such order extraction osd data of 998......900.
In addition, when being transferred to display module 3, be also according to 1000,999,998......900 such sequential delivery.Because when osd data originally shows in the display, due to the sequential control reason of TCON, fall screen display user and shown.Therefore, pass through the control of dma controller 21 at this, osd data script forward being transferred to display screen display is transferred to display display according to reverse sequence, so by the sequential control of TCON, then user can be made to see the osd data that positive screen display is shown.
Concrete, display is when positive screen display shows osd data, and general data display carries out showing according to mode from left to right, from top to bottom.And when screen display is shown, be then according to from right to left, show from top to bottom.Such as Fig. 7 A is after osd data is extracted data according to reverse sequence by dma controller 21 from N number of buffer area 23, stored in the schematic diagram of display module 3.Specifically according to order from right to left, from top to bottom stored in.If do not have the sequential control reason of TCON, display screen is when showing osd data, and display result then as shown in Figure 7 B.If combine the sequential control reason of TCON, display result then as seen in figure 7 c.
In addition, due to the sequential control reason of TCON, when showing osd data, may also there is the situation in Fig. 8 A and Fig. 8 B in display.
Wherein, Fig. 8 A is osd data when originally showing with positive screen display, and due to the sequential control reason of TCON, the osd data that positive screen display is originally being shown appears to user the display effect that have passed through after left and right exchanges.Fig. 8 B is osd data when originally showing with positive screen display, and due to the sequential control reason of TCON, the osd data that positive screen display is originally being shown appears to user and have passed through the display effect after exchanging up and down.
For the situation in the situation in Fig. 8 A and Fig. 8 B, dma controller 21 is reading osd data according to initial reading address from DDR, and is all the same by osd data stored in the process in N number of buffer area 23.Unique difference is that mode when extracting osd data feeding display module 3 from N number of buffer area 23 is different.
If deposit situation in fig. 8 a, if now dma controller 21 control osd data with 900,901,902...... is until 1000 such orders incorporate N number of buffer area 23.When extracting, will according to 1000,999, the such order of 998......900, by osd data from right to left, from top to bottom stored in.As shown in Figure 9 A.After by this way stored in osd data, last display effect then can be as seen in figure 7 c.
If if deposit situation in the fig. 8b, if now dma controller 21 control osd data with 900,901,902...... is until 1000 such orders incorporate N number of buffer area 23.When extracting, will according to 1000,999, the such order of 998......900, by osd data from left to right, from top to bottom stored in.As shown in Figure 9 B.After by this way stored in osd data, last display effect then can be as seen in figure 7 c.
Implementation process above, all can shield reading manner according to the setting of register 22, calculates and obtains initial reading address, then sends corresponding reading order to DDR, and from DDR, reads out corresponding osd data.Then be control osd data to be presented on display module 3 by Part II.
In addition, when the storage mode that register 22 is arranged is for just shielding reading manner, the concrete effect of dma controller 21 is as follows:
The first, dma controller 21, when osd data is presented on display module 3 by needs, obtains and just shields reading manner from register 22.
The second, dma controller 21 can obtain initial OPADD and data volume.
Concrete, calculating the reason obtaining the data volume that screen resolution takies has description above, does not repeat them here.
3rd, dma controller 21 based on just shielding reading manner, according to initial OPADD and data volume, be initial reading address with initial OPADD, from DDR, reading osd data.
Such as, in DDR from 0 until 1000, store altogether 1001 data.If initial OPADD is 900.When calculating screen resolution, the data volume of acquisition is 100.Can be so then initial reading address with initial OPADD address, in DDR from 900, with 900,901,902...... is until 1000 such sequentially read osd data.
4th, osd data is transferred to display module 3 and shows.
When with 900,901,902...... until 1000 such sequentially read osd data, then with this order osd data can be outputted in display module 3 and show.
Concrete, because display screen is now that positive screen display is shown, then data display carries out showing according to mode from left to right, from top to bottom.Therefore, DMA controls when osd data is put into display module 3, then can put into osd data according to the mode (from left to right, mode) from top to bottom in Figure 10.
This display mode of just shielding is applicable to common electronic equipment, and namely TCON is not positioned over the electronic equipment of base.The just screen reading manner that now also can be arranged by register 22, then by the control of dma controller 21, is presented at osd data in display module 3 according to the mode that positive screen display is shown.Its design sketch can be as seen in figure 7 c.
In the above embodiments, introduction be hardware configuration aspect read data and display data mode, be described with concrete example below.
In prior art, in order to reduce screen thickness, therefore when designing, circuit main board and power panel etc. are placed in base.And being also positioned at the top of screen due to the TCON of screen, distance circuit board is too far away, is unfavorable for the transmission of signal.Thus after circuit main board and power panel etc. are placed on base, also screen can be inverted, TCON is placed near base.180 degree of rotations of osd data can be inverted like this.
In order to solve shortcoming above, the present invention realizes 180 degree of despinings of osd data when changing electronic apparatus application, normally show on a display screen to enable osd data.Implementation procedure also can support the simple sequential control reason due to TCON, causes the osd data occurred to become left and right and exchanges and situation about exchanging up and down.
Generally, the internal memory that of system that what the viewing area of screen was corresponding is is overall.Suppose that osd data corresponding to the viewing area of screen all stores in DDR, calculate with full HD 1920 × 1080 resolution, if each pixel is divided into R(redness), G(is green), B(is blue), A(transparency) four kinds, then the data volume that can calculate screen resolution is 1920 × 1080 × 4 be about 8Mbytes.Data in this 8M internal memory can be used as pixel data to show.
If will the display numeral 12 of forward on the display screen, as seen in figure 7 c.
The reading manner of now register 22 setting is for just to shield reading manner, if for 16 systems, the value that register 22 is arranged is 0x00.
When dma controller 21 obtains the just screen reading manner of register 22, then can generate corresponding reading order, from DDR, read the data volume of 8Mbytes.
In just screen situation, upper left first some display of screen be first address of internal memory, then add up successively according to order vertical after first level.If according to ARGB(transparency, red, green, blue) form stores, if then pixel data storage format such as a table 1(supposes that initial OPADD is 0x00000000), wherein, table 1 is internal color position, address table.
Table 1
Because transparency A is present in the most most-significant byte of this address, there is most least-significant byte in blue B, so first dma controller 21 carries most least-significant byte B when moving from DDR, press G afterwards, R, the order of A is carried out.After the reading of this address, continue the B of next address (0x00000004), G, R, A order reads successively.Skip to a line below after one's own profession osd data completes, continue to read address below.In addition, after the osd data of each address is read number successively from DDR, can successively stored in carrying out in display module 3 showing (or stored in other storage area).
For full HD 1920 × 1080 resolution, the size that takes up room is 1920 × 1080 × 4=0x7E9000byte(16 system), dma controller 21 can read osd data successively, until the osd data in this 0x7E9000byte space all reads complete from 0x00000000.
If oppositely display numeral 12 on screen now, as shown in Figure 7 B.If 12 forwards now will be made to be presented at display screen (as seen in figure 7 c).
And numeral 12 is now stood upside down and is presented in display screen, be equivalent to left and right and catch up with and to exchange simultaneously down.
The reading manner of now register 22 setting is for shield reading manner, if with 16 systems citings, the value that register 22 is now arranged is 0x11.
What obtain register 22 when dma controller 21 shields reading manner, then can generate corresponding reading order, read the data volume of 8Mbytes from DDR.
Because when falling screen, bottom-right first some display of screen be first address of internal memory, then add up successively according to order from right to left, from top to bottom.Now when calculating initial OPADD, then need by 0x7E9000-1=0x7E8FFF, namely the highest 1 byte of last pixel of last column.
For dma controller 21, now dma controller 21 understands the data volume according to this initial OPADD and screen resolution, calculates the initial reading address of the osd data read in DDR.That is: addr2=addr1-size+1=0x7E8FFF-0x7E9000+1=0x00000000.
Now, after dma controller 21 obtains initial reading address, corresponding reading order can be generated, from 0x00000000, in DDR, read 0x7E9000 data, then by it stored in N number of buffer area 23.Further, then can carry out carrying out data extraction (address of reading data from big to small, is read by byte) in N number of buffer area 23 by reverse manner, then by it stored in carrying out in display module 3 showing (or stored in other storage area).First the address of last pixel can be extracted, as table 2.Fig. 2 is last pixel color position table.
Table 2
If now oppositely extract data, then the data extracted are respectively A, R, G, B, and order is contrary with the data sequence extracted when just shielding.Therefore color format should be reset, with the setting of corresponding register 22.Color format is set to contrary with preset format.B, G, R, A is become to low byte A, R, G, B from high byte.Then successively decrease successively in address, until 0x7E9000 byte of memory reads complete (decreasing addresses is to 0x00000000).
If on screen now, left and right exchanges display numeral 12, as shown in Figure 8 A.If 12 forwards now will be made to be presented at display screen (as seen in figure 7 c).
The reading manner of now register 22 setting is for shield reading manner, if with 16 systems citings, the value that register 22 is now arranged is 0x01.
Because do not need conversion up and down, every a line is now needed to carry out reverse read from right to left, and row still order reading from top to bottom.Therefore, the start address of first time reading is set to the first row last byte width × 4-1.For full HD 1920 × 1080 resolution, the start address that internal memory reads is set to 1920 × 4-1=0x1DFF(16 system).Successively decrease successively in address afterwards, needs again to jump to last pixel of the second row after reducing to one's own profession first pixel, and address is 0x1DFF+ (1920 × 1 × 4), and reading order is also successively decrease successively.By that analogy, the start address of n-th line is 0x1DFF+ (1920 × (n-1) × 4).Until 1080 row circulations are complete.Also need in this process to reset pixel format with contrary before.If arranging form is ARGB before, then now BGRA should be re-set as.
If screen now exchanges display numeral 12 up and down, as shown in Figure 8 B.If 12 forwards now will be made to be presented at display screen (as seen in figure 7 c).
The reading manner of now register 22 setting is for shield reading manner, if with 16 systems citings, the value that register 22 is now arranged is 0x10.
Now, the data of every a line are that positive sequence reads, but need up to read from last column.Therefore, for full HD 1920 × 1080 resolution, start address is last column first pixel for the first time, and address is 1920 × (1080-1) × 4=0x7E7200.Address starts cumulative reading data afterwards, and when reading last pixel of one's own profession, start to read data line above, resetting start address is 1920 × (1080-2) × 4=0x7E5400.The like, n-th line start address is 1920 × (1080-n) × 4, until 1080 row circulations are complete.Because this process is read in order with one-row pixels, therefore pixel format need not reset.
In addition, in order to improve the refresh rate of screen, in dma module 2, N number of buffer zone is employed.N number of buffer area 23 is now at least two buffer areas.
Concrete, use two buffer areas to illustrate below, for the ease of distinguishing the effect of DMA in these two buffer areas, by the name of amendment osd data, by osd data called after OSD picture data, both fleshes and bloods are the same.
When N number of buffer area 23 at least comprises the first buffer area and the second buffer area, the first buffer area and the second buffer area are arranged side by side, and reading manner for fall screen reading manner time, dma controller 21 specifically for:
The first, based on shielding reading manner, determine the first start address of an OSD picture data, and from DDR, read an OSD picture data according to the first start address and write in the first buffer area.
Concrete, the mode that dma controller 21 reads an OSD picture data is consistent with the method reading osd data above, does not repeat them here.
Concrete, each frame OSD picture data is all made up of multiple OSD picture data, such as an OSD picture data, the 2nd OSD picture data ... etc. multiple OSD picture data jointly can form the first frame OSD picture data.
Second, based on shielding reading manner, from the first buffer area, from the first buffer area, extract an OSD picture data according to reverse sequence show for display module 3, simultaneously, based on shielding reading manner, determine the second start address of the 2nd OSD picture data, and from DDR, read the 2nd OSD picture data according to the second start address and write in the second buffer area.
Concrete, while dma controller 21 extracts an OSD picture data display, the 2nd OSD picture data can be read from DDR, to improve the refreshing efficiency of display.
3rd, after the complete OSD picture data of extraction, based on shielding reading manner, from the second buffer area, from the second buffer area, extracting the 2nd OSD picture data according to reverse sequence show for display module 3.
With the citing of two buffer areas, DMA extract from previous buffer area previous OSD picture data (i.e. an OSD picture data) show time, dma controller 21 can set about the OSD picture data (i.e. the 2nd OSD picture data) of latter one of reading.And start prepare extract a rear OSD picture data show.So just be equivalent to employ the memory headroom of twice before being equivalent to.After previous OSD picture data display, the direction of extraction arranges the address pointing to next OSD picture data.
For 1920 × 1080 resolution, the handoff procedure of the OSD picture data between each frame is first described.
The data volume of each frame OSD picture data is 1920 × 1080 × 4=0x7E9000 byte.Therefore, if the initial extraction address of former frame OSD picture data is 0x00000000, last address is 0x7E8FFF.So, the initial extraction address of a frame OSD picture data is 0x7E9000.Like this, from the angle that overall OSD picture switches, the quick switching of two OSD pictures can be realized by the change of two start addresses, and not be used in same address and again read and write data.Therefore, in the processing procedure of next frame OSD picture data, the processing procedure of similar previous frame OSD picture data also to be realized accordingly.OSD picture is rotated to the operation exchanged, the exchange of two width OSD picture start addresses not have too large difference concerning dma module 2 operates, need add 0x7E9000 accordingly when calculating initial extraction address each time.
And for each frame OSD picture data, suppose that each frame OSD picture data is all made up of an OSD picture data and the 2nd OSD picture data.So, dma controller then can perform above-named extraction the one OSD picture data and extract the process of the 2nd OSD picture data.Namely first can determine the first start address of an OSD picture data, from DDR, then read an OSD picture data stored in the first buffer area.When showing, OSD picture data inverted order from the first buffer area is read.Meanwhile, from DDR, read the 2nd OSD picture data based on the second start address, and stored in the second buffer area.An OSD picture data in the first buffer area be extracted display complete after, then the 2nd OSD picture data extracted in the second buffer area according to reverse sequence from the second buffer area shows.
From the switching of the OSD picture data between frame and frame, if register 22 is set to just shield reading manner, initial extraction address in first buffer area in N number of buffer area 23 is set to 0x00000000, initial extraction address then in next buffer area is arranged to read from 0x7E9000, and other class of operation are like the operation of reading OSD picture data.
From the switching of the OSD picture data between frame and frame, if register 22 is set to shield reading manner, register 22 is set to 0x11.Now dma controller 21 will carry out data extraction (address of reading data from big to small, is read by byte) by reverse manner in N number of buffer area 23.When extracting data, the initial extraction address of the first frame OSD picture data is 0x7E8FFF.I.e. the highest 1 byte of last pixel of last column of the osd data of the first picture.And the account form of the initial extraction address of next frame OSD picture data is specially: 0x7E9000+0x7E9000-1=0xFD1FFF.I.e. the highest 1 byte of last pixel of last column of next picture.When dma controller 21 shows stored in display module 3 at extraction first frame OSD picture data, first can start to extract according to the initial extraction address of 0x7E8FFF in N number of buffer area.After the first frame OSD picture data extraction is complete, then start to extract next frame OSD picture data according to the initial extraction address of 0xFD1FFF.And now extracting OSD picture data, then the osd data extracted is respectively A, R, G, B, and order is contrary with the data sequence extracted when just shielding.Therefore should reset color format, color format is set to contrary with preset format.B, G, R, A is become to low byte A, R, G, B from high byte.Then successively decrease successively in address, until 0x7E9000 byte of memory reads complete (decreasing addresses is to 0).
If register 22 is set to shield reading manner, concrete, be that the OSD picture data of each frame will carry out left and right exchange, now the value of register 22 is set to 0x01.Because do not need conversion up and down, every a line is now needed to carry out reverse read from right to left, and row still order reading from top to bottom.Therefore, the start address of first time reading is set to the first row last byte width × 4-1.For full HD 1920 × 1080 resolution, the start address that internal memory reads is set to 0x7E9000+1920 × 4-1=0x7EADFF(16 system).Successively decrease successively in address afterwards, needs again to jump to last pixel of the second row after reducing to one's own profession first pixel, and address is 0x7E9000+0x1DFF+ (1920 × 1 × 4), and reading order is also successively decrease successively.By that analogy, the start address of n-th line is 0x7E9000+0x1DFF+ (1920 × (n-1) × 4).Until 1080 row circulations are complete.Also need in this process to reset pixel format with contrary before.If arranging form is ARGB before, then now BGRA should be re-set as.Further, after have read previous frame OSD picture data, then start to read next frame OSD picture data, reading manner and similar above.
If register 22 is set to shield reading manner, concrete, be that the osd data in picture will carry out left and right exchange, now the value of register 22 is set to 0x10.Now, the data of every a line are that positive sequence reads, but need up to read from last column.Therefore, for full HD 1920 × 1080 resolution, start address is last column first pixel for the first time, and address is 0x7E9000+1920 × (1080-1) × 4=0xFD0200.Address starts cumulative reading data afterwards, and when reading last pixel of one's own profession, start to read data line above, resetting start address is 0x7E9000+1920 × (1080-2) × 4=0xFCE400.The like, n-th line start address is 0x7E9000+1920 × (1080-n) × 4, until 1080 row circulations are complete.Because this process is read in order with one-row pixels, therefore pixel format need not reset.Further, after the OSD picture data that have read previous frame, then start the OSD picture data reading next frame, reading manner and similar above.
Further, for the driving of N number of buffer area 23, there is special switching function, to the switching of in fact extracting address of this N number of buffer area 23.
In order to avoid for code change when various screen, corresponding register 22 is changed and the operation of dma module 2 can be loaded into system drive or even in applying, can transplant for various screen easily.First carry out initialize routine after system electrification, then judge the value of the spin register 22 inputted, carry out the realization of each rotation process respectively.Can arrange the need of use double buffering simultaneously.
Concrete, in order to avoid for code change when various screen, based on the configuration of register and the screen resolution parameter of display module, run time version can be obtained; Then by run time version writing system script, change the execution parameter in run time version with the Parameters variation of the screen resolution for display module correspondence, and drive execution.
Further, corresponding register 22 change and dma operation are loaded in system drive or even application.Such as, if be added in display driver, order accordingly can be added in system booting script.Linux system example is as follows:
insmoddisplay.kow=1920h=1080reverse=0x11
Wherein, w represents the width of screen, and h represents the height of screen, and reverse 0x11 is below exactly the value of register 22 setting controlling Image Reversal.
In addition, the screen that falls of 1920x1080 resolution can be set when system start-up initialisation.All re-start the amendment of code and the compiling of driver without the need to each screen like this, the very big workload that must reduce software, different screen is directly transplanted also convenient.
In superincumbent description, specifically describe the hardware configuration of electronic equipment and concrete principle of work, the data processing method in the embodiment of the present application is described below.
Wherein, the method is applied in above-described electronic equipment.
Please refer to Figure 11 below, describe the specific implementation process of the method.
S111, when osd data is presented on display module 3 by needs, is obtained by dma controller 21 and shields reading manner from register 22.
S112, determines the initial reading address of osd data in DDR by dma controller 21 based on falling to shield reading manner.
Concrete, reading manner can be divided into and just shielding reading manner and shielding reading manner, and about the implication of these two kinds of reading manners, embodiment above tool is described later in detail, and does not repeat them here.
In addition, according to the difference of reading manner, the initial reading address obtained by dma controller 21 is also different.
When reading manner is for falling to shield reading manner, determines the initial reading address of osd data in DDR by dma controller 21 based on reading manner, specifically comprising:
The data volume that the screen resolution of the initial OPADD and display module 3 that obtain DDR by dma controller 21 takies.
Then based on shielding reading manner, according to initial OPADD and data volume, the initial reading address of osd data in DDR is determined.
If reading manner, for being just shielding reading manner, being determined the initial reading address of osd data in DDR by dma controller 21 based on reading manner, is specifically comprised:
First, initial OPADD and data volume is obtained.
Then, based on just shielding reading manner, according to initial OPADD and data volume, being initial reading address with initial OPADD, from DDR, reading osd data.
When based on shielding reading manner, after obtaining initial reading address, then step below can be performed.
S113, sends corresponding reading order by dma controller 21 to DDR, from DDR, read osd data according to initial reading address, and by osd data successively stored in N number of buffer area.
Wherein, N is positive integer.
Concrete, if when reading manner is for falling to shield reading manner, dma module 2 also comprises: N number of buffer area 23, and wherein, N is positive integer.
Sending corresponding reading order by dma controller 21 to DDR, read osd data according to initial reading address from DDR after, method also comprises:
By dma controller 21 by osd data stored in N number of buffer area 23.
S114, based on shielding reading manner, extracts osd data with reverse sequence by dma controller 21 from N number of buffer area 23, and osd data is sent to display module 3 and shows.
Wherein, reverse sequence is contrary stored in order during osd data to N number of buffer area 23 with dma controller 21.
And when reading manner is for just shielding reading manner, then dma controller 21 is after reading osd data, directly osd data can be transferred to display module 3 and shows.
In addition, the method also comprises:
Based on shielding reading manner, the parameter arranging each pixel of display module puts in order, and parameter is put in order and osd data when being sent to display module with forward sequence, and putting in order of the parameter of each pixel of display module is identical.
Wherein, forward sequence be dma controller to N number of buffer area stored in order during osd data.Concrete, the parameter of each pixel contains R(redness), G(is green), B(is blue), A(transparency) four kinds, if osd data according to forward sequence stored in display module time, be according to ARGB(transparency, red, green, blue) form stores, so reverse sequence stored in time, then ARGB can be adjusted to BGRA.
In addition, when N number of buffer area at least comprises the first buffer area and the second buffer area, side by side, based on shielding reading manner, the data processing method in the present embodiment also has implementation process below for the first buffer area and the second buffer area.
The first, based on shielding reading manner, determine first start address of an OSD picture data in DDR by dma controller 21.
The second, from DDR, read an OSD picture data by dma controller 21 according to the first start address and write successively in the first buffer area.
3rd, based on shielding reading manner, from the first buffer area, extract an OSD picture data by dma controller 21 with reverse sequence to show for display module 3, simultaneously, based on shielding reading manner, determine the second start address of the 2nd OSD picture data, and from DDR, read the 2nd OSD picture data according to the second start address and write successively in the second buffer area.
Concrete, while dma controller 21 extracts an OSD picture data display, the 2nd OSD picture data can be read from DDR, to improve the refreshing efficiency of display.
4th, after the complete OSD picture data of extraction, based on shielding reading manner, from the second buffer area, extracting the 2nd OSD picture data by dma controller 21 with reverse sequence and showing for display module 3.
By one or more embodiment of the present invention, following technique effect can be realized:
Data processing method of the present invention be when needs by screen menu type regulate (OSD) data be presented on display module time, by dma controller obtain register configuration shield reading manner; Then based on shielding reading manner, the initial reading address of osd data in DDR is determined by dma controller; Send corresponding reading order by dma controller to DDR again, from DDR, read osd data according to initial reading address, and by osd data successively stored in N number of buffer area, wherein, N is positive integer; Finally, based on shielding reading manner, from N number of buffer area, extract osd data with reverse sequence by dma controller, and osd data is sent to display module display, wherein, reverse sequence is contrary stored in order during osd data to N number of buffer area with dma controller.The present invention shields reading manner by what configure in reading register, to read data stored in N number of buffer area from DDR, and show with reverse sequence extraction data from N number of buffer area, realize osd data to rotate, hardware is only needed to carry out in whole process, N number of buffer area is used to replace in DDR, open up special memory block, and in a register configuration fall screen reading manner use for dma controller, without the need to using software algorithm, osd data is rotated, too much can not take the internal memory of DDR, and then the service efficiency of system can be improved.The present invention can be applied to flatscreen electronic equipment TCON being positioned over base, and is applicable to common giant-screen electronic equipment.
Those skilled in the art should understand, embodiments of the invention can be provided as method, system or computer program.Therefore, the present invention can adopt the form of complete hardware embodiment, completely software implementation or the embodiment in conjunction with software and hardware aspect.And the present invention can adopt in one or more form wherein including the upper computer program implemented of computer-usable storage medium (including but not limited to magnetic disk memory, CD-ROM, optical memory etc.) of computer usable program code.
The present invention describes with reference to according to the process flow diagram of the method for the embodiment of the present invention, equipment (system) and computer program and/or block scheme.Should understand can by the combination of the flow process in each flow process in computer program instructions realization flow figure and/or block scheme and/or square frame and process flow diagram and/or block scheme and/or square frame.These computer program instructions can being provided to the processor of multi-purpose computer, special purpose computer, Embedded Processor or other programmable data processing device to produce a machine, making the instruction performed by the processor of computing machine or other programmable data processing device produce device for realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be stored in can in the computer-readable memory that works in a specific way of vectoring computer or other programmable data processing device, the instruction making to be stored in this computer-readable memory produces the manufacture comprising command device, and this command device realizes the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be loaded in computing machine or other programmable data processing device, make on computing machine or other programmable devices, to perform sequence of operations step to produce computer implemented process, thus the instruction performed on computing machine or other programmable devices is provided for the step realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.

Claims (10)

1. a data processing method, is characterized in that, described method comprises:
When screen menu type regulates osd data to be presented on display module by needs, by dma controller obtain register configuration shield reading manner;
Shield reading manner based on described, determine the initial reading address of described osd data in Installed System Memory DDR by described dma controller;
Send corresponding reading order by described dma controller to described DDR, from described DDR, read described osd data according to described initial reading address, and by described osd data successively stored in N number of buffer area, wherein, N is positive integer;
Reading manner is shielded based on described, from described N number of buffer area, described osd data is extracted with reverse sequence by described dma controller, and described osd data is sent to the display of described display module, wherein, described reverse sequence is contrary stored in order during described osd data to described N number of buffer area with described dma controller.
2. the method for claim 1, is characterized in that, described method also comprises:
Reading manner is shielded based on described, the parameter arranging each pixel of described display module puts in order, described parameter is put in order and described osd data when being sent to described display module with forward sequence, putting in order of the parameter of each pixel of described display module is identical, wherein, described forward sequence be described dma controller to described N number of buffer area stored in order during described osd data.
3. the method for claim 1, is characterized in that, described method also comprises:
Describedly shield reading manner based on described, determine the initial reading address of described osd data in described DDR by described dma controller, specifically comprise:
The data volume that the screen resolution of the initial OPADD and described display module that obtain described DDR by described dma controller takies;
Shield reading manner based on described, according to described initial OPADD and described data volume, determine the initial reading address of described osd data in described DDR.
4. the method for claim 1, it is characterized in that, when described N number of buffer area at least comprises the first buffer area and the second buffer area, described first buffer area and described second buffer area arranged side by side, describedly shield reading manner based on described, determine the initial reading address of described osd data in described DDR by described dma controller, specifically comprise:
Shield reading manner based on described, determine first start address of an OSD picture data in described DDR by described dma controller.
5. method as claimed in claim 4, it is characterized in that, described after determined first start address of an OSD picture data in described DDR by described dma controller, described method also comprises:
From described DDR, reading a described OSD picture data by described dma controller according to described first start address writes in described first buffer area successively;
Reading manner is shielded based on described, from described first buffer area, a described OSD picture data is extracted for described display module display with described reverse sequence by described dma controller, simultaneously, reading manner is shielded based on described, determine the second start address of the 2nd OSD picture data, and from described DDR, read described 2nd OSD picture data according to described second start address and write in described second buffer area successively;
After the complete described OSD picture data of extraction, shield reading manner based on described, from described second buffer area, extract described 2nd OSD picture data for described display module display by described dma controller with described reverse sequence.
6. method as claimed in claim 4, it is characterized in that, described method also comprises:
Based on the configuration of described register and the screen resolution parameter of described display module, obtain run time version;
By described run time version writing system script, change the execution parameter in described run time version with the Parameters variation of the screen resolution for described display module correspondence, and drive execution.
7. an electronic equipment, is characterized in that, described electronic equipment comprises: Installed System Memory DDR, display module, and is connected to the dma module between described DDR and described display module;
Described DDR, regulates osd data for storing screen menu type;
Described dma module, comprises dma controller, register and N number of buffer area, and wherein, N is positive integer; Wherein said dma controller is connected with described DDR, and described register is connected with described dma controller, described N number of buffer area and described DDR, described display module, and described dma controller three connects; What be configured with described osd data in described register shields reading manner; Described dma controller, for when described osd data is presented on described display module by needs, shields reading manner described in obtaining from described register; Then determine the initial reading address of described osd data in described DDR based on described screen reading manner, and send corresponding reading order to described DDR, from described DDR, read described osd data according to described initial reading address; Then by described osd data stored in N number of buffer area, and from described N number of buffer area, extract described osd data with reverse sequence and be sent to display module display, wherein, described reverse sequence is contrary stored in order during described osd data to described N number of buffer area with described dma controller;
Described display module, for receiving from described N number of buffer area and showing described osd data.
8. electronic equipment as claimed in claim 7, it is characterized in that, described electronic equipment also comprises:
Bus, is connected between described DDR and described dma controller, for transmitting the reading order of described dma controller to described DDR.
9. electronic equipment as claimed in claim 7, is characterized in that, described dma controller specifically for:
The data volume that the screen resolution of the initial OPADD and described display module that obtain described DDR takies;
Shield reading manner based on described, according to described initial OPADD and described data volume, determine the initial reading address of described osd data in described DDR.
10. electronic equipment as claimed in claim 7, it is characterized in that, when described N number of buffer area at least comprises the first buffer area and the second buffer area, described first buffer area and described second buffer area arranged side by side, and described reading manner for fall screen reading manner time, described dma controller specifically for:
Shield reading manner based on described, determine the first start address of an OSD picture data, and read in described first buffer area of a described OSD picture data write from described DDR according to described first start address;
Reading manner is shielded based on described, from described first buffer area, a described OSD picture data is extracted for described display module display with described reverse sequence, simultaneously, reading manner is shielded based on described, determine the second start address of the 2nd OSD picture data, and read in described second buffer area of described 2nd OSD picture data write from described DDR according to described second start address;
After the complete described OSD picture data of extraction, shield reading manner based on described, to extract described 2nd OSD picture data according to described reverse sequence for described display module display from described second buffer area.
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