CN103376831A - Electronic device with display panel - Google Patents
Electronic device with display panel Download PDFInfo
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- CN103376831A CN103376831A CN2012101278636A CN201210127863A CN103376831A CN 103376831 A CN103376831 A CN 103376831A CN 2012101278636 A CN2012101278636 A CN 2012101278636A CN 201210127863 A CN201210127863 A CN 201210127863A CN 103376831 A CN103376831 A CN 103376831A
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- pin
- comparer
- display interface
- display panel
- resistance
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Abstract
An electronic device with a display panel comprises a processing unit, first and second display interfaces, a multiplexer, a comparator and first and second detection circuits, wherein the first display interface comprises a first enabling pin, the second display interface comprises a second enabling pin, the processing unit comprises an enabling control pin, and the multiplexer is located between the enabling control pin of the processing unit and the first and second enabling pins. The first detection circuit generates a first detection signal when detecting that the first display interface is connected with the display panel. The second detection circuit generates a second detection signal when detecting that the second display interface is connected with the display panel. The comparator controls the multiplexer to gate the connection of the enabling control pin and the first enabling pin or the second enabling pin when receiving the first detection signal or the second detection signal. According to the electronic device with the display panel, different types of display panels can be assembled.
Description
Technical field
The present invention relates to a kind of electronic installation, particularly a kind of electronic installation with display panel.
Background technology
Existing, mobile phone, panel computer, music player etc. have the electronic installation of display panel, and the interface between its display panel and the motherboard circuit is normally fixed, so that manufacturer is when producing, for a certain batch electronic installation, can only select the display panel of specific model.Yet, when the display panel short supply of this model or material are bad, cause easily whole electronic installation to assemble and finish and shipment.
Summary of the invention
The invention provides a kind of electronic installation with display panel, can use simultaneously polytype display panel.
A kind of electronic installation with display panel, comprise a processing unit and the first display interface, this first display interface comprises the first power pins, the first data pin and the first enable pin, this processing unit comprises the data output pin and enables to control pin, the data output pin of this processing unit is connected with the first data pin of this first display interface, be used for output RGB display data signal to this first data pin, wherein, this electronic installation also comprises the second display interface, multiplexer, the first comparer, the first circuit for detecting and the second circuit for detecting.The second display interface comprises second source pin, the second data pin and the second enable pin, and this second data pin is connected with the data output pin of this processing unit, is used for the RGB display data signal of receive data output pin output.Multiplexer comprises that one selects control end, this multiplexer enables to control between pin and this first enable pin, this second enable pin this processing unit, this enables to control being connected of pin and this first enable pin to be used for gating, and perhaps gating enables to control the connection between pin and this second enable pin.The first comparer comprises a normal phase input end, an inverting input and an output terminal.This first circuit for detecting is connected with the inverting input of this first display interface and this first comparer, be used for this first display interface of detecting and whether connected display panel, and produce one first detection signal to the inverting input of this first comparer when this first display interface has connected display panel detecting.This second circuit for detecting is connected with the normal phase input end of this second display interface and this first comparer, be used for this second display interface of detecting and whether connected display panel, and produce one second detection signal to the normal phase input end of this first comparer when this second display interface has connected display panel detecting.Wherein, this first comparer is when receiving this first detection signal, produce one first and control signal to this multiplexer, so that this multiplexer gating processing unit enable to control being connected of pin and this first enable pin, thereby the output of the enable pin of processing unit comprises this first display interface that controls signal to of enable signal, clock signal and sweep signal, drives the display panel that is connected with this first display interface and shows according to the RGB display data signal that receives; This first comparer is when receiving this second detection signal, produce one second and control signal to this multiplexer, so that this multiplexer gating processing unit enable to control connection between pin and this second enable pin, thereby the enable pin of processing unit is exported this this second display interface that controls signal to that comprises enable signal, clock signal and sweep signal, drives the display panel that is connected with this second display interface and shows according to the RGB display data signal that receives.
The configurable dissimilar display panel of this electronic installation of the present invention, when the display panel of a certain type was in short supply, this electronic installation 1 can be installed the display panel of another type, has increased the selectivity of electronic installation 1 element.
Description of drawings
Fig. 1 is the circuit block diagram that has the electronic installation of a plurality of display interfaces in the first embodiment of the invention.
The main element symbol description
| Electronic installation | 1 |
| |
10 |
| The |
20 |
| The |
30 |
| The first circuit for detecting | 40 |
| The second circuit for detecting | 50 |
| |
60 |
| Comparer | OP1，OP2，OP3 |
| Power pins | P1，P2 |
| Data pin | D1，D2 |
| Enable pin | E1，E2 |
| The data output pin | Data |
| Enable to control pin | |
| Output terminal | |
| 401，501 | |
| Resistance | R1，R2，R3，R4 |
Following embodiment further specifies the present invention in connection with above-mentioned accompanying drawing.
Embodiment
See also Fig. 1, for electronic installation 1(with a plurality of display interfaces hereinafter referred to as circuit block diagram electronic installation 1).This electronic installation 1 comprises processing unit 10, the first display interface 20, the second display interface 30, the first circuit for detecting 40, the second circuit for detecting 50, multiplexer (Multiplexer) 60 and comparer OP1.
This first display interface 20 is used for connecting the display panel of the first kind, and this second display interface 20 is used for connecting the display panel of Second Type.
This first display interface 20 comprises power pins P1, data pin D1 and enable pin E1, and the second display interface 30 comprises power pins P2, data pin D2 and enable pin E2.This processing unit 10 comprises data output pin Data and enables to control pin Enable, the data output pin Data of this processing unit 10 all is connected with the data pin D1 of this first display interface 20 and the data pin D2 of the second display interface 30, is used for output RGB display data signal to the data pin D1 of this first display interface 20 and the data pin D2 of the second display interface 30.This multiplexer 60 is between the enable pin E2 of the enable pin E1 that enables to control pin Enable and this first display interface 20 of this processing unit 10, this second display interface 30, being connected of enable pin E1 that enables to control pin Enable and this first display interface 20 that is used for gating processing unit 10, perhaps gating processing unit 10 enables to control connection between the enable pin E2 of pin Enable and this second display interface 30.
This first circuit for detecting 40 is connected with the inverting input (not indicating among the figure) of this first display interface 20 and this comparer OP1, be used for this first display interface 20 of detecting and whether connect a display panel, and when detecting this first display interface, 20 this display panel of connection, produce one first detection signal to the inverting input of this comparer OP1, otherwise do not export this first detection signal.This second circuit for detecting 50 is connected with the normal phase input end (not indicating among the figure) of this second display interface 30 and this comparer OP1, be used for this second display interface 30 of detecting and whether connect a display panel, and when detecting this second display interface, 30 this display panel of connection, produce one second detection signal to the normal phase input end of this comparer OP1, otherwise do not export this first detection signal.
The output terminal of this comparer OP1 (among the figure not label) is connected with the selection control end S of this multiplexer 60, this comparer OP1 is when receiving this first detection signal, produce one first and control signal to this multiplexer 60, so that being connected of enable pin E1 that enables to control pin Enable and this first display interface 20 of these multiplexer 60 gating processing units 10, output comprises enable signal thereby the enabling of processing unit 10 controlled pin Enable, clock signal and sweep signal control signal to this first display interface 20, drive the RGB display data signal that the display panel basis that is connected with this first display interface 20 receives and show.This comparer OP1 is when receiving this second detection signal, produce one second and control signal to this multiplexer 60, so that these multiplexer 60 gating processing units 10 enable to control connection between the enable pin E2 of pin Enable and this second display interface 30, thereby the enabling of processing unit 10 controlled this second display interface 30 that controls signal to that pin Enable output comprises enable signal, clock signal and sweep signal, drives the RGB display data signal that the display panel basis that is connected with this second display interface 30 receives and shows.
Wherein, the operating voltage of the display panel of the first kind that this first display interface 20 connects and the display panel of the Second Type that the second display interface connects is different, pinout is also different, for example the operating voltage of the display panel of the first kind is 12V, and the display panel operating voltage of Second Type is 24V.
Concrete, as shown in Figure 1, this first circuit for detecting 40 comprises a comparer OP2 and resistance R 1, R2.This resistance R 1, R2 are series between the power pins P1 and ground of the first display interface 20, the connected node of this resistance R 1 of this resistance, R2 and the normal phase input end of this comparer OP2 (among the figure not label) are connected, the inverting input of this comparer OP2 be electrically connected, the output terminal 401 of this comparer OP2 is connected with the inverting input of this comparer OP1.The second circuit for detecting 50 comprises a comparer OP3 and resistance R 3, R4.This resistance R 3, R4 are series between the power pins P2 and ground of the second display interface 30, the connected node of this resistance R 3, R4 and the normal phase input end of this comparer OP3 (among the figure not label) are connected, the inverting input of this comparer OP3 is by being electrically connected with ground, and the output terminal 501 of this comparer OP3 is connected with the normal phase input end of this comparer OP1.
When this first display interface 20 accesses corresponding display panel, the power pins P1 of this first display interface 20 obtains supply voltage from a power end VCC1, thereby, this supply voltage carries out dividing potential drop by this resistance R 1 with resistance R 2, resistance R 1 provides the normal phase input end of a high level to comparer OP2 with the connected node of resistance R 2, thereby the first detection signal of comparer OP2 output high level is to the inverting input of this comparer OP1.Thereby this comparer OP1 exports a low level signal to the gating control end S of multiplexer 60, so that being connected of enable pin E1 that enables to control pin Enable and this first display interface 20 of these multiplexer 60 gating processing units 10.
When this second display interface 30 accesses corresponding display panel, the power pins P2 of this second display interface 30 obtains supply voltage from a power end VCC2, thereby, this supply voltage carries out dividing potential drop by this resistance R 3 with resistance R 4, this resistance R 3 provides the normal phase input end of a high level to comparer OP3 with the connected node of resistance R 4, thereby the second detection signal of comparer OP3 output high level is to the normal phase input end of this comparer OP1.Thereby this comparer OP1 exports a high level signal to the gating control end S of multiplexer 60, so that being connected of enable pin E2 that enables to control pin Enable and this second display interface 30 of these multiplexer 60 gating processing units 10.
Obviously, when display panel corresponding to the first display interface 20 accesses, when the second display interface 30 also accesses corresponding display panel simultaneously, normal phase input end and the inverting input of this comparer OP1 all will receive a high level signal, comparer OP1 this moment output signal not, thereby being connected between the enable pin Enable that multiplexer 60 can gating processing unit 10 and the arbitrary display interface.Thereby, avoid same electronic installation that two display panels are installed.Wherein, should
In the present embodiment, this electronic installation 1 can be the electronic installation that notebook computer, digital photo frame, e-book, mobile phone, digital camera etc. have display panel.This first display interface 20 and the second display interface 30 are the electronic installation internal interfaces such as bus interface.
Thereby, among the present invention, this electronic installation 1 configurable dissimilar display panel, when the display panel of a certain type was in short supply, this electronic installation 1 can be installed the display panel of another type, has increased the alternative of electronic installation 1 assembly element.
Claims (7)
1. electronic installation with display panel, comprise a processing unit and the first display interface, this first display interface comprises the first power pins, the first data pin and the first enable pin, this processing unit comprises the data output pin and enables to control pin, the data output pin of this processing unit is connected with the first data pin of this first display interface, be used for output RGB display data signal to this first data pin, it is characterized in that this electronic installation also comprises:
The second display interface comprises second source pin, the second data pin and the second enable pin, and this second data pin is connected with the data output pin of this processing unit, is used for the RGB display data signal of receive data output pin output;
Multiplexer, comprise that one selects control end, this multiplexer enables to control between pin and this first enable pin, this second enable pin this processing unit, this enables to control being connected of pin and this first enable pin to be used for gating, and perhaps gating enables to control the connection between pin and this second enable pin;
The first comparer comprises a normal phase input end, an inverting input and an output terminal;
The first circuit for detecting, be connected with the inverting input of this first display interface and this first comparer, be used for this first display interface of detecting and whether connected display panel, and produce one first detection signal to the inverting input of this first comparer when this first display interface has connected display panel detecting; And
The second circuit for detecting, be connected with the normal phase input end of this second display interface and this first comparer, be used for this second display interface of detecting and whether connected display panel, and produce one second detection signal to the normal phase input end of this first comparer when this second display interface has connected display panel detecting;
Wherein, this first comparer is when receiving this first detection signal, produce one first and control signal to this multiplexer, so that this multiplexer gating processing unit enable to control being connected of pin and this first enable pin, thereby the output of the enable pin of processing unit comprises this first display interface that controls signal to of enable signal, clock signal and sweep signal, drives the display panel that is connected with this first display interface and shows according to the RGB display data signal that receives; This first comparer is when receiving this second detection signal, produce one second and control signal to this multiplexer, so that this multiplexer gating processing unit enable to control connection between pin and this second enable pin, thereby the enable pin of processing unit is exported this this second display interface that controls signal to that comprises enable signal, clock signal and sweep signal, drives the display panel that is connected with this second display interface and shows according to the RGB display data signal that receives.
2. the electronic installation with display panel as claimed in claim 1, it is characterized in that, this first circuit for detecting comprises one second comparer and first, second resistance, this first resistance and the second resistance string are coupled between the power pins and ground of the first display interface, this first resistance is connected with the normal phase input end of this second comparer with the connected node of the second resistance, the inverting input of this second comparer be electrically connected, the output terminal of this second comparer is connected with the inverting input of this first comparer.
3. the electronic installation with display panel as claimed in claim 2, it is characterized in that, when this first display interface accesses corresponding display panel, the first power pins of this first display interface obtains the first supply voltage from one first power end, thereby, this first supply voltage carries out dividing potential drop by this first resistance and the second resistance, the connected node of this first resistance and the second resistance provides the normal phase input end of high level to the second comparer, thereby the first detection signal of the second comparer output high level is to the inverting input of this first comparer.
4. the electronic installation with display panel as claimed in claim 1, it is characterized in that, the second circuit for detecting comprises one the 3rd comparer and the 3rd, the 4th resistance, the 3rd resistance and the 4th resistance string are coupled between the second source pin and ground of the second display interface, the 3rd resistance is connected with the normal phase input end of the 3rd comparer with the connected node of the 4th resistance, the inverting input of the 3rd comparer be electrically connected, the output terminal of the 3rd comparer is connected with the normal phase input end of this first comparer.
5. the electronic installation with display panel as claimed in claim 4, it is characterized in that, when this second display interface accesses corresponding display panel, the second source pin of this second display interface obtains the second supply voltage from the second source end, thereby, this second supply voltage is by the 3rd resistance and the 4th electric resistance partial pressure, the connected node of the 3rd resistance and the 4th resistance provides the normal phase input end of a high level to the three comparers, thereby the second detection signal of the 3rd comparer output high level is to the normal phase input end of this first comparer.
6. the electronic installation with display panel as claimed in claim 1 is characterized in that, this electronic installation is a kind of in notebook computer, digital photo frame, e-book, mobile phone, the digital camera.
7. the electronic installation with display panel as claimed in claim 1 is characterized in that, the display panel that this first display interface connects is different from the type of the display panel that the second display interface connects.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210127863.6A CN103376831B (en) | 2012-04-27 | 2012-04-27 | There is the electronic installation of display floater |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210127863.6A CN103376831B (en) | 2012-04-27 | 2012-04-27 | There is the electronic installation of display floater |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103376831A true CN103376831A (en) | 2013-10-30 |
| CN103376831B CN103376831B (en) | 2016-09-07 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210127863.6A Active CN103376831B (en) | 2012-04-27 | 2012-04-27 | There is the electronic installation of display floater |
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| CN (1) | CN103376831B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114333719A (en) * | 2021-11-16 | 2022-04-12 | 宗汉电通技术(深圳)有限公司 | Control circuit of intelligent digital photo frame |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7123248B1 (en) * | 2002-07-30 | 2006-10-17 | Matrox Electronic Systems Ltd. | Analog multi-display using digital visual interface |
| CN201035944Y (en) * | 2007-04-03 | 2008-03-12 | 青岛海信电器股份有限公司 | Interface circuit compatible with multi-format display screen |
| CN101212749A (en) * | 2006-12-30 | 2008-07-02 | 乐金电子(中国)研究开发中心有限公司 | Mobile terminal and method supporting external screen |
-
2012
- 2012-04-27 CN CN201210127863.6A patent/CN103376831B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7123248B1 (en) * | 2002-07-30 | 2006-10-17 | Matrox Electronic Systems Ltd. | Analog multi-display using digital visual interface |
| CN101212749A (en) * | 2006-12-30 | 2008-07-02 | 乐金电子(中国)研究开发中心有限公司 | Mobile terminal and method supporting external screen |
| CN201035944Y (en) * | 2007-04-03 | 2008-03-12 | 青岛海信电器股份有限公司 | Interface circuit compatible with multi-format display screen |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114333719A (en) * | 2021-11-16 | 2022-04-12 | 宗汉电通技术(深圳)有限公司 | Control circuit of intelligent digital photo frame |
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| Publication number | Publication date |
|---|---|
| CN103376831B (en) | 2016-09-07 |
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Effective date of registration: 20180224 Address after: Shanghai City, Songjiang Export Processing Zone South Road No. 1925 Patentee after: Ambit Microsystems (Shanghai) Co., Ltd. Address before: 201613 Shanghai City, Songjiang District Songjiang Export Processing Zone South Road No. 1925 Co-patentee before: Hon Hai Precision Industry Co., Ltd. Patentee before: Ambit Microsystems (Shanghai) Co., Ltd. |