CN103348304B - Mechanism for low power standby mode control circuit - Google Patents
Mechanism for low power standby mode control circuit Download PDFInfo
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- CN103348304B CN103348304B CN201280007877.2A CN201280007877A CN103348304B CN 103348304 B CN103348304 B CN 103348304B CN 201280007877 A CN201280007877 A CN 201280007877A CN 103348304 B CN103348304 B CN 103348304B
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- standby mode
- power
- equipment
- control circuit
- computing circuit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3246—Power saving characterised by the action undertaken by software initiated power-off
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Abstract
Embodiments of the invention relate generally to low power standby mode control circuit.One embodiment of assembly of the invention includes: processor;Interface, for the connection with the second device;And computing circuit, wherein processor disables the one or more power connection to computing circuit in stand-by mode.This device also includes standby mode control circuit, this standby mode control circuit utilizes standby power source to operate, wherein standby mode control circuit detects the pumping signal from the second device in response to pumping signal, standby mode control circuit signals to processor, and this processor enables one or more power of computing circuit and connects.
Description
Related application
The application relates to U.S. Provisional Patent Application No.61/440,131 of submission on February 7th, 2011 and requires that it is preferential
Weigh, and this application is included in this by quoting.
Technical field
Embodiments of the invention relate generally to the field of electronic equipment, control electricity particularly for low power standby mode
The mechanism on road.
Background
In the operation of the electronic equipment of such as TV and other consumer electronic devices etc, reduce power consumption and remain in that
High priority.Power consumption is minimized and may consequently contribute to extend the battery life in mobile operation, and when equipment connects from supply socket
May consequently contribute to when receiving power reduce the energy economy & environment cost that power produces.
In conventional reduction power consumption means, one of which, for when equipment is not located at active operation, places a device in and treats
Machine pattern or other lower power state, wherein equipment be placed in standby mode to help with power-off (power off) shape
In contrast equipment can be transferred to active operation by state more quickly.But, equipment continues power consumption in standby mode.Close
New regulation in television set may need to significantly decrease power consumption, particularly processes the power consumption under television standby pattern.
In other subject under discussion, electronic equipment comprises transistor device, can consume certain amount of leakage when it is in standby mode
Electric current.Therefore, even if chip system is set as standby mode, chip is still through pent transistor unit consumption electric leakage in chip
Stream.
As a result, conventional electronic device may proceed to when standby mode consume substantial amounts of power, and this is along with increasing when density of equipment
Add and therefore have more transistor dissipation leakage current and increase the stand-by power consumption of equipment, and becoming and get over great problem.
Accompanying drawing is sketched
Embodiments of the invention are unrestricted as example in appended accompanying drawing to be illustrated, the most similar accompanying drawing mark
Note refers to the element being similar to.
Fig. 1 is the illustration of the embodiment comprising the system that low power standby mode controls.
Fig. 2 is to provide the illustration of the element of the device of low power standby mode control or the embodiment of system.
Fig. 3 is exemplified with the embodiment of the Opportunity awaiting control for linear block of device or system.
Fig. 4 is exemplified with equipment or the computer system that can implement embodiments of the invention thereon.
General introduction
Embodiments of the invention relate generally to for low power standby mode control circuit.
In a first aspect of the present invention, the embodiment of a kind of device: processor;Interface, for the connection with the second device;
And computing circuit, wherein processor disables the one or more power connection to computing circuit in stand-by mode;And treat
Machine mode control circuit.Standby mode control circuit utilizes standby power source to operate, and wherein standby mode control circuit is rung
Stress encourage the signal detection pumping signal from the second device, standby mode control circuit signals to processor, and processor opens
Connect with one or more power of computing circuit.
In a second aspect of the present invention, a kind of method, it is transferred to standby mode including by device or system;Prohibited by processor
Connect with the one or more power being connected to computing circuit;And the standby mode control circuit on operation standby power source.
The method also includes: receive from the second device or the wake-up signal of system at standby mode control circuit;And in response to
Wake-up signal, produces a signal from standby mode control circuit and controls electricity to processor, processor in response to from standby mode
The signal on road enables one or more power and connects.
Describe in detail
Embodiments of the invention relate generally to the mechanism for low power standby mode control circuit.
In certain embodiments, a kind of device, system or method are by utilizing low power standby mode control circuit to prohibit
Maintain low supply voltage to allow to trigger the electric leakage of the reduction that normal operating provides equipment by normal power pin voltage simultaneously
Stream consumes.
In certain embodiments, a kind of device or system are for by introducing secondary power pin, benefiting secondary power
By this additional pins, reduce the power from other pins simultaneously, thus by the chip leakage current consumption when standby mode
Minimize.
In certain embodiments, device or system are used for mobile receiver chip while being in trap standby mode
Or other operation circuit are maintained at power down (power down) state;And benefit processor by the mobile receiver in mobile trap
Power in chip is opened, and so that mobile receiver chip is placed in active power state, wherein this is benefited and is in response to wake up tune up
With and perform.In certain embodiments, mobile receiver chip is MHL (mobile high definition clear degree link) compatible receiver core
Sheet.
In certain embodiments, in order to minimize the leakage current consumption of chip when chip is in holding state, can be claimed
Secondary power pin for lower wattage power supply pin (LPSBV) is used to allow to make other power pin power down of chip.One
In example, it is provided that the low-power operation in the deep standby mode of MHL compatibility trap equipment.
Computer chip passes through pent transistor dissipation leakage current, even if chip is arranged to standby mode.One
In a little embodiments, in order to reduce power consumption and meet particular demands, such as about the California energy of maximum standby Passive Mode power consumption
The regulations of committee, the leakage current consumed when chip is in standby mode is reduced.In one embodiment, at MHL trap
When standby mode, low-power consumption demand (consumption requirements of such as television set) is for MHL trap.
In certain embodiments, in order to reduce the current drain under the standby mode of chip, single power pin is (referred to as
LPSBV) it is designated as power pin, in order to benefit low power standby circuitry.In certain embodiments, in standby mode,
LPSBV provides power to chip, and other power pin are disabled and do not provide any power.In certain embodiments, when
Controlling bus (CBUS) and transfer height to from low, be used as to make chip when the excitation that standby mode is waken up, stand-by circuit detects subsequently
The change of CBUS level and notifier processes device or control element (referred to as MICOM) chip have detected that wake-up signal and subsequently
MICOM provides power to carry out normal operating to chip.In certain embodiments, available field-effect transistor (FET), resistance
Device, diode and microprocessor realize.
Fig. 1 is the illustration of the embodiment of the system including that low-power mode controls.The reality of the system that low-power mode controls
Execute the illustration of example.In certain embodiments, the trap equipment of such as MHL trap 100 is via cable (being illustrated as MHL cable 115) and bag
Source device (such as smart phone) coupling containing MHL conveyer 110.In illustrating at this, MHL trap 110 includes setting for detection resources
The cable of standby connection selects element 120.Connect and include RPWR (voltage bus or V bus) and control bus (CBUS), its
Middle RPWR couples to provide 5V, 500mA's in this example to be adjusted voltage source with voltage regulator 105.
In certain embodiments, the voltage being adjusted is provided to master microprocessor 125, and coupled to master microprocessor
Standby mode microprocessor 130 receives standby voltage, and the most standby microprocessor can be of standby mode control circuit
Point.MHL trap 100 includes MHL receptor 135, and this receptor couples with RPWR and couples with the connection to CBUS via FET2,
Wherein via FET5 signal-selectivity make FET2 open (CBUS is supplied to MHL receptor 135) or make FET1 open with
The pull-down path to ground connection is provided by resistor R.CBUS is provided for handing off the signal of FET4, to provide extremely to standby voltage
The path of ground connection.
In certain embodiments, the power pin in addition to low power standby pin, such as RPWR, SBVCC5 (5 volts),
With MICOMVDD33 (3.3 volts), standby mode does not receive power.While device is in standby mode, power is even
Connect disabled so that regular power supply not power consumption, and low power pin is active, to allow from chip
Trigger normal operating when being externally received excitation.Thus, in standby mode, the only power power-supply pin consumed work of chip
Rate, wherein the current drain of the result gained static leakage current than MICOMVDD33 is the most much lower.
As it is shown in figure 1, operation includes:
(1) under the standby mode of MHL trap 100, the MHL receiver chip in MHL trap is placed in power-down conditions (such as
The state of power is not provided), and period MHL receiver chip 135 does not consume any power at this moment.
(2) it is connected to MHL trap 100, and the MHL conveyer 110 in smart phone or miscellaneous equipment when MHL cable 115
Need to make MHL trap 100 to be in when enlivening power mode (active power mode), conveyer via MHL cable 115 at MHL
CBUS upper transmission " waking up up " pulse is to both stand-by circuit or microprocessor 130 and MHL receptor 135.But, embodiment is not
It is limited to the illustrated pulse that wakes up up, and any pumping signal received can be included.
(3) being under power-down mode due to MHL receiver chip 135, the most standby microprocessor 130 is on MHL CBUS
Receive and detect " waking up up " pulse.
(4) if standby microprocessor judge " waking up up " pulse as effectively, the most standby microprocessor operation is used for opening MHL trap
Interior main microprocessor 125.
(5) main microprocessor 125 in MHL trap 100 is that the MHL receiver chip 135 in MHL trap 100 opens power.
(6) prior procedures (5) makes MHL trap 100 be in active power state, and is being contained in via MHL signal subsequently
Set up normal between the MHL receptor 135 in MHL conveyer 110 and MHL trap 100 in smart phone or other arithmetic facility
MHL connective.
Fig. 2 and 3 is exemplified with the operation of low power standby mode.Fig. 2 be to provide low power standby mode control device or
The illustration of the element of the embodiment of system.In illustrating at this, device or system include the multiple driver elements receiving voltage vcc
205 (being illustrated as n CBUS_HPD driver), each driver couples with the Opportunity awaiting control for linear 210 receiving voltage LPCBV.One
In a little embodiments, each Opportunity awaiting control for linear element 210 couples with (being provided power by LPSBV) LPSB_POC215, each standby control
The connection that system includes to the solder joint (pad) CBUS_HPD (CBUS_HPD0 to CBUS_HPDn) for pumping signal,
And each it is connected to low-power control (LPCRTL) line.
Fig. 3 is exemplified with the embodiment of the Opportunity awaiting control for linear block of device or system.Opportunity awaiting control for linear block 300 includes for receiving LP_
The sub-block 305 of POC signal also generates lpsb (low power standby) via two inverter elements.In illustrating at this, Opportunity awaiting control for linear
Block 300 receives iCBUS_HPD and produces pumping signal CBUS_HPD, wherein circuit branch 310 and resistance, reception at grid
The first transistor (FET) of LPSBV and the 2nd FET coupling of reception lpsb at grid.Opportunity awaiting control for linear block 300 provides
LPCNTRL (low-power control).
In certain embodiments, process includes:
(1) chip enters standby mode, and thus Vcc transfers 0V to, and LPSBV is 3.3V.
(2) in standby mode, wait until that receiving pumping signal at CBUS_HPD solder joint enters (see the second figure and the
Three figures), wherein operation is:
A () LP_POC becomes high, and then LPSB becomes high, and
B () CBUS_HPD is low, thus cause LPCTRL to become high, and INT becomes low (circuit 315);
(3) transfer to low from height as CBUS_HPD,
A () LPCTRL becomes low, then INT is from low to high.
B the MICOM on () system board detects this signal, and provide instruction to generate normally powering at chip.
C () RPWR, SBVCC5, Vcc transfers values for normal operation, and LP_POC step-down to;And
(4) as in figure 2 it is shown, owing to LPCTRL is the wired OR circuit for all of the port, therefore in port from
Standby mode detects and wakes up pumping signal up, then chip starts wake up procedure.
As used herein, network or communication network represent for transmitting digital media content (bag between devices
Include music, audio/video, game, photo and other) interference networks.Network can include the private of such as home network etc
Network in people's network, commercial environment, or other network any being made up of equipment and/or parts.In a network, some net
Network equipment can be the source of media content, such as digital TV tuner, cable set top box, video storage server and other
Source device.Other equipment can show or use media content, such as digital television, household audio and video system, audio system, game
System, or presented by the Internet in a browser, and other equipment.Additionally, some equipment is intended to storage or transmission matchmaker
Internal appearance, such as video and audio storage server.Some equipment can perform media function.In certain embodiments, respectively
The network equipment can be co-located in single lan.In other embodiments, the network equipment can be across multiple network segments, as logical
Cross the tunnel between LAN.Network can include multiple data decoding and ciphering process.
Fig. 4 is exemplified with equipment or the computer system 400 that can realize embodiments of the invention on it.In some embodiments
In, equipment or computer system 400 include low power standby mode control circuit illustrated in such as Fig. 1-3, Opportunity awaiting control for linear
Circuit is for providing the power consumption of reduction in standby mode.Equipment or computer system 400 include the system for transmitting information
Bus 420, and it coupled to the processor 410 for processing information of bus 420.According to an embodiment, use multiple micro-
One of processor realizes processor 410.But, those of ordinary skill in the art are it will be appreciated that other processor can be used.
Computer system 400 also includes random access memory (RAM) or other dynamic memory dress coupleding to bus 420
Put 425 (referred to herein as main storages), the information performed for storage and instruction by processor 410.Main storage
425 can be additionally used in storage processor 410 performs the temporary variable during instruction or other average information.Computer system 400 is also
The read only memory (ROM) that can include coupleding to bus 420 and or other static memory 426, for storage by processor
410 static information used and instructions.
The such as data storage device such as disk or CD 427 and corresponding driver thereof are also coupled to computer system
400 with storage information and instruction.Computer system 400 also can via input/output (I/O) interface 430 coupled to the second input/
Output (I/O) bus 450.Multiple I/O equipment can coupled to I/O bus 450, including display device 424, input equipment (such as,
Alphanumeric Entry Device 423 and/or cursor control device 422).Communicator 421 is for accessing via outer data network
Other computer (server or client computer).Communicator 421 can include modem, NIC or other known to
Interface equipment, such as coupleding to the equipment of Ethernet, token ring or other type network.Computer system 400 include but
It is not limited to network computer devices, mobile phone, personal digital assistant (PDA) etc..
Computer system 400 can be interconnected in client/server network system.Network can include LAN (LAN), wide
Territory net (WAN), Metropolitan Area Network (MAN) (MAN), in-house network, the Internet, etc..Any amount of network equipment can cascade to double with port
Device connects, thus forms networking mechanism in a network.It is conceivable that, can exist and any number of set via what this network connected
Standby.Via multiple standards or nonstandard protocol (including the agreement described in this document), data stream transmitting can (such as be flowed by equipment
Send media data) to the miscellaneous equipment in network system.
In the above description, numerous detail is elaborated for purpose of explanation to provide the comprehensive reason to the present invention
Solve.But, the skilled person will be apparent that do not have some in these details also can put into practice this
Bright.In other cases, known features and equipment illustrate in block diagram form.Middle junction is there may be between shown assembly
Structure.Assembly that is described herein or that illustrate can have additional input that is not shown or that describe or output.
Various embodiments of the present invention can include various process.These processes can be performed maybe can use tricks by nextport hardware component NextPort
Calculation machine program or machine-executable instruction realize, this can be used for so that universal or special processor or logic circuit through with these
Instruction encoding performs these processes.Or, these processes can be performed by the combination of hardware and software.
This document in the whole text described in one or more modules, assembly or key element, such as port multiplier strengthen mechanism
Embodiment shown in or module associated with it, assembly or key element, it may include hardware, software and/or hardware and software
Combination.In the case of module includes software, software data, instruct and/or configure and can be set by machine/electronics via goods
Standby/hardware provides.Goods can include having the non-transient computer-readable medium providing the contents such as instruction, data.This content
Can cause the electronic equipment such as file manager the most described herein (filer), dish or disk controller perform described by each
Plant operation or perform.
The each several part of various embodiments of the present invention can provide as computer program, computer program
Can include on it that storage has the non-transient computer-readable recording medium of computer program instructions, computer program instructions can by with
It is programmed to perform process according to an embodiment of the invention to computer (or other electronic equipments).Computer-readable is situated between
Matter can include, but not limited to floppy disk, CD, compact disk read only memory (CD-ROM) and magneto-optic disk, read only memory
(ROM), random access memory (RAM), Erasable Programmable Read Only Memory EPROM (EPROM), EEPROM, magnetic or optical card, sudden strain of a muscle
Deposit or be suitable to store the other type of medium/machine readable media of e-command.Additionally, the present invention is alternatively arranged as computer
Program product is downloaded, and wherein this program can be sent to make the computer of request from remote computer.
Many methods describe in its most basic form, but can add to any one in these methods or from
Middle deletion process, and can add to or subtract information to any one in described message, without departing from the present invention
Elemental range.It will be readily apparent to one skilled in the art that and can also make many modifications and adaptations.Each concrete reality
Execute example to be not limited to the present invention and illustrate that what the present invention provided.The scope of embodiments of the invention be not by with
The each concrete example of upper offer determines, but only reside in the claims hereinafter appended.
When description element " A " coupled to element or " A " couples with " B ", element A can couple directly to element B, or pass through
Such as element C INDIRECT COUPLING.When description or claims state assembly, feature, structure, process or characteristic A " cause " assembly,
When feature, structure, process or feature B, it means that " A " is at least part of cause of " B ", but there is likely to be auxiliary and cause " B
At least one other assembly, feature, structure, process or characteristic.If " description instruction assembly, feature, structure, process or
Characteristic " possible ", " perhaps " or "available" are included, then do not require that this assembly, feature, structure, process or characteristic are included.As
Really description or claim address " one (a, the indefinite article in English) " or " one (an, the indefinite article in English)
Element, then it is not intended the most single described element.”
One embodiment is that a kind of of the present invention realizes or example.In description to " embodiment ", " embodiment ",
Quoting of " some embodiments " or " other embodiments " represents specific features, structure or the characteristic bag combining the description of these embodiments
Contain at least some embodiments, but be not necessarily included in whole embodiment." embodiment ", " reality occurred everywhere
Execute example " or " some embodiments " embodiment that not necessarily all expression is identical.Similarly, it should understand, the present invention is being shown
In the above description of example embodiment, for the one or more aspects making the disclosure smooth and in the auxiliary each inventive aspect of understanding
Purpose, each feature be sometimes grouped in together single embodiment, accompanying drawing or its describe in.But, the disclosure method should not
It is interpreted to reflect that invention required for protection needs the intention than the more features being expressly recited in each claim.Phase
Instead, as the following claims reflect, invention aspect is, fewer than all features of single embodiments disclosed above.Cause
This, claims are merged in this specification clearly at this, and all independent list as the present invention of each claim
Solely embodiment.
Claims (17)
1. the device controlled for low power standby mode, including:
Processor, it, for enabling or disabling the one or more power connection to computing circuit, thus causes described computing electricity
Road operates in different modes;
Interface, for being connected with the cable of the second device;
Detecting element, is connected in order to detect the described cable at described seam with described second device;
Computing circuit, for operating under standby mode or active mode, wherein said computing circuit is in response to described processor
Disable one or more power be connected under described standby mode operation, and in response to described processor enable one or
Multiple power are connected under described active mode operation;And
Standby mode control circuit, it coupled to described processor and for utilizing standby power source to operate, wherein said
Standby mode control circuit detects the pumping signal from described second device, and in response to described pumping signal, described standby
Mode control circuit signals to described processor, to enable the one or more power connection of described computing circuit,
Wherein said pumping signal is to receive from described second device via control bus CBUS being connected with described detecting element
, the detection of described detecting element is connected with the described cable of described second device, and described CBUS coupled to described computing circuit.
2. the device as described in claims 1, it is characterised in that described computing circuit is receiver chip.
3. the device as described in claims 1, it is characterised in that described device is mobile high definition clear degree link (MHL) compatible equipment.
4. the device as described in claims 1, it is characterised in that described computing circuit comprises multiple transistor unit, when described one
When individual or multiple power connect disabled, described transistor unit is disabled.
5. the device as described in claims 1, it is characterised in that described computing circuit is placed in power down shape under described standby mode
State.
6. the device as described in claims 1, it is characterised in that also include the first switch, it is for by CBUS and computing circuit coupling
Merge and be connected unlatching in response to the detection of described detecting element with the described cable of described second device.
7. the device as described in claims 1, it is characterised in that described pumping signal is that the voltage level on described CBUS changes.
8. the method controlled for low power standby mode, including:
Device or system are transferred to standby mode;
Connected by one or more power of processor disabling to computing circuit;
Standby mode control circuit on operation standby power source;
It is connected with the cable of the second device or system by detecting element detection;
Receive from described second device or the pumping signal of system at described standby mode control circuit;And
In response to described pumping signal, generate a signal to described processor, described processor from described standby mode control circuit
Enable the one or more power in response to the described signal from described standby mode control circuit to connect,
Wherein said pumping signal is
System receives, and the detection of described detecting element is connected with the described cable of described second device or system, and described CBUS coupled to institute
State computing circuit.
9. the method as described in claims 8, it is characterised in that disable the one or more power and connect described computing circuit
It is arranged at power shutdown mode.
10. the method as described in claims 8, it is characterised in that also include by disabling described computing under described standby mode
Multiple transistors of circuit reduce the leakage current consumption of described device or system.
11. methods as described in claims 8, it is characterised in that wherein said computing circuit is receiver chip.
12. methods as described in claims 8, it is characterised in that wherein said device or system are mobile high definition clear degree link
(MHL) compatible apparatus or system.
13. 1 kinds of equipment controlled for low power standby mode, including:
For device or system being transferred to the equipment of standby mode;
For the equipment connected by one or more power of processor disabling to computing circuit;
For operating the equipment of the standby mode control circuit on standby power source;
For being detected the equipment being connected with the cable of the second device or system by detecting element;
For receiving from described second device or the equipment of the pumping signal of system at described standby mode control circuit;With
And
For in response to described pumping signal, generating a signal to the equipment of described processor from described standby mode control circuit,
Described processor enables the one or more power in response to the described signal from described standby mode control circuit and connects,
Wherein said pumping signal is
System receives, and the detection of described detecting element is connected with the described cable of described second device or system, and described CBUS coupled to institute
State computing circuit.
14. equipment as described in claims 13, it is characterised in that wherein for disabling the dress that the one or more power connects
For including the equipment for described computing circuit being placed in power shutdown mode.
15. equipment as described in claims 13, it is characterised in that also include
For reducing described device or system by disabling multiple transistors of described computing circuit under described standby mode
Leakage current consume equipment.
16. equipment as described in claims 13, it is characterised in that described computing circuit is receiver chip.
17. equipment as described in claims 13, it is characterised in that described device or system are mobile high definition clear degree link (MHL)
Compatible apparatus or system.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161440131P | 2011-02-07 | 2011-02-07 | |
US61/440,131 | 2011-02-07 | ||
US13/362,930 US9015509B2 (en) | 2011-02-07 | 2012-01-31 | Mechanism for low power standby mode control circuit |
US13/362,930 | 2012-01-31 | ||
PCT/US2012/023940 WO2012109128A2 (en) | 2011-02-07 | 2012-02-06 | Mechanism for low power standby mode control circuit |
Publications (2)
Publication Number | Publication Date |
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CN103348304A CN103348304A (en) | 2013-10-09 |
CN103348304B true CN103348304B (en) | 2016-12-21 |
Family
ID=46601500
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201280007877.2A Active CN103348304B (en) | 2011-02-07 | 2012-02-06 | Mechanism for low power standby mode control circuit |
Country Status (7)
Country | Link |
---|---|
US (1) | US9015509B2 (en) |
EP (1) | EP2673685B1 (en) |
JP (1) | JP5746771B2 (en) |
KR (1) | KR101912599B1 (en) |
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WO2012109128A3 (en) | 2013-01-10 |
TWI541639B (en) | 2016-07-11 |
EP2673685B1 (en) | 2018-08-01 |
CN103348304A (en) | 2013-10-09 |
KR20140045337A (en) | 2014-04-16 |
KR101912599B1 (en) | 2018-10-29 |
EP2673685A2 (en) | 2013-12-18 |
WO2012109128A2 (en) | 2012-08-16 |
US9015509B2 (en) | 2015-04-21 |
EP2673685A4 (en) | 2015-08-05 |
TW201245949A (en) | 2012-11-16 |
US20120204048A1 (en) | 2012-08-09 |
JP5746771B2 (en) | 2015-07-08 |
JP2014510964A (en) | 2014-05-01 |
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