CN103346744B - Current arithmetic device - Google Patents
Current arithmetic device Download PDFInfo
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- CN103346744B CN103346744B CN201310261106.2A CN201310261106A CN103346744B CN 103346744 B CN103346744 B CN 103346744B CN 201310261106 A CN201310261106 A CN 201310261106A CN 103346744 B CN103346744 B CN 103346744B
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Abstract
The invention discloses a kind of current arithmetic device, it includes that resistance and at least two group mirror module, two groups of mirror module include the first mirror module, the second mirror module, the 3rd mirror module and the 4th mirror module;Outside first electric current inputs the first mirror module and the second mirror module respectively;Outside second electric current inputs the 3rd mirror module and the 4th mirror module respectively;First mirror module is identical to the mirroring ratios of outside second electric current to mirroring ratios and the 3rd mirror module of outside first electric current;The outfan of the first mirror module and the outfan of the 4th mirror module are all connected with one end of resistance;The outfan of the second mirror module and the 3rd mirror module is all connected with the other end of resistance.The current arithmetic device of the present invention need not be known in advance and compares the size of current value and input current source without on-position is determined in advance, just can realize exactly multiplex circuit current differential and and the computing of value, and whole current operator circuit does not exist Problem of Failure, improve operational precision.
Description
Technical field
The present invention relates to integrated circuit fields, relate more specifically to a kind of current arithmetic device.
Background technology
Current arithmetic device is generally used for the temperature coefficient regulating electric current in the circuit carrying out temperature-compensating, with reality
Existing institute electric current in circuit is sued for peace or the difference of electric current.
With reference to the circuit structure diagram of the current arithmetic device that Fig. 1, Fig. 1 are prior art, and this circuit structure is used for
Realize the difference of two-way electric current.As it can be seen, outside first electric current I1 input is to the drain electrode of field effect transistor M11,
And effect pipe M11 by outside first electric current I1 mirror image to field effect transistor M12;Outside second electric current I2 input
To the drain electrode of field effect transistor M13, and effect pipe M13 by the second electric current I2 mirror image to field effect transistor M14.
By the circuit structure shown in Fig. 1, the electric current that field effect transistor M15 flows through is equal to flowing through field effect transistor
The electric current of M14 deducts the electric current flowing through field effect transistor M12, and is represented by the electric current flowing through field effect transistor M15
For I10;And in circuit design, if it is equal with field effect transistor M12 breadth length ratio to set field effect transistor M11,
Field effect transistor M13 is equal with the breadth length ratio of field effect transistor M14, then the electric current flowing through field effect transistor M12 is
First electric current I1, the electric current flowing through field effect transistor M14 is the second electric current I2;Have and only have at the second electric current I2
Current value more than the current value of the first electric current I1 time, flow through the electric current I10=I2-I1 of field effect transistor M15, i.e.
Complete the difference operation of electric current;And field effect transistor M15 by difference current I10 mirror image to field effect transistor M16,
And export to resistance R1 formation voltage VOUT, VOUT contain electric current I10, namely contain first
Electric current I1 and the difference of the second electric current I2.
Additionally, it is well known that ground, in scene effect pipe, after the pre-pinch off of grid lower channel, if continuing to increase Vds
(drain electrode of field effect transistor and the voltage difference of source electrode), pinch-off point can move to source electrode direction, and causes pinch-off point
Channel length between source electrode has reduction, and effective channel resistance also can reduce, so that more polyelectron is from source
Pole floats to pinch-off point, causes increasing at depletion region drift electron, makes the electric current flowing through source and drain increase, this effect
Channel-length modulation should be referred to as.And in current arithmetic device as shown in Figure 1, if field effect transistor M12
When drain voltage is unequal with the drain electrode of field effect transistor M11, then there is channel modulation effect in field effect transistor M12,
Make the electric current flowing through field effect transistor M11 and field effect transistor M12 unequal, cause field effect transistor M11 with
Between field effect transistor M12, the mirror image precision of current mirror is the highest, and makes the difference precision of electric current the highest.
In the current arithmetic device of prior art as shown in Figure 1, it is necessary to know the first electric current I1 and second in advance
The size of electric current I2, in order to this circuit of correct connection, prevents the generation of circuit malfunction situation.In Fig. 1 institute
Showing in circuit, if by the first electric current I1 and the second electric current I2 reversal connection, and the current value of the second electric current I2 is more than
During the current value of the first electric current I1, then because flowing through the electric current of field effect transistor M12 more than flowing through field effect transistor M14
Electric current, the most do not have electric current and flow through field effect transistor M15 so that then flow through the electric current of field effect transistor M15
It is zero, thus causes this current arithmetic device to lose efficacy.It addition, in existing current operator circuit, owing to depositing
In channel modulation effect, cause mirror image precision the highest, so that the difference precision of electric current is the highest;As due to
The drain voltage of field effect transistor M11 is unequal with the drain voltage of field effect transistor M12, then flow through field effect transistor
The electric current of M12 is not precisely equal to flow through the electric current of field effect transistor M11.
Therefore, it is necessary to provide the current arithmetic device of a kind of improvement to overcome drawbacks described above.
Summary of the invention
It is an object of the invention to provide a kind of current arithmetic device, the current arithmetic device of the present invention need not be known in advance
The outside size of input current value and the on-position of input current, without being determined in advance, can realize many exactly
The current differential of road circuit and and the computing of value, and there is not Problem of Failure in whole current operator circuit, carries
High operational precision.
For achieving the above object, the present invention provides a kind of current arithmetic device, and it includes resistance and at least two group mirrors
As module, described two groups of mirror module include the first mirror module, the second mirror module, the 3rd mirror module
And the 4th mirror module, and described first mirror module and the second mirror module constitute first group of mirror module,
Described 3rd mirror module and the 4th mirror module constitute second group of mirror module;Described first mirror module with
3rd mirror module is all connected with external power source, described second mirror module and the 4th equal ground connection of mirror module;
Outside first electric current inputs described first mirror module and the second mirror module respectively, and outside first electric current is respectively
After described first mirror module and the second mirror module mirror image, by the first mirror module and the second mirror module
Outfan output, and described first mirror module and second mirror module image ratio to outside first electric current
Example is identical;Outside second electric current inputs described 3rd mirror module and the 4th mirror module, outside second respectively
Electric current is respectively after described 3rd mirror module and the 4th mirror module mirror image, by the 3rd mirror module and the 4th
The outfan output of mirror module, and described 3rd mirror module and the 4th mirror module are to outside second electric current
Mirroring ratios identical;Described first mirror module is to the mirroring ratios of outside first electric current and described 3rd mirror
As module is identical to the mirroring ratios of outside second electric current;The outfan of described first mirror module and described
The outfan of four mirror module all one end with described resistance are connected, and one end of described resistance is the first outfan;
The outfan of described second mirror module and described 3rd mirror module all other ends with described resistance are connected,
The other end of described resistance is the second outfan;Described first mirror module and the electricity of the 3rd mirror module output
Flow path direction is identical, and the sense of current of described second mirror module and the output of the 4th mirror module is identical and described
The sense of current of the first mirror module output and the sense of current of the second mirror module output are contrary.
It is preferred that the architectural feature of described first mirror module and the 3rd mirror module is identical;Described
The architectural feature of two mirror module and the 4th mirror module is identical.
It is preferred that described second mirror module includes the first field effect transistor, the second field effect transistor, the 3rd effect
Should manage and the first operational amplifier;Described first field effect transistor and the source grounding of the second field effect transistor, institute
All normal phase input ends with described first operational amplifier are connected, outward with grid to state the drain electrode of the first field effect transistor
The drain electrode of portion's the first electric current input extremely described first field effect transistor;The grid and first of described second field effect transistor
The normal phase input end of operational amplifier connects, its drain electrode and the inverting input and the 3rd of the first operational amplifier
The source electrode of field effect transistor connects;The grid of described 3rd field effect transistor and the outfan of the first operational amplifier are even
Connect, and the outfan that drain electrode is described second mirror module of described 3rd field effect transistor.
It is preferred that described first mirror module includes the 4th field effect transistor, the 5th field effect transistor, the 6th effect
Should manage and the second operational amplifier;The source electrode of described 4th field effect transistor and the 5th field effect transistor is all and external electrical
Source connects, the drain electrode of described 4th field effect transistor and grid all with the positive input of described second operational amplifier
End connects, the drain electrode of outside first electric current input to described 4th field effect transistor;Described 5th field effect transistor
The normal phase input end of grid and the second operational amplifier connects, and its drain electrode is anti-phase defeated with the second operational amplifier
The source electrode entering end and the 6th field effect transistor connects;The grid of described 6th field effect transistor and the second operational amplifier
Outfan connect, and the drain electrode of described 6th field effect transistor is the outfan of described first mirror module.
It is preferred that described current arithmetic device also includes the 3rd group of mirror module, and described 3rd group of mirror module
Including the 5th mirror module and the 6th mirror module, outside 3rd electric current inputs described 5th mirror module respectively
With the 6th mirror module, and outside 3rd electric current is respectively through described 5th mirror module and the 6th mirror module mirror
After Xiang, the outfan of the 5th mirror module and the 6th mirror module export;Described 5th mirror module also with
External power source connects, and the outfan of described 5th mirror module exports with the first outfan and second the most respectively
End connects, described 6th mirror module ground connection, and the outfan of described 6th mirror module is defeated with first respectively
Going out end and the second outfan connects, the sense of current of the 5th mirror module output and the first mirror module export
The sense of current is identical, the sense of current of the 6th mirror module output and the sense of current of the second mirror module output
Identical.
It is preferred that described 5th mirror module and the 6th mirror module mirroring ratios phase to outside 3rd electric current
With, and described first mirror module is external to mirroring ratios and described 3rd mirror module of outside first electric current
The mirroring ratios of portion's the second electric current is identical to the mirroring ratios of outside 3rd electric current with described 5th mirror module.
It is preferred that the architectural feature of described 5th mirror module and the first mirror module is identical;Described
The architectural feature of six mirror module and the second mirror module is identical.
It is preferred that described current arithmetic device also includes that the first switch, second switch, the 3rd switch and the 4th are opened
Close;Described first switch is connected between described first outfan and the outfan of the 5th mirror module;Described
Second switch is connected between described second outfan and the outfan of the 5th mirror module;Described 3rd switch
It is connected between described first outfan and the outfan of the 6th mirror module;Described 4th switch is connected to institute
State between the outfan of the second outfan and the 6th mirror module.
Compared with prior art, the current arithmetic device of the present invention is due to described first mirror module and the second mirror image
Module is identical to the mirroring ratios of outside first electric current, and described 3rd mirror module and the 4th mirror module are external
The mirroring ratios of portion's the second electric current is identical, described first mirror module to the mirroring ratios of outside first electric current with
Described 3rd mirror module is identical to the mirroring ratios of outside second electric current, described first mirror module and the 3rd
The sense of current of mirror module output is identical, described second mirror module and the electric current of the 4th mirror module output
Direction is identical, and the electric current side that the sense of current of described first mirror module output and the second mirror module export
To on the contrary;Therefore, it is not required to know outside first electric current and the current value of outside second electric current, Ji Kezhun in advance
Really realize the difference of two electric currents, even if it addition, the electric current reversal connection of outside input is also not result in whole electric current
Arithmetical unit lost efficacy, and improves operational precision, and is also not required to be determined in advance the on-position of foreign current so that
The current arithmetic device of the present invention uses more flexible;Additionally the current operator of the present invention is real by multiple mirror module
Existing, improve mirror image precision, also further increase the precision of current operator.
By description below and combine accompanying drawing, the present invention will become more fully apparent, and these accompanying drawings are used for explaining
The present invention.
Accompanying drawing explanation
Fig. 1 is the circuit structure diagram of current arithmetic device in prior art.
Fig. 2 is the circuit structure diagram of the current arithmetic device of one embodiment of the invention.
Fig. 3 is the circuit structure diagram of the present invention the second mirror module.
Fig. 4 is the circuit structure diagram of the present invention the first mirror module.
Fig. 5 is the circuit structure diagram of another embodiment of the present invention.
Detailed description of the invention
With reference now to accompanying drawing, describing embodiments of the invention, element numbers similar in accompanying drawing represents similar unit
Part.As it has been described above, the invention provides a kind of current arithmetic device, the current arithmetic device of the present invention need not be prior
Know and compare the size of current value and input current source without on-position is determined in advance, can realize many exactly
The current differential of road circuit and and the computing of value, and there is not Problem of Failure in whole current operator circuit, carries
High operational precision.
Refer to the circuit structure diagram of the current arithmetic device that Fig. 2, Fig. 2 are one embodiment of the invention.As schemed
Showing, the current arithmetic device of the present embodiment includes resistance R and two groups of mirror module, and described resistance R is connected to two
Between group mirror module.Specifically, described two groups of mirror module include the first mirror module, the second mirror image mould
Block, the 3rd mirror module and the 4th mirror module;Wherein said first mirror module and the second mirror module structure
First group of mirror module, described 3rd mirror module and the 4th mirror module is become to constitute second group of mirror module;
Described first mirror module and the 3rd mirror module are all connected with external power source VCC, described second mirror module
With the 4th equal ground connection of mirror module.Outside first electric current I1 inputs described first mirror module and the second mirror respectively
As module, outside first electric current I1 respectively after described first mirror module and the second mirror module mirror image, by
The outfan output of the first mirror module and the second mirror module;That is, outside first electric current I1 is through the first mirror
Export electric current I11, outside first electric current I1 as module image and export electric current through the second mirror module mirror image
I12;And described first mirror module and the second mirror module identical, all to the mirroring ratios of outside first electric current
For a, i.e. I11=I12=a*I1.Outside second electric current I2 inputs described 3rd mirror module and the 4th mirror image respectively
Module, and outside second electric current I2 is respectively after described 3rd mirror module and the 4th mirror module mirror image, by
The outfan output of the 3rd mirror module and the 4th mirror module;Outside second electric current I2 is through the 3rd mirror image mould
Block mirror image and export electric current I21, and outside second electric current I2 exports electric current through the 4th mirror module mirror image
I22;And described 3rd mirror module and the 4th mirror module identical to the mirroring ratios of outside second electric current, all
For b, then I21=I22=b*I2.And in the present embodiment, described first mirror module is to outside first electric current I1
Mirroring ratios identical to the mirroring ratios of outside second electric current I2 with described 3rd mirror module, i.e. a=b.
The outfan of described first mirror module and the outfan of described 4th mirror module all with the one of described resistance R
End connects, and one end of described resistance R is the first outfan V1;Described second mirror module and described 3rd mirror
As outfan all other ends with described resistance R of module are connected, the other end of described resistance R is second defeated
Go out to hold V2;The sense of current of described first mirror module and the output of the 3rd mirror module is identical, described second mirror
As module is identical with the sense of current that the 4th mirror module exports, and the electric current of described first mirror module output
The electric current I12 that I11 direction and the second mirror module export is in opposite direction, as in figure 2 it is shown, and arrow shown in figure
Head direction is the direction of corresponding current;And first mirror module and the complete phase of architectural feature of the 3rd mirror module
With;The architectural feature of described second mirror module and the 4th mirror module is identical.
Please in conjunction with reference to Fig. 3 and Fig. 4, described second mirror module include the first field effect transistor M1, second
Field effect transistor M2, the 3rd field effect transistor M3 and the first operational amplifier OP1;Described first field effect transistor
M1 and the source grounding of the second field effect transistor M2, the drain electrode of described first field effect transistor M1 is equal with grid
Being connected with the normal phase input end of described first operational amplifier OP1, outside first electric current I1 is by described first
The drain electrode input of effect pipe M1;The grid of described second field effect transistor M2 and the first operational amplifier OP's
Normal phase input end connects, its drain electrode and the inverting input of the first operational amplifier M1 and the 3rd field effect transistor
The source electrode of M3 connects;The grid of described 3rd field effect transistor M3 and the outfan of the first operational amplifier OP1
Connect, and the outfan that drain electrode is described second mirror module of described 3rd field effect transistor M3, thus from institute
State the drain electrode output electric current I12 of the 3rd field effect transistor M3.
Described first mirror module includes the 4th field effect transistor M4, the 5th field effect transistor M5, the 6th field effect
Pipe M6 and the second operational amplifier OP2;Described 4th field effect transistor M4 and the source of the 5th field effect transistor M5
The most all being connected with external power source VCC, the drain electrode of described 4th field effect transistor M4 and grid are all with described second
The normal phase input end of operational amplifier OP2 connects, and outside first electric current I1 is by described 4th field effect transistor M4
Drain electrode input;The grid of described 5th field effect transistor M5 and the positive input of the second operational amplifier OP2
End connects, its drain electrode and the inverting input of the second operational amplifier OP2 and the source of the 6th field effect transistor M6
Pole connects;The grid of described 6th field effect transistor M6 and the outfan of the second operational amplifier OP2 connect,
And the outfan that the drain electrode of described 6th field effect transistor M6 is described first mirror module, thus from the described 6th
The drain electrode output electric current I11 of field effect transistor M6.
Wherein, as it has been described above, the composition structure of the composition structure of the 3rd mirror module and described first mirror module
Identical, the composition structure of the 4th mirror module is identical with the composition structure of the second mirror module, is different only in that,
The electric current inputting described first mirror module and described second mirror module is outside first electric current I1, and inputs
The electric current of described 3rd mirror module and the 4th mirror module is outside second electric current I2.
The work process of current arithmetic device of the present invention is described below in conjunction with Fig. 2-4.At the first outfan V1 end,
The sense of current of definition electric current I11 is for flowing into, then the sense of current of electric current I22 is for flowing out, at the first outfan
The current value that electric current is electric current I11 of the V1 end described resistance R of inflow deducts the current value of electric current I22, i.e.
I11-I22;In like manner, at the second outfan V2 end, the sense of current of definition electric current I12 is outflow, then electric current
The sense of current of I21, for flowing into, flows out the electricity that electric current is electric current I12 of resistance R at the second outfan V2 end
Flow valuve deducts the current value of electric current I21, i.e. I12-I21;Due to, I11=I12 and I21=I22, the most described electricity
The electric current that resistance R two ends flow into, equal to the electric current flowed out, is I12-I21, therefore the voltage at resistance R two ends is i.e.
V1 end is R*(I12-I21 to the voltage difference of V2 end).In the present embodiment, due to described first mirror image mould
Block is to the mirroring ratios of outside first electric current I1 and described 3rd mirror module mirror image to outside second electric current I2
Ratio is identical, i.e. a=b, then R*(I12-I21)=R*a*(I1-I2), current arithmetic device the most of the present invention exists
On the premise of being not required to know outside first electric current I1 and outside second electric current I2, it is possible to realize outside first electric current
I1 and the difference of outside second electric current I2, improve the use motility of current arithmetic device of the present invention;Meanwhile,
If after outside first electric current I1 and outside second electric current I2 reversal connection, still can get V1 end to V2 end
Voltage difference is R*a*(I2-I1);Therefore the most there is not the problem of inefficacy in the current arithmetic device of the present invention, simultaneously
Achieve the additive operation (I2-I1) of electric current.
Please in conjunction with reference to Fig. 5, another embodiment of the present invention is described.In the present embodiment, described electric current fortune
Calculate device on the basis of previous embodiment, also include the 3rd group of mirror module;And described 3rd group of mirror module bag
Include the 5th mirror module and the 6th mirror module;Outside 3rd electric current I3 input respectively described 5th mirror module with
6th mirror module, and outside 3rd electric current I3 is respectively through described 5th mirror module and the 6th mirror module mirror
After Xiang, the outfan of the 5th mirror module and the 6th mirror module exporting, i.e. outside 3rd electric current I3 passes through
5th mirror module mirror image and export electric current I31, and outside 3rd electric current I3 is through the 6th mirror module mirror image
Output electric current I32;It addition, described 5th mirror module and the 6th mirror module mirror to outside 3rd electric current I3
As ratio is identical, it is c, i.e. I31=I32=c*I3;Wherein, and described first mirror module is to outside first
The mirroring ratios of electric current I1 and described 3rd mirror module to the mirroring ratios of outside second electric current I2 with described
5th mirror module is identical to the mirroring ratios of outside 3rd electric current I3, i.e. a=b=c.Described 5th mirror module
Also be connected with external power source VCC, and the outfan of described 5th mirror module the most respectively with the first outfan
V1 and the second outfan V2 connect, described 6th mirror module ground connection, and described 6th mirror module is defeated
Go out end to be connected with the first outfan V1 and the second outfan V2 respectively, the electric current side of the 5th mirror module output
To identical with the sense of current of the first mirror module output, the sense of current and second of the 6th mirror module output
The sense of current of mirror module output is identical, i.e. the electric current I31 direction of the 5th mirror module output and the 6th mirror
As the electric current I32 of module output is in opposite direction;It addition, described 5th mirror module and the knot of the first mirror module
Structure feature is identical, and the architectural feature of described 6th mirror module and the second mirror module is identical;I.e.
The structure of described 3rd group of mirror module is identical with described first group of mirror module and second group of mirror module,
This is not repeated to describe.In the present embodiment, by increasing described 3rd group of mirror module, outside can be realized
Difference between first electric current I1, outside second electric current I2 and outside 3rd electric current I3 and and value.
Specifically, for outside first electric current I1, outside second electric current I2 and outside threeth electric current are better achieved
Difference between I3 with and value, the current arithmetic device of the present embodiment also include the first switch T1, second switch T2,
3rd switch T3 and the 4th switch T4.Described first switch T1 is connected to described first outfan V1 and the
Between the outfan of five mirror module;Described second switch T2 is connected to described second outfan V2 and the 5th
Between the outfan of mirror module;Described 3rd switch T3 is connected to described first outfan V1 and the 6th mirror
Between the outfan of module;Described 4th switch T4 is connected to described second outfan V2 and the 6th mirror image
Between the outfan of module;Thus the 5th mirror module and the 6th mirror module described in each described on-off control
Connection between electric current and the first outfan V1 and the second outfan V2 of output.
The work process of the present embodiment current arithmetic device is described below in conjunction with Fig. 5.When the electric current of the present embodiment is transported
When calculating device work, Guan Bi the first switch T1 and the 4th switch T4, simultaneously switch off second switch T2 and the 3rd and open
Close T3, then, now the electric current at the first outfan V1 end described resistance R of inflow is I11+I31-I22;Then,
The electric current flowing out resistance R at the second outfan V2 end is also I11+I31-I22;Therefore the voltage at resistance R two ends
I.e. V1 end is R*(I11+I31-I22 to the voltage difference of V2 end);In the present embodiment, due to described first
Mirror module to the mirroring ratios of outside first electric current I1, described 3rd mirror module to outside second electric current I2
Mirroring ratios and described 5th mirror module identical to the mirroring ratios of outside 3rd electric current I3, i.e. a=b=c,
Then R*(I11+I31-I22)=R*a*(I1+I3-I2);Therefore the current arithmetic device of the present embodiment achieves outside
First electric current I1 and outside 3rd electric current be I3's and value, and outside first electric current I1 and outside 3rd electric current
The difference with value with outside second electric current I2 of I3.Correspondingly, close as second switch T2 and the 3rd switch T3
Closing, when the first switch T1 and the 4th switch T4 disconnects simultaneously, i.e. electric current I31 flows through the second outfan V2 end,
Electric current I32 flows through the first outfan V1;The electric current now flowing into the first outfan V1 end is I11-I31-I21,
Flow out the electric current of the second outfan V2 end also for I11-I31-I21;Therefore the voltage i.e. V1 end at resistance R two ends arrives
The voltage difference of V2 end is R*(I11-I31-I21), due to a=b=c, then R*(I11-I31-I21)=R*a*
(I1-I3-I2), it is seen then that the outside first electric current I1 of the circuit realiration of this embodiment and outside 3rd electric current I3
And value and the difference of outside second electric current I2., and outside first electric current I1 and outside 3rd electric current I3
Difference and the difference of outside second electric current I2.
In the current arithmetic device of the present invention, each described mirror module as shown in Figure 3 and Figure 4, increases for height
Benefit loop.Concrete the most as shown in Figure 4, described first mirror module by amplifier OP1, field effect transistor M1,
Field effect transistor M2, field effect transistor M3 form, wherein amplifier OP1 and field effect transistor M3 composition negative feedback loop
Road, equal with the grid voltage Vg and drain voltage Vd forcing field effect transistor M2;Due to field effect transistor
The grid voltage of M1, drain voltage are identical with the grid voltage of field effect transistor M2, therefore can obtain field effect transistor
The grid voltage of M1, M2, drain voltage are equal, i.e. field effect transistor M2 does not exist channel modulation effect;And
Flow through the electric current of field effect transistor M1 with the electric current of field effect transistor M2 fully according to multiple mirror image, there is not mirror image
Error, improves mirror image precision.The second mirror module and other mirror module the most as shown in Figure 3 are all adopted
Using this structure, concrete principle is identical with the first mirror module shown in Fig. 4, is not described further in detail.
From the foregoing, by current arithmetic device of the present invention, it is possible to achieve between different electric currents and value and poor
Value, i.e. achieves the plus and minus calculation of electric current.It addition, by the current arithmetic device of the present invention (such as Fig. 2 and Fig. 5
Shown in) carry out suitable extension, then can realize the computing of multichannel electric current, be arranged as required to each mirror simultaneously
As the mirror image coefficient of module, then can realize current operator the most flexibly, not described in detail herein.
Above in association with most preferred embodiment, invention has been described, but the invention is not limited in disclosed above
Embodiment, and amendment, the equivalent combinations that the various essence according to the present invention is carried out should be contained.
Claims (5)
1. a current arithmetic device, it is characterised in that include resistance and at least two group mirror module, described two
Group mirror module includes the first mirror module, the second mirror module, the 3rd mirror module and the 4th mirror module,
And described first mirror module and the second mirror module constitute first group of mirror module, described 3rd mirror module
Second group of mirror module is constituted with the 4th mirror module;Described first mirror module and the 3rd mirror module all with
External power source connects, described second mirror module and the 4th equal ground connection of mirror module;Outside first electric current is respectively
Inputting described first mirror module and the second mirror module, outside first electric current is respectively through described first mirror image mould
After block and the second mirror module mirror image, the outfan of the first mirror module and the second mirror module export, and
Described first mirror module and the second mirror module are identical to the mirroring ratios of outside first electric current;Outside second
Electric current inputs described 3rd mirror module and the 4th mirror module respectively, and outside second electric current is respectively through described
After three mirror module and the 4th mirror module mirror image, by the 3rd mirror module and the outfan of the 4th mirror module
Output, and described 3rd mirror module and the 4th mirror module identical to the mirroring ratios of outside second electric current;
Described first mirror module to the mirroring ratios of outside first electric current with described 3rd mirror module to outside second
The mirroring ratios of electric current is identical;The outfan of described first mirror module and the output of described 4th mirror module
End all one end with described resistance are connected, and one end of described resistance is the first outfan;Described second mirror image mould
The outfan of block and described 3rd mirror module all other ends with described resistance are connected, another of described resistance
End is the second outfan;The sense of current of described first mirror module and the output of the 3rd mirror module is identical, institute
The sense of current stating the second mirror module and the output of the 4th mirror module is identical, and described first mirror module is defeated
The sense of current gone out and the second mirror module output the most described first mirror module of the sense of current and the 3rd mirror
As the architectural feature of module is identical;The architectural feature of described second mirror module and the 4th mirror module is complete
Exactly the same;Described second mirror module include the first field effect transistor, the second field effect transistor, the 3rd field effect transistor and
First operational amplifier;Described first field effect transistor and the source grounding of the second field effect transistor, described first
All normal phase input ends with described first operational amplifier are connected with grid in the drain electrode of field effect transistor, and outside first
The drain electrode of electric current input extremely described first field effect transistor;Grid and first computing of described second field effect transistor are put
The normal phase input end of big device connects, its drain electrode and the inverting input of the first operational amplifier and the 3rd field effect
The source electrode of pipe connects;The grid of described 3rd field effect transistor and the outfan of the first operational amplifier connect, and
The outfan that drain electrode is described second mirror module of described 3rd field effect transistor;Described first mirror module includes
4th field effect transistor, the 5th field effect transistor, the 6th field effect transistor and the second operational amplifier;Described 4th
The source electrode of effect Guan Yu five field effect transistor is all connected with external power source, the drain electrode of described 4th field effect transistor with
Grid all normal phase input ends with described second operational amplifier are connected, outside first electric current input to the most described the
The drain electrode of four field effect transistor;The grid of described 5th field effect transistor and the normal phase input end of the second operational amplifier
Connecting, its drain electrode is connected with the inverting input of the second operational amplifier and the source electrode of the 6th field effect transistor;Institute
The outfan of the grid and the second operational amplifier of stating the 6th field effect transistor connects, and described 6th field effect transistor
Drain electrode be the outfan of described first mirror module.
2. current arithmetic device as claimed in claim 1, it is characterised in that also include the 3rd group of mirror module,
And described 3rd group of mirror module includes the 5th mirror module and the 6th mirror module, outside 3rd electric current is respectively
Input described 5th mirror module and the 6th mirror module, and outside 3rd electric current is respectively through described 5th mirror image
After module and the 6th mirror module mirror image, the outfan of the 5th mirror module and the 6th mirror module export;
Described 5th mirror module is also connected with external power source, and the outfan of described 5th mirror module the most respectively with
First outfan and the second outfan connect, described 6th mirror module ground connection, and described 6th mirror module
Outfan be connected with the first outfan and the second outfan respectively, the 5th mirror module output the sense of current
Identical with the sense of current of the first mirror module output, the sense of current of the 6th mirror module output and the second mirror
As the sense of current of module output is identical.
3. current arithmetic device as claimed in claim 2, it is characterised in that described 5th mirror module and the
Six mirror module are identical to the mirroring ratios of outside 3rd electric current, and described first mirror module is to outside first
The mirroring ratios of electric current and described 3rd mirror module are to the mirroring ratios of outside second electric current and described 5th mirror
As module is identical to the mirroring ratios of outside 3rd electric current.
4. current arithmetic device as claimed in claim 3, it is characterised in that described 5th mirror module and the
The architectural feature of one mirror module is identical;The structure of described 6th mirror module and the second mirror module is special
Levy identical.
5. current arithmetic device as claimed in claim 4, it is characterised in that also include the first switch, second
Switch, the 3rd switch and the 4th switch;Described first switch is connected to described first outfan and the 5th mirror image
Between the outfan of module;Described second switch is connected to the defeated of described second outfan and the 5th mirror module
Go out between end;Described 3rd switch is connected between described first outfan and the outfan of the 6th mirror module;
Described 4th switch is connected between described second outfan and the outfan of the 6th mirror module.
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102289244A (en) * | 2011-06-21 | 2011-12-21 | 西安电子科技大学 | Current-subtracting type composite compensation reference current source |
CN203313138U (en) * | 2013-06-27 | 2013-11-27 | 四川和芯微电子股份有限公司 | Current operational circuit |
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US6292050B1 (en) * | 1997-01-29 | 2001-09-18 | Cardiac Pacemakers, Inc. | Current and temperature compensated voltage reference having improved power supply rejection |
US6522117B1 (en) * | 2001-06-13 | 2003-02-18 | Intersil Americas Inc. | Reference current/voltage generator having reduced sensitivity to variations in power supply voltage and temperature |
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Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102289244A (en) * | 2011-06-21 | 2011-12-21 | 西安电子科技大学 | Current-subtracting type composite compensation reference current source |
CN203313138U (en) * | 2013-06-27 | 2013-11-27 | 四川和芯微电子股份有限公司 | Current operational circuit |
Non-Patent Citations (1)
Title |
---|
CMOS电流控制电流传输器的电流镜改进与温度补偿技术研究;奚原;《中国优秀硕士学位论文全文数据库 信息科技辑(月刊 )》;20101015(第10期);全文 * |
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