CN103219309B - 多芯片扇出型封装及其形成方法 - Google Patents
多芯片扇出型封装及其形成方法 Download PDFInfo
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- CN103219309B CN103219309B CN201310006527.0A CN201310006527A CN103219309B CN 103219309 B CN103219309 B CN 103219309B CN 201310006527 A CN201310006527 A CN 201310006527A CN 103219309 B CN103219309 B CN 103219309B
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Abstract
本发明涉及多芯片扇出型封装及其形成方法,其中,该封装包括:管芯,位于管芯顶面的导电焊盘;柱状凸块,位于导电焊盘上方并与导电焊盘连接;以及再分布线,位于柱状凸块上方并与柱状凸块连接。电连接件位于再分布线上方并与再分布线电耦合。
Description
本申请要求以下临时提交的美国专利申请:2012年1月23日提交的标题为“Multi-Chip Fan Out process and Structure”的专利序列第61/589,586号,其内容并入本文作为参考。
技术领域
本发明总的来说涉及半导体领域,更具体地,涉及多芯片扇出型封装及其形成方法。
背景技术
随着半导体技术的不断进步,半导体芯片/管芯变得越来越小。与此同时,更多的功能需要集成到半导体管芯中。因此,半导体管芯需要将越来越多的I/O焊盘封装进更小的面积中,并且I/O焊盘的密度会随着时间推移迅速增加。结果,半导体的封装变得越来越难,这对封装的产量产生不利地影响。
传统的封装技术可以分为两类。在第一类中,晶圆上的管芯在它们被切割之前进行封装。这种封装技术具有一些有利的特征,诸如大产量和低成本。此外,需要较少的底部填充物或模塑料。然而,这种封装技术也具有缺陷。如上所述,管芯的尺寸变得越来越小,而且对应的封装只能是扇入型封装,其中,每个管芯的I/O焊盘都限于直接位于对应管芯表面上方的区域。由于管芯的受限面积,I/O焊盘的数量由于I/O焊盘的间距限制而受到限制。如果焊盘的间距减小,则可能出现焊桥。此外,在要求固定焊球大小的情况下,焊球必须具有一定的尺寸,这又限制了可封装在管芯表面上的焊球的数量。
在另一种封装中,管芯在封装之前从晶圆中切割,而且只有“合格管芯”被封装。这种封装技术的有利特征在于形成扇出型封装的可能性,意味着管芯上的I/O焊盘可以被重新分布大于管芯的面积,因此可以增加封装在管芯表面上的I/O焊盘的数量。
发明内容
根据本发明的一个方面,提供了一种器件,包括:管芯,包括位于管芯的顶面的导电焊盘;柱状凸块,位于导电焊盘上方并与导电焊盘连接;再分布线,位于柱状凸块上方并与柱状凸块连接;以及电连接件,位于再分布线上方并与再分布线电耦合。
优选地,该器件进一步包括围绕管芯并与管芯的侧壁接触的聚合物,聚合物的底面基本上与管芯的底面平齐。
优选地,再分布线延伸到管芯的边缘外以与聚合物重叠。
优选地,该器件进一步包括:位于管芯中的半导体衬底;以及介电层,柱状凸块位于介电层中,介电层和聚合物包括不同的材料,并且介电层的边缘与半导体衬底的对应边缘对准。
优选地,聚合物包括与管芯重叠的部分,并且聚合物的该部分围绕并接触柱状凸块。
优选地,聚合物的顶面与柱状凸块的顶面平齐。
优选地,柱状凸块是具有非垂直侧壁的引线结合柱状凸块。
根据本发明的另一方面,提供了一种器件,包括:第一管芯,包括半导体衬底和位于第一管芯的顶面的第一导电焊盘;第一柱状凸块,位于所第一导电焊盘上方并与第一导电焊盘连接;聚合物,围绕第一管芯并与第一管芯的侧壁接触,其中,聚合物的底面基本上与半导体衬底的底面平齐,并且聚合物的顶面基本上与第一柱状凸块的顶面平齐;以及第一再分布线,位于第一柱状凸块上方并与第一柱状凸块连接。
优选地,该器件进一步包括与第一管芯重叠的介电层,第一柱状凸块位于介电层中,介电层和聚合物包括不同的材料,并且介电层的边缘与半导体衬底的对应边缘对准。
优选地,该器件进一步包括:被聚合物围绕的第二管芯,第二管芯包括第二衬底和位于第二管芯的顶面的第二导电焊盘;以及第二柱状凸块,位于第二导电焊盘上方并与第二导电焊盘连接,聚合物包括与第二管芯重叠的部分,并且聚合物的该部分围绕并接触第二柱状凸块。
优选地,聚合物的顶面基本上与第二柱状凸块的顶面平齐。
优选地,聚合物包括设置在第一管芯与第二管芯之间的空间中的部分,并且第一再分布线与聚合物的该部分重叠。
优选地,介电层包含聚酰亚胺。
优选地,第一柱状凸块是具有非垂直侧壁的引线结合柱状凸块。
根据本发明的又一方面,提供了一种方法,包括:将管芯放置在载具上方,管芯包括衬底、位于衬底上方的导电焊盘和位于导电焊盘上方并与导电焊盘电连接的柱状凸块;涂覆聚合物以覆盖管芯,其中聚合物围绕管芯;去除聚合物与管芯重叠的部分以露出柱状凸块;以及在柱状凸块的上方形成再分布线,其中再分布线通过柱状凸块电连接至导电焊盘。
优选地,该方法进一步包括:在载具上放置管芯之前,在载具上形成粘合剂层。
优选地,该方法进一步包括:在管芯上方形成介电层,至少柱状凸块的下部位于介电层中。
优选地,该方法进一步包括:将电连接件形成在再分布线上方并与再分布线电耦合,电连接件至少包括焊料凸块和金属柱。
优选地,该方法进一步包括:形成介电层,介电层包括位于管芯上方的第一部分以及位于聚合物上方的第二部分,其中再分布线位于介电层中。
优选地,在涂覆聚合物的步骤之后执行形成再分布线的步骤,再分布线包括位于管芯上方的第一部分以及位于聚合物上方的第二部分。
附图说明
为了更加完整地理解本实施例及其优点,现在结合附图作为参考进行下面的描述,其中:
图1至图11是根据一些示例性实施例的制造封装的中间阶段的截面图。
具体实施方式
下面详细讨论本发明实施例的制造和使用。然而,应该理解,实施例提供了许多可以在各种具体环境中具体化的可应用发明概念。所讨论的具体实施例是说明性的而不限制本公开的范围。
根据实施例提供了封装及其形成方法。示出了根据实施例的制造封装的中间阶段。还讨论了实施例的变化。在各附图和说明性实施例中,类似的参考标号用于表示类似的元件。
图1至图3示出了根据一些示例性实施例的管芯120的形成过程的截面图。参照图1,提供了晶圆100。晶圆100包括多个芯片120(当被切割开时也被称为管芯)。此外,晶圆100(和其中的管芯120)可以包括半导体衬底121,并且可以包括集成电路器件123和上覆互连结构116。集成电路器件123可包括有源器件,诸如晶体管。在一些示例性实施例中,互连结构116包括形成在介电层17中的金属线和通孔118。介电层117可包括低k介电层(例如,具有低于约3.0的k值)以及位于低k介电层上方的钝化层。导电焊盘122形成在管芯120的顶面并且通过互连结构116电连接至集成电路器件123。在一些实施例中,导电焊盘122是结合焊盘。导电焊盘122可包括金属,诸如铝、铜、镍、金和它们的组合。对准标记(未示出)可形成为与管芯120的顶面相邻,而且从顶部可见。
参照图2,根据一些实施例,例如使用引线结合法在导电焊盘122上形成柱状凸块126。例如,金属线127通过焊头(bond head)125结合在导电焊盘122上以形成柱状凸块126。由于引线结合工艺,柱状凸块126具有非平坦的顶面和不垂直的侧壁。例如通过在形成柱状凸块126之后施加将线127拉离对应的柱状凸块126的力,用于形成柱状凸块126的金属线127被破坏。因此,根据一些实施例,基本上没有线127被遗留连接至对应的柱状凸块126上,尽管可能在柱状凸块126上留下短线127。柱状凸块126可包括铜、金等,虽然还可以使用或增加其他金属。例如,柱状凸块126的高度H1可以在大约10μm和大约50μm之间。为了增加高度H1高度而不增加柱状凸块126的横向尺寸,每个柱状凸块126都可以包括一个柱状凸块或堆叠在一起的多于一个的柱状凸块。
参照图3,形成介电层124以填充到柱状凸块126之间的空间。介电层124的材料可以从阻焊剂、诸如聚酰亚胺的聚合物、聚苯并恶唑(PBO)、聚苯并恶唑(PBO)、模塑料等中选择。介电层124的材料可以为软材料,用于吸收施加在柱状凸块126上的应力。柱状凸块126的顶面可以与介电层124的顶面平齐。可选地,柱状凸块126可以突出到介电层124外。在其他实施例中,柱状凸块126可以嵌入介电层124。
在固化介电层124之后,沿着划线129切割晶圆100,以使管芯120彼此分离。作为切割的结果,在每一个得到的管芯120中,介电层124的边缘与对应的半导体衬底121的边缘对准。
参照图4,在载具30上设置(例如,层压)粘合剂层28。粘合剂层28可以由胶剂形成,或者可以是粘合剂形成的叠层。然后,管芯120被放置在载具30上并粘附于粘合剂层28。在管芯120包括半导体衬底121的实施例中,半导体衬底121的底面21b接触粘合剂层28。载具30可包括对准标记(未示出),使得管芯120和管芯220精准地安装在载具30的期望位置上。
图4还示出了管芯220被放置在粘合剂层28上,其中,管芯220可以彼此相同。根据一些实施例,管芯220是器件管芯,其可以包括位于对应半导体衬底221的表面处的有源器件(诸如晶体管223)。根据一些实施例,在管芯220的顶面上形成导电焊盘222。导电焊盘222可以包括金、铝、铜、镍或它们的组合。管芯220可以具有不同于管芯120的结构,结构的不同之处可以包括形成在其中的电路的差异、顶视图尺寸的差异、高度的差异等。在一些实施例中,管芯220可以由大小不同于晶圆100(图1)的晶圆来形成。相邻的管芯120和管芯220之间留有空间31。当从顶部看时,空间31可以形成围绕每个管芯120和管芯220的栅格。
根据一些实施例,管芯220被放置在粘合剂层28上,在它们的顶面处露出导电焊盘222。参照图5,在导电焊盘222上形成柱状凸块226。柱状凸块226可以由铜、金等形成。类似于柱状凸块126,柱状凸块226可使用引线接合法来形成,其中焊头125用于结合线127以形成柱状凸块226。由此得到的柱状凸块226可类似于柱状凸块126。在形成柱状凸块226之后,如图6所示,聚合物34被填充到管芯120和220之间的空间中。根据一些示例性实施例,聚合物34是模塑料,因此下文被称为模塑料34,尽管其可以是不同于模塑料的其他材料。例如,聚合物34可以由其他介电材料形成,诸如模制底部填充物、环氧树脂等。聚合物34和介电层124可以由相同的材料或不同的材料形成。柱状凸块126和226的顶面也被模塑料34覆盖。然后,执行固化工艺以固化模塑料34。
参照图7,对模塑料34执行诸如研磨步骤的平坦化,直到露出柱状凸块126和226以及可能露出管芯120中的介电层124。因此,介电层124的顶面124a、柱状凸块126的顶面126a、柱状凸块226的顶面226a以及模塑料34的顶面34a可以基本上彼此平齐,并且可以基本上平坦。在柱状凸块126嵌入介电层124的实施例中,介电层124的顶面层也被研磨,直到露出柱状凸块126。作为研磨步骤的结果,去除了部分模塑料34(位于柱状凸块126和226上方的部分)。当从顶部看时,每个管芯120和220以及柱状凸块226都被模塑料34环绕并与其接触。另一方面,柱状凸块126被介电层124环绕并与其接触,介电层124进一步被模塑料34环绕并与其接触。
接下来,如图8所示,在管芯120和220上方形成再分布线(RDL)40,并且它们连接至柱状凸块126和226。在一些实施例中,RDL 40具有平坦的顶面且厚度基本均匀。例如,使用诸如物理汽相沉积的沉积方法以及可能使用用于图案化的蚀刻步骤来形成RDL 40。可选地,RDL 40的形成方法包括镶嵌工艺。RDL 40可形成在介电层38中,并且可以包括金属线和通孔。在一些实施例中,RDL 40延伸到对应管芯120和220的边缘之外并与填充在管芯120和220之间的模塑料34的部分重叠。因此,所得到的封装是扇出型封装。在RDL 40的形成期间,管芯120中的对准标记(未示出)可用于对准的目的,因为介电层124可以是透明的。另一方面,由于管芯220例如被模塑料所覆盖,所以管芯220中的对准标记不能通过不透明的模塑料而看到。因此,管芯120(其中预形成介电层124)与管芯220一起使用提供了用于对准RDL 40形成的对准装置。由此形成包括管芯120和220、模塑料34以及RDL 40的晶圆44。
图9示出了电连接至RDL 40的电连接件42的形成。结果,电连接件42被放置在新形成的晶圆44的顶面上。电连接件42可以是使用焊球安装头(未示出)转移到晶圆44之上的焊球。可选地,电连接件42是非回流凸块,诸如铜凸块或铜柱。一些电连接件42可形成在管芯120和220上方并与它们对准,而一些其他电连接件42可形成在模塑料34之上并与模塑料34对准以及与管芯120和220之间的空间对准。
接下来,如图10所示,从晶圆44上卸下载具30,并且还可以去除粘合剂层28,离开晶圆44。然后,晶圆44可附接在带46上,并沿着划线48切割开。从而形成封装50。
图11示出了一个示例性封装50。应该理解,在每个封装50中,管芯120的底面120b和管芯220的底面220b基本上与模塑料34的底面34b平齐。此外,管芯120的底面120b还可以是衬底121的底面121b,并且管芯220的底面220b也可以是衬底221的底面121b。因此,衬底121的底面121b和衬底221的底面221b与模塑料34的底面34b平齐。在顶侧,RDL40形成在柱状凸块126和226的上方并与其相连。此外,RDL 40可在填充管芯120和220之间的空间的模塑料34一部分的上方延伸。因此,封装50是扇出型封装。此外,聚合物34可以围绕并与每一个凸块226接触。
图1至图11示出了封装50的形成,其包括互不相同的管芯120和220。在可选实施例中,在图4所示的步骤中,与管芯120类似的多个管芯被放置在粘合剂28(图4)上。多个管芯中的每一个管芯均包括预先形成的柱状凸块(与柱状凸块126类似)和预先形成的介电层(与介电层124类似)。然而,多个管芯可包括具有不同结构的两种或多种类型的管芯。然而,类似于管芯220但不包括预先形成的柱状凸块的管芯不放置在粘合剂层28上。所得到的封装类似于图11所示的封装,除了图11中的管芯220还被具有预先形成的柱状凸块和对应介电层的管芯所替代。
在可选实施例中,放置在粘合剂28(图4)上的所有管芯都不包括预先形成的柱状凸块。所得到的封装类似于图11所示的封装,除了图11中的管芯120被不具有预先形成的柱状凸块和对应介电层的管芯所替代。
在实施例中,通过在柱状凸块之上形成柱状凸块和再分布层,可以封装不适合形成金属柱的管芯。减少了封装成本,并且缩短了工艺时间。本实施例可以容易地应用于具有不同晶圆尺寸的管芯,因此不需要用于在诸如4英寸晶圆的传统晶圆上形成铜柱的制造工具。
根据实施例,一种封装包括:管芯,在管芯的顶面处具有导电焊盘;柱状凸块,位于导电焊盘上方并连接至导电焊盘;以及再分布线,位于柱状凸块上方并与柱状凸块连接。电连接件位于再分布线上方并与再分布线电耦合。
根据其他实施例,一种器件包括:管芯,进一步包括半导体衬底;以及导电焊盘,位于管芯的顶面。柱状凸块设置在导电焊盘之上并与其连接。聚合物围绕管芯并与管芯的侧壁接触。聚合物的底面基本上与半导体衬底的底面平齐。聚合物的顶面基本上与柱状凸块的顶面平齐。再分布线位于柱状凸块之上并与其连接。
根据其他实施例,一种方法包括在载具上方放置管芯。管芯包括衬底、位于衬底上方的导电焊盘和位于导电焊盘之上并与其连接的柱状凸块。涂覆聚合物以覆盖管芯,其中聚合物围绕管芯。去除聚合物与管芯重叠的部分以露出柱状凸块。再分布线形成在柱状凸块之上,其中,再分布线通过柱状凸块电连接至导电焊盘。
尽管已经详细描述了实施例及其优点,但应该理解,可以进行各种替换和更改而不背离所附权利要求限定的实施例的精神和范围。此外,本申请的范围不旨在限于说明书中描述的工艺、机械装置、制造以及物质组成、工具、方法和步骤的特定实施例。本领域技术人员容易理解,根据本公开可以利用与本文描述的对应实施例基本执行相同功能或实现基本相同结果的目前现有或即将开发的工艺、机械装置、制造、物质组成、工具、方法、或步骤。因此,所附权利要求旨在包括在这种工艺、机械装置、制造、物质组成、工具、方法、或步骤的范围内。此外,每个权利要求都构成独立的实施例,并且各种权利要求和实施例的组合均在本公开的范围内。
Claims (15)
1.一种封装器件,包括:
第一管芯,包括位于所述第一管芯的顶面的导电焊盘;
柱状凸块,位于所述导电焊盘上方并与所述导电焊盘连接,所述柱状凸块是具有非垂直侧壁的引线结合柱状凸块,并且所述柱状凸起的底部宽度大于顶部宽度;
介电层,所述柱状凸块在所述介电层中;
再分布线,位于所述柱状凸块上方并与所述柱状凸块连接,所述再分布线的子集连接所述第一管芯和另一个第二管芯;
所述第二管芯包括有源器件以及另一第二柱状凸块,所述第二柱状凸块电连接至所述有源器件,其中,所述第二柱状凸块是具有非垂直侧壁的引线结合柱状凸块;
聚合物,围绕所述第一管芯并与所述第一管芯的侧壁接触,其中,所述介电层和所述聚合物包括不同材料,并且所述柱状凸块的顶面、所述介电层的顶面、所述第二柱状凸块的顶面和所述聚合物的顶面平齐;以及
电连接件,位于所述再分布线上方并与所述再分布线电耦合。
2.根据权利要求1所述的器件,其中,所述聚合物的底面与所述第一管芯的底面平齐。
3.根据权利要求2所述的器件,其中,所述再分布线延伸到所述第一管芯的边缘外以与所述聚合物重叠。
4.根据权利要求2所述的器件,进一步包括:
位于所述第一管芯中的半导体衬底;以及所述介电层的边缘与所述半导体衬底的对应边缘对准。
5.根据权利要求2所述的器件,其中,所述聚合物包括与所述第一管芯重叠的部分,并且所述聚合物的该部分围绕并接触所述柱状凸块。
6.一种封装器件,包括:
第一管芯,包括:
半导体衬底;和
位于所述第一管芯的顶面的第一导电焊盘;
第一柱状凸块,位于所述第一导电焊盘上方并与所述第一导电焊盘连接,所述第一柱状凸块是具有非垂直侧壁的引线结合柱状凸块,并且所述第一柱状凸块的底部宽度大于顶部宽度;
介电层,所述第一柱状凸块位于所述介电层中;
聚合物,围绕所述第一管芯并与所述第一管芯的侧壁接触,其中,所述聚合物的底面与所述半导体衬底的底面平齐,并且所述聚合物的顶面与所述第一柱状凸块的顶面平齐;以及
第一再分布线,位于所述第一柱状凸块上方并与所述第一柱状凸块连接,并且所述第一再分布线的子集连接所述第一管芯和另一个第二管芯;
所述第二管芯包括有源器件以及第二柱状凸块,所述第二柱状凸块电连接至所述有源器件,其中,所述第二柱状凸块是具有非垂直侧壁的引线结合柱状凸块,其中,所述第一柱状凸块的顶面、所述介电层的顶面、所述第二柱状凸块的顶面和所述聚合物的顶面平齐。
7.根据权利要求6所述的器件,进一步包括与所述第一管芯重叠的介电层,所述介电层和所述聚合物包括不同的材料,并且所述介电层的边缘与所述半导体衬底的对应边缘对准。
8.根据权利要求7所述的器件,进一步包括:
所述第二管芯被所述聚合物围绕,所述第二管芯包括:
第二衬底;和
位于所述第二管芯的顶面的第二导电焊盘;以及
所述第二柱状凸块,位于所述第二导电焊盘上方并与所述第二导电焊盘连接,所述聚合物包括与所述第二管芯重叠的部分,并且所述聚合物的该部分围绕并接触所述第二柱状凸块。
9.根据权利要求8所述的器件,其中,所述聚合物包括设置在所述第一管芯与所述第二管芯之间的空间中的部分,并且所述第一再分布线与所述聚合物的该部分重叠。
10.根据权利要求7所述的器件,其中,所述介电层包含聚酰亚胺。
11.一种封装器件的形成方法,包括:
将第一管芯放置在载具上方,所述第一管芯包括:
衬底;
位于所述衬底上方的导电焊盘;和
位于所述导电焊盘上方并与所述导电焊盘电连接的柱状凸块,其中,通过引线结合法形成所述柱状凸块,并且所述柱状凸块的底部宽度大于顶部宽度;
在所述第一管芯上方形成介电层,至少所述柱状凸块的下部位于所述介电层中;
涂覆聚合物以覆盖所述第一管芯,其中所述聚合物围绕所述第一管芯;
去除所述聚合物与所述第一管芯重叠的部分以露出所述柱状凸块;以及
在所述柱状凸块的上方形成再分布线,其中所述再分布线通过所述柱状凸块电连接至所述导电焊盘,并且所述再分布线的子集连接所述第一管芯和另一个第二管芯,所述第二管芯包括有源器件以及第二柱状凸块,所述第二柱状凸块电连接至所述有源器件,其中,所述第二柱状凸块是具有非垂直侧壁的引线结合柱状凸块,并且所述柱状凸块的顶面、所述介电层的顶面、所述第二柱状凸块的顶面和所述聚合物的顶面平齐。
12.根据权利要求11所述的方法,进一步包括:在所述载具上放置所述第一管芯之前,在所述载具上形成粘合剂层。
13.根据权利要求11所述的方法,进一步包括:将电连接件形成在所述再分布线上方并与所述再分布线电耦合,所述电连接件至少包括焊料凸块和金属柱。
14.根据权利要求11所述的方法,进一步包括:所述介电层包括位于所述第一管芯上方的第一部分以及位于所述聚合物上方的第二部分,其中所述再分布线位于所述介电层中。
15.根据权利要求11所述的方法,其中,在涂覆所述聚合物的步骤之后执行形成所述再分布线的步骤,所述再分布线包括位于所述第一管芯上方的第一部分以及位于所述聚合物上方的第二部分。
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US10163857B2 (en) | 2018-12-25 |
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US20190109118A1 (en) | 2019-04-11 |
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US20130187270A1 (en) | 2013-07-25 |
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