CN103219305B - Salient point bottom protection structure - Google Patents

Salient point bottom protection structure Download PDF

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Publication number
CN103219305B
CN103219305B CN201310137091.9A CN201310137091A CN103219305B CN 103219305 B CN103219305 B CN 103219305B CN 201310137091 A CN201310137091 A CN 201310137091A CN 103219305 B CN103219305 B CN 103219305B
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China
Prior art keywords
salient point
thrust
protection structure
layer
aluminium lamination
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CN201310137091.9A
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Chinese (zh)
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CN103219305A (en
Inventor
丁万春
虞国良
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Tongfu Microelectronics Co Ltd
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Nantong Fujitsu Microelectronics Co Ltd
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Priority to CN201310137091.9A priority Critical patent/CN103219305B/en
Publication of CN103219305A publication Critical patent/CN103219305A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Abstract

The invention discloses a kind of salient point bottom protection structure, comprise salient point, the bottom periphery of described salient point is provided with thrust, and the material of described thrust is identical with the material of described salient point.Described salient point bottom is provided with ubm layer, and described ubm layer bottom is provided with aluminium lamination, and described aluminium lamination bottom is provided with silicon chip.The present invention is by arranging thrust in salient point bottom, and thrust plays the effect of compensation when wet etching, reduces the generation of lateral erosion, thus forms bump packaging structure more reliably.

Description

Salient point bottom protection structure
Technical field
The present invention relates to field of semiconductor package, be specifically related to a kind of salient point bottom protection structure.
Background technology
In common salient point processing technology, when sputtering layer uses wet method to etch, the side etching caused due to isotropic is a problem all the time, when lateral erosion is excessive, liquid can be caused to attack the aluminium lamination of bottom, cause electrical loss.Existing method reduces lateral etch amount by the cooperation of etching machines and liquid medicine.Existing method existence operation is difficult to control, and still there is lateral erosion excessive problem when coordinating bad.
Summary of the invention
Provide hereinafter about brief overview of the present invention, to provide about the basic comprehension in some of the present invention.Should be appreciated that this general introduction is not summarize about exhaustive of the present invention.It is not that intention determines key of the present invention or pith, and nor is it intended to limit the scope of the present invention.Its object is only provide some concept in simplified form, in this, as the preorder in greater detail discussed after a while.
The object of the embodiment of the present invention is the defect for above-mentioned prior art, provides a kind of salient point bottom protection structure reducing the generation of lateral erosion.
To achieve these goals, the technical scheme that the present invention takes is:
A kind of salient point bottom protection structure, comprise salient point, the bottom periphery of described salient point is provided with thrust.
Compared with prior art, the invention has the beneficial effects as follows:
The present invention is by arranging thrust in salient point bottom, and thrust plays the effect of compensation when wet etching, reduces the generation of lateral erosion, thus forms bump packaging structure more reliably.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The structural representation of salient point bottom protection structure before the etching that Fig. 1 provides for the embodiment of the present invention;
The structural representation of salient point bottom protection structure after the etching that Fig. 2 provides for the embodiment of the present invention.
Reference numeral:
1-salient point; 2-thrust; 3-ubm layer; 4-aluminium lamination; 5-silicon chip; 6-passivation layer; 7-protective layer; 8-nickel dam; 9-tin layers.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.The element described in an accompanying drawing of the present invention or a kind of execution mode and feature can combine with the element shown in one or more other accompanying drawing or execution mode and feature.It should be noted that for purposes of clarity, accompanying drawing and eliminate expression and the description of unrelated to the invention, parts known to persons of ordinary skill in the art and process in illustrating.Based on the embodiment in the present invention, those of ordinary skill in the art, not paying the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
See Fig. 1, a kind of salient point bottom protection structure, comprises salient point 1, and the bottom periphery of salient point 1 is provided with thrust 2.
The present invention is by arranging thrust in salient point bottom, and thrust plays the effect of compensation when wet etching, reduces the generation of lateral erosion, thus forms bump packaging structure more reliably.
The present embodiment is on the basis of above-described embodiment, and the material of thrust 2 is identical with the material of salient point 1.
The setting that identical material is convenient to thrust is set.
The present embodiment is on the basis of above-described embodiment, and thrust 2 and salient point 1 are once formed in electroplating process, and thrust 2 is the truncated cone-shaped of hollow, is looped around the bottom periphery of salient point 1.
Thrust is identical with salient point material, once can be formed in electroplating process, be convenient to processing, the middle rest of truncated cone-shaped, for holding salient point and UMB(ubm layer), the cross section of thrust can be triangle as depicted in figs. 1 and 2, the gradient structure of similar gusseted, also can be trapezoidal, the thrust arranging said structure reduces lateral erosion, increases the stability of structure.
The present embodiment, on the basis of above-described embodiment, is provided with ubm layer 3 bottom salient point 1, ubm layer 3 bottom is provided with aluminium lamination 4, and aluminium lamination 4 bottom is provided with silicon chip 5.
By arranging thrust, when wet etching, effectively prevent the aluminium lamination that bottom attacked by liquid, causing electrical loss.
The present embodiment is on the basis of above-described embodiment, also comprise passivation layer 6, aluminium lamination 4 extends to beyond ubm layer 3 bottom, silicon chip 5 extends to beyond aluminium lamination 4 bottom, passivation layer 6 covers on silicon chip 5, and extends to successively on the aluminium lamination 4 beyond aluminium lamination 4 periphery, ubm layer 3 bottom and between aluminium lamination 4 and part ubm layer 3.Can also arrange passivation layer in a structure of the in-vention, passivation layer 6 is silica or silicon nitride.
The present embodiment, on the basis of above-described embodiment, can also be provided with protective layer 7 on passivation layer 6.Protective layer 7 is preferably polyimide layer.
The present embodiment is on the basis of above-described embodiment, and ubm layer is exposed in the bottom of described salient point, and the lower surface of described thrust is positioned on described protective layer, and described bottom is exposed ubm layer and covered by the side of described thrust.
Ubm layer exposed for sidepiece covers by thrust of the present invention, prevents from causing corrosion to the aluminium lamination of bottom, causes electrical loss.
The present embodiment is on the basis of above-described embodiment, and salient point 1 comprises copper post.Salient point of the present invention can be copper post, also can be the salient point of other materials, and the material of thrust is also copper, and certainly, the material of thrust also can be different from the material of salient point, can be nickel, tin, lead etc., plays the effect of protection bottom aluminum layer equally.
The present embodiment is on the basis of above-described embodiment, and copper post is provided with nickel dam 8, and nickel dam 8 is provided with tin layers 9 or sn-ag alloy layer.
Copper post of the present invention can arrange nickel dam, and nickel dam is used for preventing because diffusion produces the intermetallic compound of fragility and affecting reliability, the tin layers on nickel dam or sn-ag alloy layer, is finally be used for welding.
See Fig. 2, after wet etching, before the thrust of side compares wet etching, its volume obviously diminishes, and the thrust of loss plays the effect of compensation, reduces the generation of lateral erosion, prevents from causing electrical loss.
State in each embodiment on the invention, the sequence number of embodiment is only convenient to describe, and does not represent the quality of embodiment.The description of each embodiment is all emphasized particularly on different fields, in certain embodiment, there is no the part described in detail, can see the associated description of other embodiments.
In the embodiments such as apparatus and method of the present invention, obviously, each parts or each step reconfigure after can decomposing, combine and/or decomposing.These decompose and/or reconfigure and should be considered as equivalents of the present invention.Simultaneously, above in the description of the specific embodiment of the invention, the feature described for a kind of execution mode and/or illustrate can use in one or more other execution mode in same or similar mode, combined with the feature in other execution mode, or substitute the feature in other execution mode.
Should emphasize, term " comprises/comprises " existence referring to feature, key element, step or assembly when using herein, but does not get rid of the existence or additional of one or more further feature, key element, step or assembly.
Although last it is noted that described the present invention and advantage thereof in detail above, be to be understood that and can carry out various change when not exceeding the spirit and scope of the present invention limited by appended claim, substituting and converting.And scope of the present invention is not limited only to the specific embodiment of process, equipment, means, method and step described by specification.One of ordinary skilled in the art will readily appreciate that from disclosure of the present invention, can use perform the function substantially identical with corresponding embodiment described herein or obtain and its substantially identical result, existing and that will be developed in the future process, equipment, means, method or step according to the present invention.Therefore, appended claim is intended to comprise such process, equipment, means, method or step in their scope.

Claims (8)

1. a salient point bottom protection structure, comprises salient point, it is characterized in that, the bottom periphery of described salient point is provided with thrust;
Described salient point bottom is provided with ubm layer, and described ubm layer bottom is provided with aluminium lamination, and described aluminium lamination bottom is provided with silicon chip;
Also comprise passivation layer, described aluminium lamination extends to beyond described ubm layer bottom, described silicon chip extends to beyond described aluminium lamination bottom, described passivation layer covers on described silicon chip, and extends on the aluminium lamination beyond aluminium lamination periphery, described ubm layer bottom and between described aluminium lamination and the described ubm layer of part successively;
Described thrust is the truncated cone-shaped of hollow, is looped around the bottom periphery of described salient point, the middle rest of described truncated cone-shaped, for holding salient point and ubm layer.
2. salient point bottom protection structure according to claim 1, is characterized in that, the material of described thrust is identical with the material of described salient point.
3. salient point bottom protection structure according to claim 2, is characterized in that, described thrust and described salient point are once formed in electroplating process.
4. the salient point bottom protection structure according to any one of claim 1-3, is characterized in that, described passivation layer is provided with protective layer.
5. salient point bottom protection structure according to claim 4, is characterized in that, described passivation layer is silica or silicon nitride; Described protective layer is polyimide layer.
6. salient point bottom protection structure according to claim 5; it is characterized in that; ubm layer is exposed in the bottom of described salient point, and the lower surface of described thrust is positioned on described protective layer, and described bottom is exposed ubm layer and covered by the side of described thrust.
7. salient point bottom protection structure according to claim 6, is characterized in that, described salient point comprises copper post.
8. salient point bottom protection structure according to claim 7, is characterized in that, described copper post is provided with nickel dam, and described nickel dam is provided with tin layers or sn-ag alloy layer.
CN201310137091.9A 2013-04-18 2013-04-18 Salient point bottom protection structure Active CN103219305B (en)

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CN103219305B true CN103219305B (en) 2016-04-06

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103489842B (en) * 2013-09-29 2016-08-03 南通富士通微电子股份有限公司 Semiconductor package
CN103531487B (en) * 2013-09-29 2016-01-27 南通富士通微电子股份有限公司 The formation method of semiconductor package
US9520385B1 (en) 2015-06-29 2016-12-13 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and method for forming same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102315182A (en) * 2010-07-08 2012-01-11 台湾积体电路制造股份有限公司 Semiconductor chip and manufacturing method thereof
CN102376638A (en) * 2010-08-12 2012-03-14 台湾积体电路制造股份有限公司 Process for making conductive post with footing profile
CN202502990U (en) * 2011-12-19 2012-10-24 南通富士通微电子股份有限公司 Highly reliable chip-level package structure

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5136363A (en) * 1987-10-21 1992-08-04 Kabushiki Kaisha Toshiba Semiconductor device with bump electrode
JP2006278551A (en) * 2005-03-28 2006-10-12 Fujitsu Ltd Semiconductor device and its manufacturing method
KR100639703B1 (en) * 2005-08-09 2006-10-30 삼성전자주식회사 Method for compensating metal base layer undercut and wlcsp manufacturing method using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102315182A (en) * 2010-07-08 2012-01-11 台湾积体电路制造股份有限公司 Semiconductor chip and manufacturing method thereof
CN102376638A (en) * 2010-08-12 2012-03-14 台湾积体电路制造股份有限公司 Process for making conductive post with footing profile
CN202502990U (en) * 2011-12-19 2012-10-24 南通富士通微电子股份有限公司 Highly reliable chip-level package structure

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Address after: 226006 Jiangsu Province, Nantong City Chongchuan District Chongchuan Road No. 288

Patentee after: Tongfu Microelectronics Co., Ltd.

Address before: 226006 Jiangsu Province, Nantong City Chongchuan District Chongchuan Road No. 288

Patentee before: Fujitsu Microelectronics Co., Ltd., Nantong