CN103150878A - Underwater observation network control circuit - Google Patents

Underwater observation network control circuit Download PDF

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Publication number
CN103150878A
CN103150878A CN2012105744644A CN201210574464A CN103150878A CN 103150878 A CN103150878 A CN 103150878A CN 2012105744644 A CN2012105744644 A CN 2012105744644A CN 201210574464 A CN201210574464 A CN 201210574464A CN 103150878 A CN103150878 A CN 103150878A
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capacitor
chip
resistor
pins
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CN103150878B (en
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刘纯虎
顾梅园
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Hangzhou Dianzi University
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Hangzhou Dianzi University
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Abstract

The invention discloses an underwater observation network control circuit which comprises a power management module, a microprocessor circuit module, a dip angle sensor unit circuit, an analog signal multiplexing modulation circuit unit, a SD card storage circuit unit, a universal asynchronous receiver and transmitter (UART) interface circuit unit and a JLINK debugging circuit unit. The power management module comprises a 5V power-switching circuit, a 5V switching +/-12V power-switching circuit and a 3.3V power-switching circuit. The underwater observation network control circuit is strong in equipment communication expansion capability, high in transmission speed and strong in real-time performance due to the fact that five UART serial ports including a complementary metal-oxide-semiconductor transistor (CMOS) level and a recommend standard 232(RS 232) level. Different nodes are in wireless communication through Zigbee, so the underwater observation network control circuit is big in network capacity, capable of supporting research requirements for large-scale water areas, low in equipment power consumption, strong in environmental suitability, high in equipment processing speed, and powerful in functions. The high performance processor is adopted, multi-path of analog/digital (AD) and RS232 serial ports and multi-path of input/output (IO) serial ports are externally expanded, and the underwater observation network control circuit supports high-speed high-capacity peripheral storage.

Description

A kind of underwater observations network control circuit
Technical field
The invention belongs to radio communication and field of embedded technology, be specifically related to a kind of underwater observations network control circuit.
Background technology
Take up an area in ball surface area 70 ﹪ above ocean, containing a large amount of living resources and mineral resources, particularly still have many precious resources to be sunk into sleep outside the visual field the mankind in deep-sea and marine site, ocean.Under the special media environment, the basic technology means are immature, are regarded as causing the ocean resources can't be by the key factor of large-scale development.Wherein, the monitoring technology for underwater informations such as water quality information, hydrographic information, underwater acoustic information is the important general basic technology that concerns environmental monitoring, Disaster prediction, marine resources investigation, underwater operation and even national security guard.The marine monitoring means of main flow comprise at present: 1) satellite remote sensing; 2) radar monitoring; 3) oceanographic research ship; 4) mode such as fixed marine monitoring station.Can say the monitoring of Yu Haiyang at the three-dimensional development towards " satellite-land-sea-under water ", and monitoring project also develops towards " diversification ".Yet still not enough far away for the monitoring dynamics of underwater information.Although along with the progress of underwater research vehicle technology, submarine observation network technology, various types of investigative actions under water progressively increase, and also need to introduce how emerging technological means yet wish improves the real-time of large-scale underwater information feedback.
Summary of the invention
The present invention is directed to the prior art deficiency, a kind of underwater observations network control circuit is provided.
For solving the problems of the technologies described above, the technical solution adopted in the present invention is as follows:
A kind of underwater observations network control circuit comprises power management module, microcontroller circuit module, obliquity sensor element circuit, the multiplexing modulate circuit of simulating signal unit, SD card storage circuit unit, UART interface circuit unit and JLINK debug circuit unit.Described power management module comprises that 5V power-switching circuit, 5V turn ± 12V power-switching circuit and 3.3V power-switching circuit.
The 5V power-switching circuit comprises the first connector P1, the first polar capacitor C1, the second polar capacitor C2, the first diode D1, the first voltage transitions chip U1, the first light emitting diode D2, the first resistance R 1, the first inductance L 1.1 pin of voltage transitions chip U1 is connected with 2 pin of the first connector P1, the positive pole of the first polar capacitor C1; 2 pin of voltage transitions chip U1 are connected with an end of the negative electrode of the first diode D1, the first inductance L 1; 3 pin of voltage transitions chip U1,5 pin are connected and grounding connection with the negative pole of the first polar capacitor C1,1 pin of the first connector P1; The positive pole of 4 pin of voltage transitions chip U1 and the other end of the first inductance L 1, the second polar capacitor C2, the positive pole of the first light emitting diode D2 are connected and as the 5V voltage output end; The negative pole of the first light emitting diode D2 is connected with an end of the first resistance R 1; Anodal all ground connection of the negative pole of the other end of the first resistance R 1, the second polar capacitor C2, the first diode D1.The model of the first voltage transitions chip U1 adopts LM25768.
3.3V power-switching circuit comprises second voltage conversion chip U2, the 3rd polar capacitor C3, the 4th capacitor C 4, the 5th capacitor C 5, the second inductance L 2.1 pin of second voltage conversion chip U2 is connected and ground connection with an end of the negative pole of the 3rd polar capacitor C3, the 4th capacitor C 4, an end of the 5th capacitor C 5; 2 pin of second voltage conversion chip U2 are connected with the positive pole of 4 pin, the 3rd polar capacitor C3, the other end of the 4th capacitor C 4, an end of the second inductance L 2; 3 pin of second voltage conversion chip U2 are as the 5V voltage output end; The other end of the second inductance L 2 is connected with the other end of the 5th capacitor C 5 and as the 5V voltage output end.The model of second voltage conversion chip U2 adopts REG1117-3.3.
5V turns ± and the 12V circuit comprises the 21 polar capacitor C21, the 22 polar capacitor C22, the 23 polar capacitor C23, the 24 capacitor C 24, the 25 capacitor C 25, voltage transformation module U9.1 pin of voltage transformation module U9 is connected with the positive pole of the 21 polar capacitor C21 and as the 5V voltage output end; The 2 pin grounding connections of voltage transformation module U9; 7 pin of voltage transformation module U9 are connected the also output terminal of conduct+12V voltage with an end of the positive pole of the 22 polar capacitor C22, the 24 capacitor C 24; 9 pin of voltage transformation module U9 are connected with an end of the negative pole of the 23 polar capacitor C23, the 25 capacitor C 25 and conduct-12V voltage output end; 10 pin of voltage transformation module U9 are connected with the other end of the positive pole of the 23 polar capacitor C23, the 25 capacitor C 25 and ground connection; The equal ground connection of the other end of the negative pole of the 21 polar capacitor C21, the negative pole of the 22 polar capacitor C22, the 24 capacitor C 24.
the microcontroller circuit module comprises microprocessor chip U3, the 4th light emitting diode D4, the 5th light emitting diode D5, the 6th light emitting diode D6, the 7th light emitting diode D7, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8, the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12, the 13 capacitor C 13, the 14 capacitor C 14, the 15 capacitor C 15, the 16 capacitor C 16, the 17 capacitor C 17, the 18 capacitor C 18, the 19 capacitor C 19, the 20 capacitor C 20, the 42 capacitor C 42, the first crystal oscillator Y1, the second crystal oscillator Y2, the second resistance R 2, the 3rd resistance R 3, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 15 resistance R 15, the 16 resistance R 16, reference power source chip U4.1 pin of microprocessor chip U3 is connected with the negative electrode of the 4th light emitting diode D4; 2 pin of microprocessor chip U3 are connected with the negative electrode of the 5th light emitting diode D5; 3 pin of microprocessor chip U3 are connected with the negative electrode of the 6th light emitting diode D6; 4 pin of microprocessor chip U3 are connected with the negative electrode of the 7th light emitting diode D7; The anodic bonding of the anode of the anode of the anode of the 4th light emitting diode D4 and the 5th light emitting diode D5, the 6th light emitting diode D6, the 7th light emitting diode D7 and as the 3.3V voltage output end; 12 pin of microprocessor chip U3 are connected with 2 ends of the first crystal oscillator Y1 and an end of the 6th capacitor C 6; 13 pin of microprocessor chip U3 are connected with 1 end of the first crystal oscillator Y1 and an end of the 7th capacitor C 7; The other end of the 6th capacitor C 6 is connected with the other end of the 7th capacitor C 7 and ground connection; 14 pin of microprocessor chip U3 are connected with an end of the tenth capacitor C 10 and an end of the 11 resistance R 11; The other end ground connection of the tenth capacitor C 10; The other end of the 11 resistance R 11 is as the 3.3V voltage output end; 49 pin of microprocessor chip U3 are connected with an end of the 8th capacitor C 8; The other end of the 8th capacitor C 8 is connected with an end of the 9th capacitor C 9 and ground connection; 73 pin of microprocessor chip U3 are connected with the other end of the 9th capacitor C 9; 94 pin of microprocessor chip U3 are connected with an end of the second resistance R 2; The other end ground connection of the second resistance R 2; 99 pin of microprocessor chip U3 are connected with an end of the 3rd resistance R 3; The other end ground connection of the 3rd resistance R 3; 74 pin of microprocessor chip U3 are connected with 27 pin, 10 pin, 20 pin and ground connection; 21 pin of microprocessor chip U3 are connected with an end of an end of the 13 capacitor C 13, the 12 resistance R 12, the negative electrode of reference power source chip U4; The other end of the 12 resistance R 12 is as the 3.3V voltage output end; The equal ground connection of anode of the other end of the 13 capacitor C 13 and reference power source chip U4; 22 pin of microprocessor chip U3 are connected with 19 pin, 11 pin, 28 pin, 100 pin, 75 pin, 50 pin and as the 3.3V voltage output end; 6 pin of microprocessor chip U3 are connected with an end of the 42 capacitor C 42,1 pin of Bat; 2 pin of Bat and the other end ground connection of the 42 capacitor C 42; 9 pin of microprocessor chip U3 are connected with 1 end of the second crystal oscillator Y2, an end of the 12 capacitor C 12; 8 pin of microprocessor chip U3 are connected with 2 ends of the second crystal oscillator Y2, an end of the 11 capacitor C 11; The equal ground connection of the other end of the other end of the 11 capacitor C 11 and the 12 capacitor C 12; One end of one end of one end of one end of the 14 capacitor C 14 and an end of the 15 capacitor C 15, the 16 capacitor C 16, an end of the 17 capacitor C 17, the 18 capacitor C 18, an end of the 19 capacitor C 19, the 20 capacitor C 20 is connected and as the 3.3V voltage output end; The other end of the 14 capacitor C 14 is connected and ground connection with the other end of the other end of the 15 capacitor C 15, the 16 capacitor C 16, the other end of the 17 capacitor C 17, the other end of the 18 capacitor C 18, the other end of the 19 capacitor C 19, the other end of the 20 capacitor C 20.The model of reference power source chip U4 is LM4040AIM3-2.5; The model of microprocessor chip U3 is STM32F207.
The obliquity sensor element circuit comprises obliquity sensor U13, the 27 capacitor C 27, the 40 capacitor C 40, the 41 capacitor C 41, the first operational amplifier U11, the second operational amplifier U12, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 20 resistance R 20.5 pin of obliquity sensor U13 are connected with 3 pin of the second operational amplifier U12; 2 pin of the second operational amplifier U12 are connected with an end of 1 pin, the 19 resistance R 19; The 4 pin ground connection of the second operational amplifier U12; 8 pin of the second operational amplifier U12 are connected with an end of the 40 capacitor C 40 and as the 5V voltage output end; 5 pin of the second operational amplifier U12 are connected with the other end of the 19 resistance R 19, an end of the 20 resistance R 20; 6 pin of the second operational amplifier U12 are connected with 34 pin of 7 pin, microprocessor chip U3; The equal ground connection of the other end of the other end of the 20 resistance R 20, the 40 capacitor C 40; The 6 pin ground connection of obliquity sensor U13; 11 pin of obliquity sensor U13 are connected with 3 pin of the first operational amplifier U11; 2 pin of the first operational amplifier U11 are connected with an end of 1 pin, the 17 resistance R 17; The 4 pin ground connection of the first operational amplifier U11; 8 pin of the first operational amplifier U11 are connected with an end of the 27 capacitor C 27 and as the 5V voltage output end; 5 pin of the first operational amplifier U11 are connected with the other end of the 17 resistance R 17, an end of the 18 resistance R 18; 6 pin of the first operational amplifier U11 are connected with 35 pin of 7 pin, microprocessor chip U3; The equal ground connection of the other end of the other end of the 18 resistance R 18 and the 27 capacitor C 27; 12 pin of the first operational amplifier U11 are connected with an end of the 41 capacitor C 41; The other end ground connection of the 41 capacitor C 41; All the other foot rests of the first operational amplifier U11 are empty.The model of the first operational amplifier U11 is SCA100T.
The multiplexing modulate circuit of simulating signal unit comprises the tenth connector P10, the 26 capacitor C 26, the 38 capacitor C 38, the 39 capacitor C 39, the three diode D3, analog switch chip U8, operational amplifier chip U10, the 21 resistance R 21, the 22 resistance R 22.3 pin of analog switch chip U8 are connected with an end of the 38 capacitor C 38 and conduct-12V voltage output end; The other end ground connection of the 38 capacitor C 38; 9 pin of analog switch chip U8 are connected with 1 pin of the tenth connector P10; 10 pin of analog switch chip U8 are connected with 3 pin of the tenth connector P10; 11 pin of analog switch chip U8 are connected with 5 pin of the tenth connector P10; 12 pin of analog switch chip U8 are connected with 7 pin of the tenth connector P10; 7 pin of analog switch chip U8 are connected with 9 pin of the tenth connector P10; 6 pin of analog switch chip U8 are connected with 11 pin of the tenth connector P10; 5 pin of analog switch chip U8 are connected with 13 pin of the tenth connector P10; 4 pin of analog switch chip U8 are connected with 15 pin of the tenth connector P10; 13 pin of analog switch chip U8 are connected with an end of the 39 capacitor C 39 and conduct+12V voltage output end; The other end ground connection of the 39 capacitor C 39; 2 pin of analog switch chip U8 are connected with 29 pin of microprocessor chip U3; 15 pin of analog switch chip U8 are connected with 32 pin of microprocessor chip U3; 16 pin of analog switch chip U8 are connected with 31 pin of microprocessor chip U3; 1 pin of analog switch chip U8 is connected with 30 pin of microprocessor chip U3; 8 pin of analog switch chip U8 are connected with 3 pin of the negative electrode of the 3rd diode D3, operational amplifier chip U10; The plus earth of the 3rd diode D3; 2 pin of operational amplifier chip U10 are connected with an end of 1 pin, the 21 resistance R 21; The 4 pin ground connection of operational amplifier chip U10; 8 pin of operational amplifier chip U10 are connected with an end of the 26 capacitor C 26 and as the 5V voltage output end; The other end ground connection of the 26 capacitor C 26; The 14 pin ground connection of analog switch chip U8; The other end of the 21 resistance R 21 is connected with an end of the 22 resistance R 22,5 pin of operational amplifier chip U10; The other end ground connection of the 22 resistance R 22; 6 pin of operational amplifier chip U10 are connected with 33 pin of 7 pin, microprocessor chip U3; 2 pin of the tenth connector P10 are connected with 4 pin, 6 pin, 8 pin, 10 pin, 12 pin, 14 pin, 16 pin and ground connection.The model of analog switch chip U8 is MAX308CSE.
SD card storage circuit unit comprises the 43 capacitor C 43, the 25 resistance R 25, the 26 resistance R 26, the 27 resistance R 27, the 28 resistance R 28, the 29 resistance R 29, the 30 resistance R 30, SD card socket U7.1 pin of SD card socket U7 is connected with an end of the 30 resistance R 30,78 pin of microprocessor chip U3; 2 pin of SD card socket U7 are connected with an end of the 29 resistance R 29,79 pin of microprocessor chip U3; 3 pin of SD card socket U7 are connected with an end of the 28 resistance R 28,83 pin of microprocessor chip U3; 4 pin of SD card socket U7 are connected with an end of the 43 capacitor C 43; The other end ground connection of the 43 capacitor C 43; 5 pin of SD card socket U7 are connected with an end of the 25 resistance R 25,80 pin of microprocessor chip U3; The 6 pin ground connection of SD card socket U7; 7 pin of SD card socket U7 are connected with an end of the 26 resistance R 26,65 pin of microprocessor chip U3; 8 pin of SD card socket U7 are connected with an end of the 27 resistance R 27,66 pin of microprocessor chip U3; The 9 pin ground connection of SD card socket U7; The other end of the 25 resistance R 25 is connected with the other end of the other end of the 26 resistance R 26, the 27 resistance R 27 and as the 3.3V voltage output end.The model of SD card socket U7 is MicroSD.
UART interface circuit unit comprises the 28 capacitor C 28, the 29 capacitor C 29, the 30 capacitor C 30, the 31 capacitor C 31, the 32 capacitor C 32, the 33 capacitor C 33, the 34 capacitor C 34, the 35 capacitor C 35, the 36 capacitor C 36, the 37 capacitor C 37, the one UART level transferring chip U5, the 2nd UART level transferring chip U6, the 3rd connector P3, the 4th connector P4, the 5th connector P5.1 pin of the one UART level transferring chip U5 is connected with an end of the 28 capacitor C 28; 3 pin of the one UART level transferring chip U5 are connected with the other end of the 28 capacitor C 28; 4 pin of the one UART level transferring chip U5 are connected with an end of the 29 capacitor C 29; 5 pin of the one UART level transferring chip U5 are connected with an end of the 29 capacitor C 29; 11 pin of the one UART level transferring chip U5 are connected with 23 pin of microprocessor chip U3; 10 pin of the one UART level transferring chip U5 are connected with 25 pin of microprocessor chip U3; 12 pin of the one UART level transferring chip U5 are connected with 24 pin of microprocessor chip U3; 9 pin of the one UART level transferring chip U5 are connected with 26 pin of microprocessor chip U3; 16 pin of the one UART level transferring chip U5 are connected with an end of the 31 capacitor C 31 and as the 3.3V voltage output end; 2 pin of the one UART level transferring chip U5 are connected with an end of the 30 capacitor C 30; The other end of the 30 capacitor C 30 is connected with the other end of the 31 capacitor C 31 and ground connection; 14 pin of the one UART level transferring chip U5 are connected with 2 pin of the 4th connector P4; 7 pin of the one UART level transferring chip U5 are connected with 6 pin of the 4th connector P4; 13 pin of the one UART level transferring chip U5 are connected with 1 pin of the 4th connector P4; 8 pin of the one UART level transferring chip U5 are connected with 5 pin of the 4th connector P4; 6 pin of the one UART level transferring chip U5 are connected with an end of the 32 capacitor C 32; The equal ground connection of residue pin of 15 pin of the other end of the 32 capacitor C 32, a UART level transferring chip U5, the 4th connector P4; 1 pin of the 2nd UART level transferring chip U6 is connected with an end of the 33 capacitor C 33; 3 pin of the 2nd UART level transferring chip U6 are connected with the other end of the 33 capacitor C 33; 4 pin of the 2nd UART level transferring chip U6 are connected with an end of the 34 capacitor C 34; 5 pin of the 2nd UART level transferring chip U6 are connected with the other end of the 34 capacitor C 34; 11 pin of the 2nd UART level transferring chip U6 are connected with 55 pin of microprocessor chip U3; 10 pin of the 2nd UART level transferring chip U6 are connected with 63 pin of microprocessor chip U3; 12 pin of the 2nd UART level transferring chip U6 are connected with 56 pin of microprocessor chip U3; 9 pin of the 2nd UART level transferring chip U6 are connected with 64 pin of microprocessor chip U3; 16 pin of the 2nd UART level transferring chip U6 are connected with an end of the 36 capacitor C 36 and as the 3.3V voltage output end; 2 pin of the 2nd UART level transferring chip U6 are connected with an end of the 35 capacitor C 35; The other end of the 35 capacitor C 35 is connected with the other end of the 36 capacitor C 36 and ground connection; 14 pin of the 2nd UART level transferring chip U6 are connected with 5 pin of the 5th connector P5; 7 pin of the 2nd UART level transferring chip U6 are connected with 1 pin of the 5th connector P5; 13 pin of the 2nd UART level transferring chip U6 are connected with 6 pin of the 5th connector P5; 8 pin of the 2nd UART level transferring chip U6 are connected with 2 pin of the 5th connector P5; 6 pin of the 2nd UART level transferring chip U6 are connected with an end of the 37 capacitor C 37; The equal ground connection of residue pin of 15 pin of the other end of the 37 capacitor C 37, the 2nd UART level transferring chip U6, the 5th connector P5; 1 pin of the 3rd connector P3 is connected with 93 pin of microprocessor chip U3; 2 pin of the 3rd connector P3 are connected with 92 pin of microprocessor chip U3; The 3 pin ground connection of the 3rd connector P3.The model of the one UART level transferring chip U5 is MAX3232CSE, and the model of the 2nd UART level transferring chip U6 is MAX3232CSE.
JLINK debug circuit unit comprises the 4th resistance R 4, the five resistance R 5, the six resistance R 6, the seven resistance R 7, the eight resistance R 8, the nine resistance R 9, the ten resistance R 10, the second connector P2.1 pin of the second connector P2 and 2 pin are all as the 3.3V voltage output end; 3 pin of the second connector P2 are connected with an end of 90 pin of microprocessor chip U3, the 7th resistance R 7; 5 pin of the second connector P2 are connected with an end of 77 pin of microprocessor chip U3, the 6th resistance R 6; 7 pin of the second connector P2 are connected with an end of 72 pin of microprocessor chip U3, the 5th resistance R 5; 9 pin of the second connector P2 are connected with an end of 76 pin of microprocessor chip U3, the 8th resistance R 8; 13 pin of the second connector P2 are connected with an end of 89 pin of microprocessor chip U3, the 4th resistance R 4; 15 pin of the second connector P2 are resetting pin; 17 pin of the second connector P2 are connected with an end of the 9th resistance R 9; 19 pin of the second connector P2 are connected with an end of the tenth resistance R 10; The other end of the other end of the other end of the 4th resistance R 4 and the 5th resistance R 5, the other end of the 6th resistance R 6, the 7th resistance R 7 is connected and as the 3.3V voltage output end; The other end of the 8th resistance R 8 is connected and ground connection with the other end of the 9th resistance R 9, the other end of the tenth resistance R 10; 4 pin of the second connector P2 are connected with 6 pin, 8 pin, 10 pin, 12 pin, 14 pin, 16 pin, 18 pin, 20 pin and ground connection; 11 foot rests of the second connector P2 are empty.
The residue pin of microprocessor chip U3 is all built on stilts.
Beneficial effect of the present invention:
1. the devices communicating extended capability is strong, provides to comprise CMOS level and RS232 level totally 5 UART serial ports, and transmission speed is fast, and is real-time.Between different nodes, by the ZigBee radio communication, network capacity is large, can support the investigation demand in waters on a large scale.
2. equipment power dissipation is low, and environmental suitability is strong.Equipment adopts the solar panels power supply, and electronic module all adopts and meets the technical grade device, is fit to long-time severe environment applications.
3. device processes speed is fast, and is powerful.The present invention adopts high-performance processor, extends out multi-channel A/D, RS232 serial ports, multichannel IO, supports the storage of high-speed high capacity peripheral hardware, is conducive to the following expansion of system.
Description of drawings
Fig. 1 is 5V power-switching circuit figure;
Fig. 2 is 3.3V power-switching circuit figure;
Fig. 3 is that 5V turns ± the 12V circuit diagram;
Fig. 4 is the microcontroller circuit module map;
Fig. 5 is obliquity sensor element circuit figure;
Fig. 6 is the multiplexing modulate circuit of simulating signal unit figure;
Fig. 7 is SD card storage circuit unit figure;
Fig. 8 is UART interface circuit unit figure;
Fig. 9 is JLINK debug circuit unit figure.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further explained.
A kind of underwater observations network control circuit comprises power management module, microcontroller circuit module, obliquity sensor element circuit, the multiplexing modulate circuit of simulating signal unit, SD card storage circuit unit, UART interface circuit unit and JLINK debug circuit unit.Described power management module comprises that 5V power-switching circuit, 5V turn ± 12V power-switching circuit and 3.3V power-switching circuit.
As shown in Figure 1, the 5V power-switching circuit comprises the first connector P1, the first polar capacitor C1, the second polar capacitor C2, the first diode D1, the first voltage transitions chip U1, the first light emitting diode D2, the first resistance R 1, the first inductance L 1.1 pin of voltage transitions chip U1 is connected with 2 pin of the first connector P1, the positive pole of the first polar capacitor C1; 2 pin of voltage transitions chip U1 are connected with an end of the negative electrode of the first diode D1, the first inductance L 1; 3 pin of voltage transitions chip U1,5 pin are connected and grounding connection with the negative pole of the first polar capacitor C1,1 pin of the first connector P1; The positive pole of 4 pin of voltage transitions chip U1 and the other end of the first inductance L 1, the second polar capacitor C2, the positive pole of the first light emitting diode D2 are connected and as the 5V voltage output end; The negative pole of the first light emitting diode D2 is connected with an end of the first resistance R 1; Anodal all ground connection of the negative pole of the other end of the first resistance R 1, the second polar capacitor C2, the first diode D1.The model of the first voltage transitions chip U1 adopts LM25768.
As shown in Figure 2, the 3.3V power-switching circuit comprises second voltage conversion chip U2, the 3rd polar capacitor C3, the 4th capacitor C 4, the 5th capacitor C 5, the second inductance L 2.1 pin of second voltage conversion chip U2 is connected and ground connection with an end of the negative pole of the 3rd polar capacitor C3, the 4th capacitor C 4, an end of the 5th capacitor C 5; 2 pin of second voltage conversion chip U2 are connected with the positive pole of 4 pin, the 3rd polar capacitor C3, the other end of the 4th capacitor C 4, an end of the second inductance L 2; 3 pin of second voltage conversion chip U2 are as the 5V voltage output end; The other end of the second inductance L 2 is connected with the other end of the 5th capacitor C 5 and as the 5V voltage output end.The model of second voltage conversion chip U2 adopts REG1117-3.3.
As shown in Figure 3,5V turn ± the 12V circuit comprises the 21 polar capacitor C21, the 22 polar capacitor C22, the 23 polar capacitor C23, the 24 capacitor C 24, the 25 capacitor C 25, voltage transformation module U9.1 pin of voltage transformation module U9 is connected with the positive pole of the 21 polar capacitor C21 and as the 5V voltage output end; The 2 pin grounding connections of voltage transformation module U9; 7 pin of voltage transformation module U9 are connected the also output terminal of conduct+12V voltage with an end of the positive pole of the 22 polar capacitor C22, the 24 capacitor C 24; 9 pin of voltage transformation module U9 are connected with an end of the negative pole of the 23 polar capacitor C23, the 25 capacitor C 25 and conduct-12V voltage output end; 10 pin of voltage transformation module U9 are connected with the other end of the positive pole of the 23 polar capacitor C23, the 25 capacitor C 25 and ground connection; The equal ground connection of the other end of the negative pole of the 21 polar capacitor C21, the negative pole of the 22 polar capacitor C22, the 24 capacitor C 24.
as shown in Figure 4, the microcontroller circuit module comprises microprocessor chip U3, the 4th light emitting diode D4, the 5th light emitting diode D5, the 6th light emitting diode D6, the 7th light emitting diode D7, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8, the 9th capacitor C 9, the tenth capacitor C 10, the 11 capacitor C 11, the 12 capacitor C 12, the 13 capacitor C 13, the 14 capacitor C 14, the 15 capacitor C 15, the 16 capacitor C 16, the 17 capacitor C 17, the 18 capacitor C 18, the 19 capacitor C 19, the 20 capacitor C 20, the 42 capacitor C 42, the first crystal oscillator Y1, the second crystal oscillator Y2, the second resistance R 2, the 3rd resistance R 3, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 15 resistance R 15, the 16 resistance R 16, reference power source chip U4.1 pin of microprocessor chip U3 is connected with the negative electrode of the 4th light emitting diode D4; 2 pin of microprocessor chip U3 are connected with the negative electrode of the 5th light emitting diode D5; 3 pin of microprocessor chip U3 are connected with the negative electrode of the 6th light emitting diode D6; 4 pin of microprocessor chip U3 are connected with the negative electrode of the 7th light emitting diode D7; The anodic bonding of the anode of the anode of the anode of the 4th light emitting diode D4 and the 5th light emitting diode D5, the 6th light emitting diode D6, the 7th light emitting diode D7 and as the 3.3V voltage output end; 12 pin of microprocessor chip U3 are connected with 2 ends of the first crystal oscillator Y1 and an end of the 6th capacitor C 6; 13 pin of microprocessor chip U3 are connected with 1 end of the first crystal oscillator Y1 and an end of the 7th capacitor C 7; The other end of the 6th capacitor C 6 is connected with the other end of the 7th capacitor C 7 and ground connection; 14 pin of microprocessor chip U3 are connected with an end of the tenth capacitor C 10 and an end of the 11 resistance R 11; The other end ground connection of the tenth capacitor C 10; The other end of the 11 resistance R 11 is as the 3.3V voltage output end; 49 pin of microprocessor chip U3 are connected with an end of the 8th capacitor C 8; The other end of the 8th capacitor C 8 is connected with an end of the 9th capacitor C 9 and ground connection; 73 pin of microprocessor chip U3 are connected with the other end of the 9th capacitor C 9; 94 pin of microprocessor chip U3 are connected with an end of the second resistance R 2; The other end ground connection of the second resistance R 2; 99 pin of microprocessor chip U3 are connected with an end of the 3rd resistance R 3; The other end ground connection of the 3rd resistance R 3; 74 pin of microprocessor chip U3 are connected with 27 pin, 10 pin, 20 pin and ground connection; 21 pin of microprocessor chip U3 are connected with an end of an end of the 13 capacitor C 13, the 12 resistance R 12, the negative electrode of reference power source chip U4; The other end of the 12 resistance R 12 is as the 3.3V voltage output end; The equal ground connection of anode of the other end of the 13 capacitor C 13 and reference power source chip U4; 22 pin of microprocessor chip U3 are connected with 19 pin, 11 pin, 28 pin, 100 pin, 75 pin, 50 pin and as the 3.3V voltage output end; 6 pin of microprocessor chip U3 are connected with an end of the 42 capacitor C 42,1 pin of Bat; 2 pin of Bat and the other end ground connection of the 42 capacitor C 42; 9 pin of microprocessor chip U3 are connected with 1 end of the second crystal oscillator Y2, an end of the 12 capacitor C 12; 8 pin of microprocessor chip U3 are connected with 2 ends of the second crystal oscillator Y2, an end of the 11 capacitor C 11; The equal ground connection of the other end of the other end of the 11 capacitor C 11 and the 12 capacitor C 12; One end of one end of one end of one end of the 14 capacitor C 14 and an end of the 15 capacitor C 15, the 16 capacitor C 16, an end of the 17 capacitor C 17, the 18 capacitor C 18, an end of the 19 capacitor C 19, the 20 capacitor C 20 is connected and as the 3.3V voltage output end; The other end of the 14 capacitor C 14 is connected and ground connection with the other end of the other end of the 15 capacitor C 15, the 16 capacitor C 16, the other end of the 17 capacitor C 17, the other end of the 18 capacitor C 18, the other end of the 19 capacitor C 19, the other end of the 20 capacitor C 20.The model of reference power source chip U4 is LM4040AIM3-2.5; The model of microprocessor chip U3 is STM32F207.
As shown in Figure 5, the obliquity sensor element circuit comprises obliquity sensor U13, the 27 capacitor C 27, the 40 capacitor C 40, the 41 capacitor C 41, the first operational amplifier U11, the second operational amplifier U12, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 20 resistance R 20.5 pin of obliquity sensor U13 are connected with 3 pin of the second operational amplifier U12; 2 pin of the second operational amplifier U12 are connected with an end of 1 pin, the 19 resistance R 19; The 4 pin ground connection of the second operational amplifier U12; 8 pin of the second operational amplifier U12 are connected with an end of the 40 capacitor C 40 and as the 5V voltage output end; 5 pin of the second operational amplifier U12 are connected with the other end of the 19 resistance R 19, an end of the 20 resistance R 20; 6 pin of the second operational amplifier U12 are connected with 34 pin of 7 pin, microprocessor chip U3; The equal ground connection of the other end of the other end of the 20 resistance R 20, the 40 capacitor C 40; The 6 pin ground connection of obliquity sensor U13; 11 pin of obliquity sensor U13 are connected with 3 pin of the first operational amplifier U11; 2 pin of the first operational amplifier U11 are connected with an end of 1 pin, the 17 resistance R 17; The 4 pin ground connection of the first operational amplifier U11; 8 pin of the first operational amplifier U11 are connected with an end of the 27 capacitor C 27 and as the 5V voltage output end; 5 pin of the first operational amplifier U11 are connected with the other end of the 17 resistance R 17, an end of the 18 resistance R 18; 6 pin of the first operational amplifier U11 are connected with 35 pin of 7 pin, microprocessor chip U3; The equal ground connection of the other end of the other end of the 18 resistance R 18 and the 27 capacitor C 27; 12 pin of the first operational amplifier U11 are connected with an end of the 41 capacitor C 41; The other end ground connection of the 41 capacitor C 41; All the other foot rests of the first operational amplifier U11 are empty.The model of the first operational amplifier U11 is SCA100T.
As shown in Figure 6, the multiplexing modulate circuit of simulating signal unit comprises the tenth connector P10, the 26 capacitor C 26, the 38 capacitor C 38, the 39 capacitor C 39, the three diode D3, analog switch chip U8, operational amplifier chip U10, the 21 resistance R 21, the 22 resistance R 22.3 pin of analog switch chip U8 are connected with an end of the 38 capacitor C 38 and conduct-12V voltage output end; The other end ground connection of the 38 capacitor C 38; 9 pin of analog switch chip U8 are connected with 1 pin of the tenth connector P10; 10 pin of analog switch chip U8 are connected with 3 pin of the tenth connector P10; 11 pin of analog switch chip U8 are connected with 5 pin of the tenth connector P10; 12 pin of analog switch chip U8 are connected with 7 pin of the tenth connector P10; 7 pin of analog switch chip U8 are connected with 9 pin of the tenth connector P10; 6 pin of analog switch chip U8 are connected with 11 pin of the tenth connector P10; 5 pin of analog switch chip U8 are connected with 13 pin of the tenth connector P10; 4 pin of analog switch chip U8 are connected with 15 pin of the tenth connector P10; 13 pin of analog switch chip U8 are connected with an end of the 39 capacitor C 39 and conduct+12V voltage output end; The other end ground connection of the 39 capacitor C 39; 2 pin of analog switch chip U8 are connected with 29 pin of microprocessor chip U3; 15 pin of analog switch chip U8 are connected with 32 pin of microprocessor chip U3; 16 pin of analog switch chip U8 are connected with 31 pin of microprocessor chip U3; 1 pin of analog switch chip U8 is connected with 30 pin of microprocessor chip U3; 8 pin of analog switch chip U8 are connected with 3 pin of the negative electrode of the 3rd diode D3, operational amplifier chip U10; The plus earth of the 3rd diode D3; 2 pin of operational amplifier chip U10 are connected with an end of 1 pin, the 21 resistance R 21; The 4 pin ground connection of operational amplifier chip U10; 8 pin of operational amplifier chip U10 are connected with an end of the 26 capacitor C 26 and as the 5V voltage output end; The other end ground connection of the 26 capacitor C 26; The 14 pin ground connection of analog switch chip U8; The other end of the 21 resistance R 21 is connected with an end of the 22 resistance R 22,5 pin of operational amplifier chip U10; The other end ground connection of the 22 resistance R 22; 6 pin of operational amplifier chip U10 are connected with 33 pin of 7 pin, microprocessor chip U3; 2 pin of the tenth connector P10 are connected with 4 pin, 6 pin, 8 pin, 10 pin, 12 pin, 14 pin, 16 pin and ground connection.The model of analog switch chip U8 is MAX308CSE.
As shown in Figure 7, SD card storage circuit unit comprises the 43 capacitor C 43, the 25 resistance R 25, the 26 resistance R 26, the 27 resistance R 27, the 28 resistance R 28, the 29 resistance R 29, the 30 resistance R 30, SD card socket U7.1 pin of SD card socket U7 is connected with an end of the 30 resistance R 30,78 pin of microprocessor chip U3; 2 pin of SD card socket U7 are connected with an end of the 29 resistance R 29,79 pin of microprocessor chip U3; 3 pin of SD card socket U7 are connected with an end of the 28 resistance R 28,83 pin of microprocessor chip U3; 4 pin of SD card socket U7 are connected with an end of the 43 capacitor C 43; The other end ground connection of the 43 capacitor C 43; 5 pin of SD card socket U7 are connected with an end of the 25 resistance R 25,80 pin of microprocessor chip U3; The 6 pin ground connection of SD card socket U7; 7 pin of SD card socket U7 are connected with an end of the 26 resistance R 26,65 pin of microprocessor chip U3; 8 pin of SD card socket U7 are connected with an end of the 27 resistance R 27,66 pin of microprocessor chip U3; The 9 pin ground connection of SD card socket U7; The other end of the 25 resistance R 25 is connected with the other end of the other end of the 26 resistance R 26, the 27 resistance R 27 and as the 3.3V voltage output end.The model of SD card socket U7 is MicroSD.
As shown in Figure 8, UART interface circuit unit comprises the 28 capacitor C 28, the 29 capacitor C 29, the 30 capacitor C 30, the 31 capacitor C 31, the 32 capacitor C 32, the 33 capacitor C 33, the 34 capacitor C 34, the 35 capacitor C 35, the 36 capacitor C 36, the 37 capacitor C 37, the one UART level transferring chip U5, the 2nd UART level transferring chip U6, the 3rd connector P3, the 4th connector P4, the 5th connector P5.1 pin of the one UART level transferring chip U5 is connected with an end of the 28 capacitor C 28; 3 pin of the one UART level transferring chip U5 are connected with the other end of the 28 capacitor C 28; 4 pin of the one UART level transferring chip U5 are connected with an end of the 29 capacitor C 29; 5 pin of the one UART level transferring chip U5 are connected with an end of the 29 capacitor C 29; 11 pin of the one UART level transferring chip U5 are connected with 23 pin of microprocessor chip U3; 10 pin of the one UART level transferring chip U5 are connected with 25 pin of microprocessor chip U3; 12 pin of the one UART level transferring chip U5 are connected with 24 pin of microprocessor chip U3; 9 pin of the one UART level transferring chip U5 are connected with 26 pin of microprocessor chip U3; 16 pin of the one UART level transferring chip U5 are connected with an end of the 31 capacitor C 31 and as the 3.3V voltage output end; 2 pin of the one UART level transferring chip U5 are connected with an end of the 30 capacitor C 30; The other end of the 30 capacitor C 30 is connected with the other end of the 31 capacitor C 31 and ground connection; 14 pin of the one UART level transferring chip U5 are connected with 2 pin of the 4th connector P4; 7 pin of the one UART level transferring chip U5 are connected with 6 pin of the 4th connector P4; 13 pin of the one UART level transferring chip U5 are connected with 1 pin of the 4th connector P4; 8 pin of the one UART level transferring chip U5 are connected with 5 pin of the 4th connector P4; 6 pin of the one UART level transferring chip U5 are connected with an end of the 32 capacitor C 32; The equal ground connection of residue pin of 15 pin of the other end of the 32 capacitor C 32, a UART level transferring chip U5, the 4th connector P4; 1 pin of the 2nd UART level transferring chip U6 is connected with an end of the 33 capacitor C 33; 3 pin of the 2nd UART level transferring chip U6 are connected with the other end of the 33 capacitor C 33; 4 pin of the 2nd UART level transferring chip U6 are connected with an end of the 34 capacitor C 34; 5 pin of the 2nd UART level transferring chip U6 are connected with the other end of the 34 capacitor C 34; 11 pin of the 2nd UART level transferring chip U6 are connected with 55 pin of microprocessor chip U3; 10 pin of the 2nd UART level transferring chip U6 are connected with 63 pin of microprocessor chip U3; 12 pin of the 2nd UART level transferring chip U6 are connected with 56 pin of microprocessor chip U3; 9 pin of the 2nd UART level transferring chip U6 are connected with 64 pin of microprocessor chip U3; 16 pin of the 2nd UART level transferring chip U6 are connected with an end of the 36 capacitor C 36 and as the 3.3V voltage output end; 2 pin of the 2nd UART level transferring chip U6 are connected with an end of the 35 capacitor C 35; The other end of the 35 capacitor C 35 is connected with the other end of the 36 capacitor C 36 and ground connection; 14 pin of the 2nd UART level transferring chip U6 are connected with 5 pin of the 5th connector P5; 7 pin of the 2nd UART level transferring chip U6 are connected with 1 pin of the 5th connector P5; 13 pin of the 2nd UART level transferring chip U6 are connected with 6 pin of the 5th connector P5; 8 pin of the 2nd UART level transferring chip U6 are connected with 2 pin of the 5th connector P5; 6 pin of the 2nd UART level transferring chip U6 are connected with an end of the 37 capacitor C 37; The equal ground connection of residue pin of 15 pin of the other end of the 37 capacitor C 37, the 2nd UART level transferring chip U6, the 5th connector P5; 1 pin of the 3rd connector P3 is connected with 93 pin of microprocessor chip U3; 2 pin of the 3rd connector P3 are connected with 92 pin of microprocessor chip U3; The 3 pin ground connection of the 3rd connector P3.The model of the one UART level transferring chip U5 is MAX3232CSE, and the model of the 2nd UART level transferring chip U6 is MAX3232CSE.
As shown in Figure 9, JLINK debug circuit unit comprises the 4th resistance R 4, the five resistance R 5, the six resistance R 6, the seven resistance R 7, the eight resistance R 8, the nine resistance R 9, the ten resistance R 10, the second connector P2.1 pin of the second connector P2 and 2 pin are all as the 3.3V voltage output end; 3 pin of the second connector P2 are connected with an end of 90 pin of microprocessor chip U3, the 7th resistance R 7; 5 pin of the second connector P2 are connected with an end of 77 pin of microprocessor chip U3, the 6th resistance R 6; 7 pin of the second connector P2 are connected with an end of 72 pin of microprocessor chip U3, the 5th resistance R 5; 9 pin of the second connector P2 are connected with an end of 76 pin of microprocessor chip U3, the 8th resistance R 8; 13 pin of the second connector P2 are connected with an end of 89 pin of microprocessor chip U3, the 4th resistance R 4; 15 pin of the second connector P2 are resetting pin; 17 pin of the second connector P2 are connected with an end of the 9th resistance R 9; 19 pin of the second connector P2 are connected with an end of the tenth resistance R 10; The other end of the other end of the other end of the 4th resistance R 4 and the 5th resistance R 5, the other end of the 6th resistance R 6, the 7th resistance R 7 is connected and as the 3.3V voltage output end; The other end of the 8th resistance R 8 is connected and ground connection with the other end of the 9th resistance R 9, the other end of the tenth resistance R 10; 4 pin of the second connector P2 are connected with 6 pin, 8 pin, 10 pin, 12 pin, 14 pin, 16 pin, 18 pin, 20 pin and ground connection; 11 foot rests of the second connector P2 are empty.
The residue pin of microprocessor chip U3 is all built on stilts.
This underwater observations network control circuit course of work is as follows:
Solar panels are for controlling the poly-lithium battery charging that device is 12V6AH by solar panels, lithium battery provides the 12V power supply, supplies with observer nodes subsidiary hydrology sensor or other measurement module power supplys; Simultaneously, the 12V power supply provides the required 5V power supply of other modules on control panel by LM2596, as GPS module, ZigBee module etc.; The 5V power supply is converted to the 3.3V power supply by LM1117, provides STM32F207 microprocessor, SD card memory cell, communications interface unit etc. partly to power.Control module is collected this node present position by GPS, collect the information of the sensor collection of serial line interface by the RS232 serial ports, gather other status informations by AD, then the SD card will be stored in after these information processings, deliver to Centroid (the local ZigBee module while is as the via node of other nodes) by the ZigBee module by other via nodes simultaneously, Centroid is crossed information exchange the GPRS/WDMA network again and is delivered to the data center storage demonstration.Centroid control panel itself is identical with ordinary node, and the difference part is that the ordinary node control panel only installs the ZigBee wireless module, and the Centroid control panel is still needed the GPRS/WDMA wireless communication module is installed except the ZigBee module is installed.

Claims (1)

1. 一种水下观测网络控制电路,包括电源管理模块、微处理器电路模块、倾角传感器单元电路、模拟信号复用调理电路单元、SD卡存贮电路单元、UART接口电路单元和JLINK调试电路单元,所述的电源管理模块包括5V电源转换电路、5V转±12V电源转换电路和3.3V电源转换电路; 1. An underwater observation network control circuit, including a power management module, a microprocessor circuit module, an inclination sensor unit circuit, an analog signal multiplexing and conditioning circuit unit, an SD card storage circuit unit, a UART interface circuit unit and a JLINK debugging circuit unit, the power management module includes a 5V power conversion circuit, a 5V to ±12V power conversion circuit and a 3.3V power conversion circuit; 其特征在于:5V电源转换电路包括第一接插件P1、第一极性电容C1、第二极性电容C2、第一二极管D1、第一电压转换芯片U1、第一发光二极管D2、第一电阻R1、第一电感L1,电压转换芯片U1的1脚与第一接插件P1的2脚、第一极性电容C1的正极连接;电压转换芯片U1的2脚与第一二极管D1的阴极、第一电感L1的一端连接;电压转换芯片U1的3脚、5脚与第一极性电容C1的负极、第一接插件P1的1脚连接并接地连接;电压转换芯片U1的4脚与第一电感L1的另一端、第二极性电容C2的正极、第一发光二极管D2的正极连接并作为5V电压输出端;第一发光二极管D2的负极与第一电阻R1的一端连接;第一电阻R1的另一端、第二极性电容C2的负极、第一二极管D1的正极均接地,第一电压转换芯片U1的型号采用LM25768; It is characterized in that: the 5V power conversion circuit includes a first connector P1, a first polarity capacitor C1, a second polarity capacitor C2, a first diode D1, a first voltage conversion chip U1, a first light-emitting diode D2, a second A resistor R1, a first inductor L1, pin 1 of the voltage conversion chip U1 is connected to pin 2 of the first connector P1, and the anode of the first polarity capacitor C1; pin 2 of the voltage conversion chip U1 is connected to the first diode D1 The cathode of the first inductance L1 is connected with one end of the first inductor L1; the pin 3 and pin 5 of the voltage conversion chip U1 are connected with the negative pole of the first polarity capacitor C1 and the pin 1 of the first connector P1 and are connected to ground; the pin 4 of the voltage conversion chip U1 The pin is connected to the other end of the first inductor L1, the positive pole of the second polarity capacitor C2, and the positive pole of the first light-emitting diode D2 as a 5V voltage output terminal; the negative pole of the first light-emitting diode D2 is connected to one end of the first resistor R1; The other end of the first resistor R1, the negative pole of the second polarity capacitor C2, and the positive pole of the first diode D1 are all grounded, and the model of the first voltage conversion chip U1 is LM25768; 3.3V电源转换电路包括第二电压转换芯片U2、第三极性电容C3、第四电容C4、第五电容C5、第二电感L2,第二电压转换芯片U2的1脚与第三极性电容C3的负极、第四电容C4的一端、第五电容C5的一端连接并接地;第二电压转换芯片U2的2脚与4脚、第三极性电容C3的正极、第四电容C4的另一端、第二电感L2的一端连接;第二电压转换芯片U2的3脚作为5V电压输出端;第二电感L2的另一端与第五电容C5的另一端连接并作为5V电压输出端,第二电压转换芯片U2的型号采用REG1117-3.3; The 3.3V power conversion circuit includes the second voltage conversion chip U2, the third polarity capacitor C3, the fourth capacitor C4, the fifth capacitor C5, the second inductor L2, the pin 1 of the second voltage conversion chip U2 and the third polarity capacitor The negative pole of C3, one end of the fourth capacitor C4, and one end of the fifth capacitor C5 are connected and grounded; pins 2 and 4 of the second voltage conversion chip U2, the positive pole of the third polarity capacitor C3, and the other end of the fourth capacitor C4 1. One end of the second inductance L2 is connected; pin 3 of the second voltage conversion chip U2 is used as a 5V voltage output end; the other end of the second inductance L2 is connected to the other end of the fifth capacitor C5 and used as a 5V voltage output end, the second voltage The model of conversion chip U2 adopts REG1117-3.3; 5V转±12V电路包括第二十一极性电容C21、第二十二极性电容C22、第二十三极性电容C23、第二十四电容C24、第二十五电容C25、电压转换模块U9,电压转换模块U9的1脚与第二十一极性电容C21的正极连接并作为5V电压输出端;电压转换模块U9的2脚接地连接;电压转换模块U9的7脚与第二十二极性电容C22的正极、第二十四电容C24的一端连接并作为+12V电压的输出端;电压转换模块U9的9脚与第二十三极性电容C23的负极、第二十五电容C25的一端连接并作为-12V电压输出端;电压转换模块U9的10脚与第二十三极性电容C23的正极、第二十五电容C25的另一端连接并接地;第二十一极性电容C21的负极、第二十二极性电容C22的负极、第二十四电容C24的另一端均接地; The 5V to ±12V circuit includes the twenty-first polar capacitor C21, the twenty-second polar capacitor C22, the twenty-third polar capacitor C23, the twenty-fourth capacitor C24, the twenty-fifth capacitor C25, and a voltage conversion module U9, pin 1 of the voltage conversion module U9 is connected to the positive pole of the twenty-first polarity capacitor C21 and used as a 5V voltage output terminal; pin 2 of the voltage conversion module U9 is connected to ground; pin 7 of the voltage conversion module U9 is connected to the twenty-second The positive pole of the polarity capacitor C22 and one end of the twenty-fourth capacitor C24 are connected as the output terminal of the +12V voltage; the 9 pin of the voltage conversion module U9 is connected to the negative pole of the twenty-third polarity capacitor C23 and the twenty-fifth capacitor C25 One end of the voltage conversion module U9 is connected to the positive pole of the twenty-third polarity capacitor C23 and the other end of the twenty-fifth capacitor C25 is connected to the ground; the twenty-first polarity capacitor The negative pole of C21, the negative pole of the twenty-second polarity capacitor C22, and the other end of the twenty-fourth capacitor C24 are all grounded; 微处理器电路模块包括微处理器芯片U3,第四发光二极管D4,第五发光二极管D5,第六发光二极管D6,第七发光二级管D7,第六电容C6,第七电容C7,第八电容C8,第九电容C9,第十电容C10,第十一电容C11,第十二电容C12,第十三电容C13,第十四电容C14,第十五电容C15,第十六电容C16,第十七电容C17,第十八电容C18,第十九电容C19,第二十电容C20,第四十二电容C42,第一晶振Y1,第二晶振Y2,第二电阻R2,第三电阻R3,第十一电阻R11,第十二电阻R12,第十三电阻R13,第十四电阻R14,第十五电阻R15,第十六电阻R16,参考电源芯片U4,微处理器芯片U3的1脚与第四发光二极管D4的阴极连接;微处理器芯片U3的2脚与第五发光二极管D5的阴极连接;微处理器芯片U3的3脚与第六发光二极管D6的阴极连接;微处理器芯片U3的4脚与第七发光二级管D7的阴极连接;第四发光二极管D4的阳极与第五发光二极管D5的阳极、第六发光二极管D6的阳极、第七发光二级管D7的阳极连接并作为3.3V电压输出端;微处理器芯片U3的12脚与第一晶振Y1的2端和第六电容C6的一端连接;微处理器芯片U3的13脚与第一晶振Y1的1端和第七电容C7的一端连接;第六电容C6的另一端与第七电容C7的另一端连接并接地;微处理器芯片U3的14脚与第十电容C10的一端和第十一电阻R11的一端连接;第十电容C10的另一端接地;第十一电阻R11的另一端作为3.3V电压输出端;微处理器芯片U3的49脚与第八电容C8的一端连接;第八电容C8的另一端与第九电容C9的一端连接并接地;微处理器芯片U3的73脚与第九电容C9的另一端连接;微处理器芯片U3的94脚与第二电阻R2的一端连接;第二电阻R2的另一端接地;微处理器芯片U3的99脚与第三电阻R3的一端连接;第三电阻R3的另一端接地;微处理器芯片U3的74脚与27脚、10脚、20脚连接并接地;微处理器芯片U3的21脚与第十三电容C13的一端、第十二电阻R12的一端、参考电源芯片U4的阴极连接;第十二电阻R12的另一端作为3.3V电压输出端;第十三电容C13的另一端和参考电源芯片U4的阳极均接地;微处理器芯片U3的22脚与19脚、11脚、28脚、100脚、75脚、50脚连接并作为3.3V电压输出端;微处理器芯片U3的6脚与第四十二电容C42的一端、Bat的1脚连接;Bat的2脚和第四十二电容C42的另一端接地;微处理器芯片U3的9脚与第二晶振Y2的1端、第十二电容C12的一端连接;微处理器芯片U3的8脚与第二晶振Y2的2端、第十一电容C11的一端连接;第十一电容C11的另一端和第十二电容C12的另一端均接地;第十四电容C14的一端与第十五电容C15的一端、第十六电容C16的一端、第十七电容C17的一端、第十八电容C18的一端、第十九电容C19的一端、第二十电容C20的一端连接并作为3.3V电压输出端;第十四电容C14的另一端与第十五电容C15的另一端、第十六电容C16的另一端、第十七电容C17的另一端、第十八电容C18的另一端、第十九电容C19的另一端、第二十电容C20的另一端连接并接地,参考电源芯片U4的型号为LM4040AIM3-2.5;微处理器芯片U3的型号为STM32F207; The microprocessor circuit module includes a microprocessor chip U3, a fourth light-emitting diode D4, a fifth light-emitting diode D5, a sixth light-emitting diode D6, a seventh light-emitting diode D7, a sixth capacitor C6, a seventh capacitor C7, an eighth Capacitor C8, ninth capacitor C9, tenth capacitor C10, eleventh capacitor C11, twelfth capacitor C12, thirteenth capacitor C13, fourteenth capacitor C14, fifteenth capacitor C15, sixteenth capacitor C16, The seventeenth capacitor C17, the eighteenth capacitor C18, the nineteenth capacitor C19, the twentieth capacitor C20, the forty-second capacitor C42, the first crystal oscillator Y1, the second crystal oscillator Y2, the second resistor R2, the third resistor R3, The eleventh resistor R11, the twelfth resistor R12, the thirteenth resistor R13, the fourteenth resistor R14, the fifteenth resistor R15, the sixteenth resistor R16, the reference power chip U4, the pin 1 of the microprocessor chip U3 and The cathode of the fourth light-emitting diode D4 is connected; the 2 pins of the microprocessor chip U3 are connected with the cathode of the fifth light-emitting diode D5; the 3 pins of the microprocessor chip U3 are connected with the cathode of the sixth light-emitting diode D6; the microprocessor chip U3 Pin 4 of the LED is connected to the cathode of the seventh light-emitting diode D7; the anode of the fourth light-emitting diode D4 is connected to the anode of the fifth light-emitting diode D5, the anode of the sixth light-emitting diode D6, and the anode of the seventh light-emitting diode D7. As a 3.3V voltage output terminal; the 12-pin of the microprocessor chip U3 is connected to the 2-terminal of the first crystal oscillator Y1 and one end of the sixth capacitor C6; the 13-pin of the microprocessor chip U3 is connected to the 1-terminal of the first crystal oscillator Y1 and the first terminal of the sixth capacitor C6 One end of the seven capacitor C7 is connected; the other end of the sixth capacitor C6 is connected to the other end of the seventh capacitor C7 and grounded; the pin 14 of the microprocessor chip U3 is connected to one end of the tenth capacitor C10 and one end of the eleventh resistor R11 The other end of the tenth capacitor C10 is grounded; the other end of the eleventh resistor R11 is used as a 3.3V voltage output end; the pin 49 of the microprocessor chip U3 is connected to one end of the eighth capacitor C8; the other end of the eighth capacitor C8 is connected to the One end of the ninth capacitor C9 is connected and grounded; the 73 pin of the microprocessor chip U3 is connected with the other end of the ninth capacitor C9; the 94 pin of the microprocessor chip U3 is connected with one end of the second resistor R2; the second resistor R2 The other end is grounded; pin 99 of the microprocessor chip U3 is connected to one end of the third resistor R3; the other end of the third resistor R3 is grounded; pin 74 of the microprocessor chip U3 is connected to pins 27, 10, and 20 and grounded The pin 21 of the microprocessor chip U3 is connected to one end of the thirteenth capacitor C13, one end of the twelfth resistor R12, and the cathode of the reference power supply chip U4; the other end of the twelfth resistor R12 is used as a 3.3V voltage output terminal; The other end of the thirteen capacitor C13 and the anode of the reference power supply chip U4 are both grounded; the 22 pins of the microprocessor chip U3 are connected with 19 pins, 11 pins, 28 pins, 100 pins, 75 pins, and 50 pins and output as 3.3V voltage End; 6 pins of the microprocessor chip U3 and one end of the forty-second capacitor C42, Bat Pin 1 is connected; pin 2 of Bat and the other end of the forty-second capacitor C42 are grounded; pin 9 of the microprocessor chip U3 is connected to end 1 of the second crystal oscillator Y2 and one end of the twelfth capacitor C12; the microprocessor chip Pin 8 of U3 is connected to 2 ends of the second crystal oscillator Y2 and one end of the eleventh capacitor C11; the other end of the eleventh capacitor C11 and the other end of the twelfth capacitor C12 are grounded; one end of the fourteenth capacitor C14 is connected to One end of the fifteenth capacitor C15, one end of the sixteenth capacitor C16, one end of the seventeenth capacitor C17, one end of the eighteenth capacitor C18, one end of the nineteenth capacitor C19, and one end of the twentieth capacitor C20 are connected and used as 3.3V voltage output terminal; the other end of the fourteenth capacitor C14 and the other end of the fifteenth capacitor C15, the other end of the sixteenth capacitor C16, the other end of the seventeenth capacitor C17, and the other end of the eighteenth capacitor C18 1. The other end of the nineteenth capacitor C19 and the other end of the twentieth capacitor C20 are connected and grounded. The model of the reference power supply chip U4 is LM4040AIM3-2.5; the model of the microprocessor chip U3 is STM32F207; 倾角传感器单元电路包括倾角传感器U13,第二十七电容C27,第四十电容C40,第四十一电容C41,第一运算放大器U11,第二运算放大器U12,第十七电阻R17,第十八电阻R18,第十九电阻R19,第二十电阻R20,倾角传感器U13的5脚与第二运算放大器U12的3脚连接;第二运算放大器U12的2脚与1脚、第十九电阻R19的一端连接;第二运算放大器U12的4脚接地;第二运算放大器U12的8脚与第四十电容C40的一端连接并作为5V电压输出端;第二运算放大器U12的5脚与第十九电阻R19的另一端、第二十电阻R20的一端连接;第二运算放大器U12的6脚与7脚、微处理器芯片U3的34脚连接;第二十电阻R20的另一端、第四十电容C40的另一端均接地;倾角传感器U13的6脚接地;倾角传感器U13的11脚与第一运算放大器U11的3脚连接;第一运算放大器U11的2脚与1脚、第十七电阻R17的一端连接;第一运算放大器U11的4脚接地;第一运算放大器U11的8脚与第二十七电容C27的一端连接并作为5V电压输出端;第一运算放大器U11的5脚与第十七电阻R17的另一端、第十八电阻R18的一端连接;第一运算放大器U11的6脚与7脚、微处理器芯片U3的35脚连接;第十八电阻R18的另一端和第二十七电容C27的另一端均接地;第一运算放大器U11的12脚与第四十一电容C41的一端连接;第四十一电容C41的另一端接地;第一运算放大器U11的其余脚架空,第一运算放大器U11的型号为SCA100T; The inclination sensor unit circuit includes the inclination sensor U13, the twenty-seventh capacitor C27, the fortieth capacitor C40, the forty-first capacitor C41, the first operational amplifier U11, the second operational amplifier U12, the seventeenth resistor R17, the eighteenth Resistor R18, nineteenth resistor R19, twentieth resistor R20, pin 5 of the inclination sensor U13 is connected to pin 3 of the second operational amplifier U12; pin 2 of the second operational amplifier U12 is connected to pin 1, and pin 1 of the nineteenth resistor R19 One end is connected; pin 4 of the second operational amplifier U12 is grounded; pin 8 of the second operational amplifier U12 is connected to one end of the fortieth capacitor C40 and used as a 5V voltage output terminal; pin 5 of the second operational amplifier U12 is connected to the nineteenth resistor The other end of R19 is connected to one end of the twentieth resistor R20; the 6 pins of the second operational amplifier U12 are connected to the 7 pins and the 34 pins of the microprocessor chip U3; the other end of the twentieth resistor R20 is connected to the fortieth capacitor C40 The other ends of both are grounded; the 6-pin of the inclination sensor U13 is grounded; the 11-pin of the inclination sensor U13 is connected to the 3-pin of the first operational amplifier U11; the 2-pin and 1-pin of the first operational amplifier U11, and one end of the seventeenth resistor R17 Connection; pin 4 of the first operational amplifier U11 is grounded; pin 8 of the first operational amplifier U11 is connected to one end of the twenty-seventh capacitor C27 and used as a 5V voltage output terminal; pin 5 of the first operational amplifier U11 is connected to the seventeenth resistor The other end of R17 is connected with one end of the eighteenth resistor R18; the pin 6 of the first operational amplifier U11 is connected with pin 7 and pin 35 of the microprocessor chip U3; the other end of the eighteenth resistor R18 is connected with the twenty-seventh capacitor The other ends of C27 are all grounded; the 12 pins of the first operational amplifier U11 are connected to one end of the forty-first capacitor C41; the other end of the forty-first capacitor C41 is grounded; The model of amplifier U11 is SCA100T; 模拟信号复用调理电路单元包括第十接插件P10,第二十六电容C26,第三十八电容C38,第三十九电容C39,第三二极管D3,模拟开关芯片U8,运算放大器芯片U10,第二十一电阻R21,第二十二电阻R22,模拟开关芯片U8的3脚与第三十八电容C38的一端连接并作为-12V电压输出端;第三十八电容C38的另一端接地;模拟开关芯片U8的9脚与第十接插件P10的1脚连接;模拟开关芯片U8的10脚与第十接插件P10的3脚连接;模拟开关芯片U8的11脚与第十接插件P10的5脚连接;模拟开关芯片U8的12脚与第十接插件P10的7脚连接;模拟开关芯片U8的7脚与第十接插件P10的9脚连接;模拟开关芯片U8的6脚与第十接插件P10的11脚连接;模拟开关芯片U8的5脚与第十接插件P10的13脚连接;模拟开关芯片U8的4脚与第十接插件P10的15脚连接;模拟开关芯片U8的13脚与第三十九电容C39的一端连接并作为+12V电压输出端;第三十九电容C39的另一端接地;模拟开关芯片U8的2脚与微处理器芯片U3的29脚连接;模拟开关芯片U8的15脚与微处理器芯片U3的32脚连接;模拟开关芯片U8的16脚与微处理器芯片U3的31脚连接;模拟开关芯片U8的1脚与微处理器芯片U3的30脚连接;模拟开关芯片U8的8脚与第三二极管D3的阴极、运算放大器芯片U10的3脚连接;第三二极管D3的阳极接地;运算放大器芯片U10的2脚与1脚、第二十一电阻R21的一端连接;运算放大器芯片U10的4脚接地;运算放大器芯片U10的8脚与第二十六电容C26的一端连接并作为5V电压输出端;第二十六电容C26的另一端接地;模拟开关芯片U8的14脚接地;第二十一电阻R21的另一端与第二十二电阻R22的一端、运算放大器芯片U10的5脚连接;第二十二电阻R22的另一端接地;运算放大器芯片U10的6脚与7脚、微处理器芯片U3的33脚连接;第十接插件P10的2脚与4脚、6脚、8脚、10脚、12脚、14脚、16脚连接并接地,模拟开关芯片U8的型号为MAX308CSE; The analog signal multiplexing and conditioning circuit unit includes a tenth connector P10, a twenty-sixth capacitor C26, a thirty-eighth capacitor C38, a thirty-ninth capacitor C39, a third diode D3, an analog switch chip U8, and an operational amplifier chip U10, the twenty-first resistor R21, the twenty-second resistor R22, the pin 3 of the analog switch chip U8 is connected to one end of the thirty-eighth capacitor C38 and used as a -12V voltage output end; the other end of the thirty-eighth capacitor C38 Grounding; pin 9 of the analog switch chip U8 is connected to pin 1 of the tenth connector P10; pin 10 of the analog switch chip U8 is connected to pin 3 of the tenth connector P10; pin 11 of the analog switch chip U8 is connected to the tenth connector The 5 pins of P10 are connected; the 12 pins of the analog switch chip U8 are connected with the 7 pins of the tenth connector P10; the 7 pins of the analog switch chip U8 are connected with the 9 pins of the tenth connector P10; the 6 pins of the analog switch chip U8 are connected with The 11th pin of the tenth connector P10 is connected; the 5th pin of the analog switch chip U8 is connected with the 13th pin of the tenth connector P10; the 4th pin of the analog switch chip U8 is connected with the 15th pin of the tenth connector P10; the analog switch chip U8 Pin 13 of the 39th capacitor C39 is connected to one end of the +12V voltage output; the other end of the 39th capacitor C39 is grounded; pin 2 of the analog switch chip U8 is connected to the 29th pin of the microprocessor chip U3; Pin 15 of the analog switch chip U8 is connected to pin 32 of the microprocessor chip U3; pin 16 of the analog switch chip U8 is connected to pin 31 of the microprocessor chip U3; pin 1 of the analog switch chip U8 is connected to pin 3 of the microprocessor chip U3 30-pin connection; the 8-pin of the analog switch chip U8 is connected to the cathode of the third diode D3 and the 3-pin of the operational amplifier chip U10; the anode of the third diode D3 is grounded; the 2-pin and 1-pin of the operational amplifier chip U10 1. One end of the twenty-first resistor R21 is connected; pin 4 of the operational amplifier chip U10 is grounded; pin 8 of the operational amplifier chip U10 is connected to one end of the twenty-sixth capacitor C26 and used as a 5V voltage output terminal; the twenty-sixth capacitor C26 The other end of the analog switch chip U8 is grounded; the other end of the twenty-first resistor R21 is connected to one end of the twenty-second resistor R22 and the 5 pin of the operational amplifier chip U10; the other end of the twenty-second resistor R22 One end is grounded; the 6-pin and 7-pin of the operational amplifier chip U10 are connected, and the 33-pin of the microprocessor chip U3; the 2-pin and 4-pin, 6-pin, 8-pin, 10-pin, 12-pin, 14-pin of the tenth connector P10 , 16-pin connection and grounding, the model of the analog switch chip U8 is MAX308CSE; SD卡存贮电路单元包括第四十三电容C43,第二十五电阻R25,第二十六电阻R26,第二十七电阻R27,第二十八电阻R28,第二十九电阻R29,第三十电阻R30,SD卡插座U7,SD卡插座U7的1脚与第三十电阻R30的一端、微处理器芯片U3的78脚连接;SD卡插座U7的2脚与第二十九电阻R29的一端、微处理器芯片U3的79脚连接;SD卡插座U7的3脚与第二十八电阻R28的一端、微处理器芯片U3的83脚连接;SD卡插座U7的4脚与第四十三电容C43的一端连接;第四十三电容C43的另一端接地;SD卡插座U7的5脚与第二十五电阻R25的一端、微处理器芯片U3的80脚连接;SD卡插座U7的6脚接地;SD卡插座U7的7脚与第二十六电阻R26的一端、微处理器芯片U3的65脚连接;SD卡插座U7的8脚与第二十七电阻R27的一端、微处理器芯片U3的66脚连接;SD卡插座U7的9脚接地;第二十五电阻R25的另一端与第二十六电阻R26的另一端、第二十七电阻R27的另一端连接并作为3.3V电压输出端,SD卡插座U7的型号为MicroSD; The SD card storage circuit unit includes a forty-third capacitor C43, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twenty-eighth resistor R28, a twenty-ninth resistor R29, a Thirty resistor R30, SD card socket U7, 1 pin of SD card socket U7 is connected with one end of the 30th resistor R30 and 78 pins of the microprocessor chip U3; 2 pins of SD card socket U7 are connected with the 29th resistor R29 One end of the microprocessor chip U3 is connected to pin 79; pin 3 of the SD card socket U7 is connected to one end of the twenty-eighth resistor R28 and pin 83 of the microprocessor chip U3; pin 4 of the SD card socket U7 is connected to the fourth One end of the thirteenth capacitor C43 is connected; the other end of the forty-third capacitor C43 is grounded; pin 5 of the SD card socket U7 is connected to one end of the twenty-fifth resistor R25 and pin 80 of the microprocessor chip U3; SD card socket U7 The 6-pin grounding of the SD card socket U7 is connected with one end of the twenty-sixth resistor R26 and the 65-pin of the microprocessor chip U3; the 8-pin of the SD card socket U7 is connected with one end of the twenty-seventh resistor R27, the micro The 66 pins of the processor chip U3 are connected; the 9 pins of the SD card socket U7 are grounded; the other end of the twenty-fifth resistor R25 is connected with the other end of the twenty-sixth resistor R26 and the other end of the twenty-seventh resistor R27 as 3.3V voltage output terminal, the model of SD card socket U7 is MicroSD; UART接口电路单元包括第二十八电容C28,第二十九电容C29,第三十电容C30,第三十一电容C31,第三十二电容C32,第三十三电容C33,第三十四电容C34,第三十五电容C35,第三十六电容C36,第三十七电容C37,第一UART电平转换芯片U5,第二UART电平转换芯片U6,第三接插件P3,第四接插件P4,第五接插件P5,第一UART电平转换芯片U5的1脚与第二十八电容C28的一端连接;第一UART电平转换芯片U5的3脚与第二十八电容C28的另一端连接;第一UART电平转换芯片U5的4脚与第二十九电容C29的一端连接;第一UART电平转换芯片U5的5脚与第二十九电容C29的一端连接;第一UART电平转换芯片U5的11脚与微处理器芯片U3的23脚连接;第一UART电平转换芯片U5的10脚与微处理器芯片U3的25脚连接;第一UART电平转换芯片U5的12脚与微处理器芯片U3的24脚连接;第一UART电平转换芯片U5的9脚与微处理器芯片U3的26脚连接;第一UART电平转换芯片U5的16脚与第三十一电容C31的一端连接并作为3.3V电压输出端;第一UART电平转换芯片U5的2脚与第三十电容C30的一端连接;第三十电容C30的另一端与第三十一电容C31的另一端连接并接地;第一UART电平转换芯片U5的14脚与第四接插件P4的2脚连接;第一UART电平转换芯片U5的7脚与第四接插件P4的6脚连接;第一UART电平转换芯片U5的13脚与第四接插件P4的1脚连接;第一UART电平转换芯片U5的8脚与第四接插件P4的5脚连接;第一UART电平转换芯片U5的6脚与第三十二电容C32的一端连接;第三十二电容C32的另一端、第一UART电平转换芯片U5的15脚、第四接插件P4的剩余脚均接地;第二UART电平转换芯片U6的1脚与第三十三电容C33的一端连接;第二UART电平转换芯片U6的3脚与第三十三电容C33的另一端连接;第二UART电平转换芯片U6的4脚与第三十四电容C34的一端连接;第二UART电平转换芯片U6的5脚与第三十四电容C34的另一端连接;第二UART电平转换芯片U6的11脚与微处理器芯片U3的55脚连接;第二UART电平转换芯片U6的10脚与微处理器芯片U3的63脚连接;第二UART电平转换芯片U6的12脚与微处理器芯片U3的56脚连接;第二UART电平转换芯片U6的9脚与微处理器芯片U3的64脚连接;第二UART电平转换芯片U6的16脚与第三十六电容C36的一端连接并作为3.3V电压输出端;第二UART电平转换芯片U6的2脚与第三十五电容C35的一端连接;第三十五电容C35的另一端与第三十六电容C36的另一端连接并接地;第二UART电平转换芯片U6的14脚与第五接插件P5的5脚连接;第二UART电平转换芯片U6的7脚与第五接插件P5的1脚连接;第二UART电平转换芯片U6的13脚与第五接插件P5的6脚连接;第二UART电平转换芯片U6的8脚与第五接插件P5的2脚连接;第二UART电平转换芯片U6的6脚与第三十七电容C37的一端连接;第三十七电容C37的另一端、第二UART电平转换芯片U6的15脚、第五接插件P5的剩余脚均接地;第三接插件P3的1脚与微处理器芯片U3的93脚连接;第三接插件P3的2脚与微处理器芯片U3的92脚连接;第三接插件P3的3脚接地,第一UART电平转换芯片U5的型号为MAX3232CSE,第二UART电平转换芯片U6的型号为MAX3232CSE; The UART interface circuit unit includes the twenty-eighth capacitor C28, the twenty-ninth capacitor C29, the thirtieth capacitor C30, the thirty-first capacitor C31, the thirty-second capacitor C32, the thirty-third capacitor C33, the thirty-fourth capacitor Capacitor C34, thirty-fifth capacitor C35, thirty-sixth capacitor C36, thirty-seventh capacitor C37, first UART level conversion chip U5, second UART level conversion chip U6, third connector P3, fourth Connector P4, fifth connector P5, pin 1 of the first UART level conversion chip U5 is connected to one end of the twenty-eighth capacitor C28; pin 3 of the first UART level conversion chip U5 is connected to the twenty-eighth capacitor C28 The other end of the first UART level shifting chip U5 is connected to one end of the twenty-ninth capacitor C29; the fifth pin of the first UART level shifting chip U5 is connected to one end of the twenty-ninth capacitor C29; The 11 pins of a UART level conversion chip U5 are connected with the 23 pins of the microprocessor chip U3; the 10 pins of the first UART level conversion chip U5 are connected with the 25 pins of the microprocessor chip U3; the first UART level conversion chip The 12 pins of U5 are connected with the 24 pins of the microprocessor chip U3; the 9 pins of the first UART level conversion chip U5 are connected with the 26 pins of the microprocessor chip U3; the 16 pins of the first UART level conversion chip U5 are connected with the first UART level conversion chip U5 One end of the thirty-first capacitor C31 is connected as a 3.3V voltage output terminal; pin 2 of the first UART level conversion chip U5 is connected to one end of the thirtieth capacitor C30; the other end of the thirtieth capacitor C30 is connected to the thirty-first capacitor C30 The other end of the capacitor C31 is connected to ground; pin 14 of the first UART level conversion chip U5 is connected to pin 2 of the fourth connector P4; pin 7 of the first UART level conversion chip U5 is connected to pin 6 of the fourth connector P4 Pin connection; 13 pins of the first UART level conversion chip U5 are connected to 1 pin of the fourth connector P4; 8 pins of the first UART level conversion chip U5 are connected to 5 pins of the fourth connector P4; the first UART Pin 6 of the level conversion chip U5 is connected to one end of the thirty-second capacitor C32; the other end of the thirty-second capacitor C32, pin 15 of the first UART level conversion chip U5, and the remaining pins of the fourth connector P4 are all grounding; pin 1 of the second UART level conversion chip U6 is connected to one end of the thirty-third capacitor C33; pin 3 of the second UART level conversion chip U6 is connected to the other end of the thirty-third capacitor C33; the second UART Pin 4 of the level shifting chip U6 is connected to one end of the thirty-fourth capacitor C34; pin 5 of the second UART level shifting chip U6 is connected to the other end of the thirty-fourth capacitor C34; the second UART level shifting chip U6 The 11 pins of the second UART level conversion chip U6 are connected to the 55 pins of the microprocessor chip U3; the 10 pins of the second UART level conversion chip U6 are connected to the 63 pins of the microprocessor chip U3; The 56-pin connection of the device chip U3; the second UART level conversion chip U6 The 9 pins of the microprocessor chip U3 are connected with the 64 pins of the microprocessor chip; the 16 pins of the second UART level conversion chip U6 are connected with one end of the thirty-sixth capacitor C36 and used as the 3.3V voltage output terminal; the second UART level conversion chip Pin 2 of U6 is connected to one end of the thirty-fifth capacitor C35; the other end of the thirty-fifth capacitor C35 is connected to the other end of the thirty-sixth capacitor C36 and grounded; pin 14 of the second UART level conversion chip U6 is connected to The 5 pins of the fifth connector P5 are connected; the 7 pins of the second UART level conversion chip U6 are connected with the 1 pins of the fifth connector P5; the 13 pins of the second UART level conversion chip U6 are connected with the fifth connector P5 6 pin connection; 8 pins of the second UART level conversion chip U6 are connected with 2 pins of the fifth connector P5; 6 pins of the second UART level conversion chip U6 are connected with one end of the thirty-seventh capacitor C37; the third The other end of the seventeenth capacitor C37, the 15th pin of the second UART level conversion chip U6, and the remaining pins of the fifth connector P5 are all grounded; the 1st pin of the third connector P3 is connected to the 93rd pin of the microprocessor chip U3; Pin 2 of the third connector P3 is connected to pin 92 of the microprocessor chip U3; pin 3 of the third connector P3 is grounded, the model of the first UART level conversion chip U5 is MAX3232CSE, and the second UART level conversion chip U6 The model is MAX3232CSE; JLINK调试电路单元包括第四电阻R4,第五电阻R5,第六电阻R6,第七电阻R7,第八电阻R8,第九电阻R9,第十电阻R10,第二接插件P2,第二接插件P2的1脚和2脚均作为3.3V电压输出端;第二接插件P2的3脚与微处理器芯片U3的90脚、第七电阻R7的一端连接;第二接插件P2的5脚与微处理器芯片U3的77脚、第六电阻R6的一端连接;第二接插件P2的7脚与微处理器芯片U3的72脚、第五电阻R5的一端连接;第二接插件P2的9脚与微处理器芯片U3的76脚、第八电阻R8的一端连接;第二接插件P2的13脚与微处理器芯片U3的89脚、第四电阻R4的一端连接;第二接插件P2的15脚为复位脚;第二接插件P2的17脚与第九电阻R9的一端连接;第二接插件P2的19脚与第十电阻R10的一端连接;第四电阻R4的另一端与第五电阻R5的另一端、第六电阻R6的另一端、第七电阻R7的另一端连接并作为3.3V电压输出端;第八电阻R8的另一端与第九电阻R9的另一端、第十电阻R10的另一端连接并接地;第二接插件P2的4脚与6脚、8脚、10脚、12脚、14脚、16脚、18脚、20脚连接并接地;第二接插件P2的11脚架空; JLINK debugging circuit unit includes fourth resistor R4, fifth resistor R5, sixth resistor R6, seventh resistor R7, eighth resistor R8, ninth resistor R9, tenth resistor R10, second connector P2, second connector Pin 1 and pin 2 of P2 are both used as 3.3V voltage output terminals; pin 3 of the second connector P2 is connected to pin 90 of the microprocessor chip U3 and one end of the seventh resistor R7; pin 5 of the second connector P2 is connected to The 77 pins of the microprocessor chip U3 and one end of the sixth resistor R6 are connected; the 7 pins of the second connector P2 are connected with the 72 pins of the microprocessor chip U3 and one end of the fifth resistor R5; the 9 pins of the second connector P2 The pin is connected with the 76 pin of the microprocessor chip U3 and one end of the eighth resistor R8; the 13 pin of the second connector P2 is connected with the 89 pin of the microprocessor chip U3 and one end of the fourth resistor R4; the second connector P2 Pin 15 of the second connector P2 is the reset pin; pin 17 of the second connector P2 is connected to one end of the ninth resistor R9; pin 19 of the second connector P2 is connected to one end of the tenth resistor R10; the other end of the fourth resistor R4 is connected to the end of the ninth resistor R9 The other end of the fifth resistor R5, the other end of the sixth resistor R6, and the other end of the seventh resistor R7 are connected as a 3.3V voltage output end; the other end of the eighth resistor R8 is connected to the other end of the ninth resistor R9, and the other end of the tenth resistor The other end of R10 is connected and grounded; the 4 pins of the second connector P2 are connected and grounded with 6 pins, 8 pins, 10 pins, 12 pins, 14 pins, 16 pins, 18 pins and 20 pins; the second connector P2 11 feet overhead; 微处理器芯片U3的剩余引脚均架空。 The remaining pins of the microprocessor chip U3 are all overhead.
CN201210574464.4A 2012-12-25 2012-12-25 A kind of underwater observation network control circuit Expired - Fee Related CN103150878B (en)

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CN105890574A (en) * 2016-04-22 2016-08-24 上海工程技术大学 Tilt sensor circuit for foundation pit inclinometer system
CN106483558A (en) * 2016-12-02 2017-03-08 杭州智磁传感器有限公司 The surveying record circuit that a kind of submarine earthquake detects
CN107102584A (en) * 2017-04-24 2017-08-29 杭州电子科技大学 A kind of superfine particulate matter and VOCs field monitoring node
CN108810743A (en) * 2018-08-17 2018-11-13 江苏恒创软件有限公司 Audio collection circuit for equipment operational diagnostics instrument
CN119829517A (en) * 2025-01-10 2025-04-15 广东工业大学 Unmanned aerial vehicle integrated hardware system based on RK3588 chip

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CN102802279A (en) * 2012-07-30 2012-11-28 杭州电子科技大学 Over-distance wireless sensor network circuit receiving terminal
CN202976444U (en) * 2012-12-25 2013-06-05 杭州电子科技大学 Underwater observation network control circuit

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CN101620771A (en) * 2009-07-29 2010-01-06 山东建筑大学 Remote wireless environment real-time data acquisition method and device
CN102394674A (en) * 2011-10-17 2012-03-28 杭州鸥信电子科技有限公司 Underwater data transmitting and receiving device based on plastically wrapped chain inductive coupling
CN102420871A (en) * 2011-12-02 2012-04-18 杭州电子科技大学 Network data acquirer
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Publication number Priority date Publication date Assignee Title
CN105890574A (en) * 2016-04-22 2016-08-24 上海工程技术大学 Tilt sensor circuit for foundation pit inclinometer system
CN106483558A (en) * 2016-12-02 2017-03-08 杭州智磁传感器有限公司 The surveying record circuit that a kind of submarine earthquake detects
CN107102584A (en) * 2017-04-24 2017-08-29 杭州电子科技大学 A kind of superfine particulate matter and VOCs field monitoring node
CN108810743A (en) * 2018-08-17 2018-11-13 江苏恒创软件有限公司 Audio collection circuit for equipment operational diagnostics instrument
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