CN103023363A - Five-level inverter - Google Patents
Five-level inverter Download PDFInfo
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- CN103023363A CN103023363A CN2012104854967A CN201210485496A CN103023363A CN 103023363 A CN103023363 A CN 103023363A CN 2012104854967 A CN2012104854967 A CN 2012104854967A CN 201210485496 A CN201210485496 A CN 201210485496A CN 103023363 A CN103023363 A CN 103023363A
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- switching tube
- diode
- branch road
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0095—Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
Abstract
The embodiment of the invention discloses a five-level inverter which comprises a positive Boost circuit, a negative Boost circuit and an inversion circuit, wherein the inversion circuit comprises a pair of input branches, a pair of positive afterflow branches and a pair of inversion vertical bridge arm positive input branches; a seventh switch tube is stridden between any two branches of positive input branches, the positive afterflow branches and the inversion vertical bridge arm positive input branches, and an eighth switch tube is stridden between any two branches of negative input branches, negative afterflow branches and inversion vertical bridge arm negative input branches; and at least one branch of two branches stridden on the seventh switch tube and any branch of the two branch stridden on the eighth switch tube does not belong to the same pair of branches, and the same pair of branches is any pair of input branches, afterflow branches as well as inversion vertical bridge arm input branches. By adopting the embodiment of the invention, switching loss of a power device and onstate loss of a main power device are effectively reduced, and the efficiency of a system is improved.
Description
Technical field
The present invention relates to electric and electronic technical field, particularly relate to a kind of five-electrical level inverter.
Background technology
Inverter (Inverter) is transformed into alternating current to direct current energy.The application of inverter is very extensive.In existing various power supplys, solar cell, storage battery, dry cell etc. all are DC power supply, when these power supplys of needs are powered to AC load, just need inverter circuit.In addition, ac motor speed control uses very extensive with power electronic equipments such as frequency converter, uninterrupted power supply, induction heating powers, and the core of its circuit all is inverter circuit.
If the inverter output end phase voltage has two kinds of level, sort circuit is called the two-level inversion device.If the inverter output end phase voltage has two or more level, sort circuit is called multi-electrical level inverter.Multi-electrical level inverter can carry higher voltage, and the waveform of output plurality of level approaches sinusoidal wave more.
Traditional five-electrical level inverter as shown in Figure 1.This inverter is made of Boost booster circuit and inverter circuit.Wherein, the Boost circuit is used for promoting DC input voitage; It is alternating voltage that inverter circuit is used for DC B US voltage transitions, then offers load or electrical network.
In the five-electrical level inverter of prior art, the switching loss of power device is larger; Simultaneously, the on-state loss of master power switch pipe is larger when input direct voltage is higher, has limited to a certain extent the further raising of system effectiveness.
Summary of the invention
The invention provides a kind of five-electrical level inverter, can effectively reduce the switching loss of power device and the on-state loss of main power device, be conducive to improve system effectiveness.
On the one hand, provide a kind of five-electrical level inverter, having comprised: positive Boost booster circuit, negative Boost booster circuit and inverter circuit; Described inverter circuit comprises: a pair of input branch road that the first diode, the first switching tube, second switch pipe, the second diode are followed in series to form; Wherein, described the first diode and the first switching tube consist of the positive input branch road, and described second switch pipe and the second diode consist of the negative input branch road; The a pair of afterflow branch road that the 3rd diode, the 3rd switching tube, the 4th switching tube, the 4th diode are followed in series to form; Wherein, described the 3rd diode and the 3rd switching tube consist of positive afterflow branch road, and described the 4th switching tube and the 4th diode consist of negative afterflow branch road; The perpendicular brachium pontis input of a pair of inversion that the 5th switching tube and the 6th switching tube are followed in series to form branch road; Wherein, described the 5th switching tube consists of the perpendicular brachium pontis positive input branch road of inversion, and described the 6th switching tube consists of the perpendicular brachium pontis negative input branch road of inversion; Described inverter circuit also comprises: the 7th switching tube and the 8th switching tube; Described the 7th switching tube is connected across in the perpendicular brachium pontis positive input branch road of described positive input branch road, positive afterflow branch road and inversion between any two branch roads; Described the 8th switching tube is connected across in the perpendicular brachium pontis negative input branch road of described negative input branch road, negative afterflow branch road and inversion between any two branch roads; And any one branch road at least one branch road in two branch roads of described the 7th switching tube cross-over connection and two branch roads of the 8th switching tube cross-over connection does not belong to a pair of branch road, and described is arbitrary right in the perpendicular brachium pontis input of described input branch road, afterflow branch road and the inversion branch road with a pair of branch road.
In the possible implementation of the first, the anode of described the first diode connects positive source, and the negative electrode of described the first diode connects the first end of described the first switching tube; The first end of the described second switch pipe of the second termination of described the first switching tube; The anode of described second diode of the second termination of described second switch pipe; The negative electrode of described the second diode connects the negative pole of described power supply; The plus earth of described the 3rd diode, the negative electrode of described the 3rd diode connects the first end of described the 3rd switching tube; The first end of described the 4th switching tube of the second termination of described the 3rd switching tube; The anode of described the 4th diode of the second termination of described the 4th switching tube; The minus earth of described the 4th diode; The positive Boost voltage input end of first end conduct of described the 5th switching tube connects the output of described positive Boost booster circuit, the first end of described the 6th switching tube of the second termination of described the 5th switching tube; The second end of described the 6th switching tube connects the output of described negative Boost booster circuit as negative Boost voltage input end; The common port of the common port of the common port of described the first switching tube and described second switch pipe, described the 3rd switching tube and described the 4th switching tube, described the 5th switching tube and described the 6th switching tube is the output mid point of described inverter circuit.
In conjunction with the possible implementation of the first, in the third possible implementation, described the 7th switching tube is connected across between described positive input branch road and the positive afterflow branch road; Described the 8th switching tube is connected across between described negative afterflow branch road and the perpendicular brachium pontis negative input branch road of inversion.
In conjunction with the third possible implementation, in the 4th kind of possible implementation, the first end of described first switching tube of the first termination of described the 7th switching tube, the first end of described the 3rd switching tube of the second termination of described the 7th switching tube; The second end of described the 4th switching tube of the first termination of described the 8th switch, the second end of described the 6th switching tube of the second termination of described the 8th switching tube.
In conjunction with the possible implementation of the first, in the 5th kind of possible implementation, described the 7th switching tube is connected across between described positive input branch road and the perpendicular brachium pontis positive input branch road of inversion; Described the 8th switching tube is connected across between described negative input branch road and the negative afterflow branch road.
In conjunction with the 5th kind of possible implementation, in the 6th kind of possible implementation, the first end of described the 5th switching tube of the first termination of described the 7th switching tube, the first end of described first switching tube of the second termination of described the 7th switching tube; The second end of described the 4th switching tube of the first termination of described the 8th switching tube, the second end of the described second switch pipe of the second termination of described the 8th switching tube.
In conjunction with the possible implementation of the first, in the 7th kind of possible implementation, described the 7th switching tube is connected across between described positive afterflow branch road and the perpendicular brachium pontis positive input branch road of inversion; Described the 8th switching tube is connected across between described negative input branch road and the negative afterflow branch road.
In conjunction with the 7th kind of possible implementation, in the 8th kind of possible implementation, the first end of described the 5th switching tube of the first termination of described the 7th switching tube, the first end of described the 3rd switching tube of the second termination of described the 7th switching tube; The second end of described the 4th switching tube of the first termination of described the 8th switching tube, the second end of the described second switch pipe of the second termination of described the 8th switching tube.
In conjunction with above-mentioned any possible implementation, in the 9th kind of possible implementation, described positive Boost booster circuit comprises: the 9th switching tube, the first electric capacity, the 3rd electric capacity, the first inductance, the 5th diode, the 7th diode; Described negative Boost booster circuit comprises: the tenth switching tube, the second electric capacity, the 4th electric capacity, the second inductance, the 6th diode, the 8th diode; Wherein, an end of described the first electric capacity links to each other as the input of described positive Boost booster circuit with an end of the first inductance, connects the positive pole of described power supply; One end of described second electric capacity of another termination of described the first electric capacity; One end of the other end of described the second electric capacity and the second inductance links to each other as the input of described negative Boost booster circuit, connects the negative pole of described power supply; The first end of described the 9th switching tube of another termination of described the first inductance and the anode of the 5th diode; The first end of described the tenth switching tube of the second termination of described the 9th switching tube; The other end of described second inductance of the second termination of described the tenth switching tube and the negative electrode of the 6th diode; The negative electrode of described the 5th diode connects an end of described the 3rd electric capacity as the output of described positive Boost booster circuit; One end of described the 4th electric capacity of another termination of described the 3rd electric capacity; The anode of described the 6th diode of another termination of described the 4th electric capacity; The anode of described the 6th diode is as the output of described negative Boost booster circuit; The common end grounding of the common port of the common port of described the 9th switching tube and the tenth switching tube, described the first electric capacity and the second electric capacity, described the 3rd electric capacity and the 4th electric capacity; Described the 7th diode is as the bypass diode of described positive Boost booster circuit, and anode connects the input of described positive Boost booster circuit, and negative electrode connects the output of described positive Boost booster circuit; Described the 8th diode is as the bypass diode of described negative Boost booster circuit, and negative electrode connects the input of described negative Boost booster circuit, and anode connects the output of described negative Boost booster circuit; Described five-electrical level inverter also comprises: the first power relay, the second power relay, the 3rd power relay and the 4th power relay; Described the first power relay is in parallel with the bypass diode of described positive Boost booster circuit; Described the second power relay is in parallel with the bypass diode of described negative Boost booster circuit; Described the 3rd power relay is with described the first diodes in parallel or connect; Described the 4th power relay is with described the second diodes in parallel or connect.
In conjunction with above-mentioned any possible implementation, in the tenth kind of possible implementation, described the first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube, the 6th switching tube are insulated gate bipolar transistor IGBT; Described the 7th switching tube and the 8th switching tube are metal-oxide half field effect transistor MOSFET.
In conjunction with the tenth kind of possible implementation, in the 11 kind of possible implementation, described IGBT comprises a triode and a diode; The collector electrode of described triode and the negative electrode of described diode join, and consist of the first end of described IGBT; The emitter of described triode and the anode of described diode join, and consist of the second end of described IGBT; Described MOSFET comprises that a metal-oxide-semiconductor and a diode consist of.
In conjunction with the tenth kind and the 11 kind of possible implementation, in the 12 kind of possible possible implementation, the source electrode of described metal-oxide-semiconductor and the negative electrode of described diode join, and consist of the first end of described MOSFET; The drain electrode of described metal-oxide-semiconductor and the anode of described diode join, and consist of the second end of described MOSFET.
Compared with prior art, in the described five-electrical level inverter of the embodiment of the invention, by at described positive input branch road, cross-over connection the 7th switching tube between any two branch roads in the perpendicular brachium pontis positive input branch road of positive afterflow branch road and inversion, simultaneously at described negative input branch road, cross-over connection the 8th switching tube between any two branch roads in the perpendicular brachium pontis negative input branch road of negative afterflow branch road and inversion, and any one branch road at least one branch road in two branch roads of described the 7th switching tube cross-over connection and two branch roads of the 8th switching tube cross-over connection does not belong to a pair of branch road, and described is described input branch road with a pair of branch road, arbitrary right in the perpendicular brachium pontis input of afterflow branch road and the inversion branch road.Broken thus the symmetrical structure of traditional five-electrical level inverter, this structure can effectively reduce the switching loss of power device and the on-state loss of main power device, is conducive to improve system effectiveness.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use among the embodiment, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is traditional five-electrical level inverter circuit diagram;
The five-electrical level inverter circuit diagram that Fig. 2 provides for the embodiment of the invention one;
The five-electrical level inverter circuit diagram that Fig. 3 provides for the embodiment of the invention two;
The five-electrical level inverter circuit diagram that Fig. 4 provides for the embodiment of the invention three;
The five-electrical level inverter circuit diagram that Fig. 5 provides for the embodiment of the invention four;
The five-electrical level inverter circuit diagram that Fig. 6 provides for the embodiment of the invention five;
The five-electrical level inverter circuit diagram that Fig. 7 provides for the embodiment of the invention six;
The five-electrical level inverter circuit diagram that Fig. 8 provides for the embodiment of the invention seven.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is carried out clear, complete description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
A kind of five-electrical level inverter is provided in the embodiment of the invention, can have effectively reduced the switching loss of power device and the on-state loss of main power device, be conducive to improve system effectiveness.
With reference to Fig. 2, the five-electrical level inverter circuit diagram that provides for the embodiment of the invention one.As shown in Figure 2, described five-electrical level inverter comprises: positive Boost booster circuit 10, negative Boost booster circuit 20, inverter circuit 30, filter circuit 40.
Described inverter circuit 30 comprises: the first switching tube Q1, second switch pipe Q2, the 3rd switching tube Q3, the 4th switching tube Q4, the 5th switching tube Q5, the 6th switching tube Q6, the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4.
Described the first diode D1, described the first switching tube Q1, described second switch pipe Q2, described the second diode D2 successively series connection consist of a pair of input branch road between the positive pole and negative pole of described power supply PV1.Wherein, described the first diode D1 and the first switching tube Q1 consist of the positive input branch road; Described second switch pipe Q2 and the second diode D2 consist of the negative input branch road.The common port of described the first switching tube Q1 and described second switch pipe Q2 is the mid point of described input branch road.
Concrete, described input branch road is: the anode of described the first diode D1 connects the positive pole of described power supply PV1, and the negative electrode of described the first diode D1 connects the first end of described the first switching tube Q1; The first end of the described second switch pipe of the second termination Q2 of described the first switching tube Q1; The anode of described the second diode D2 of the second termination of described second switch pipe Q2; The negative electrode of described the second diode D2 connects the negative pole of described power supply PV1.
Described the 3rd diode D3, described the 3rd switching tube Q3, described the 4th switching tube Q4, described the 4th diode D4 connect successively, consist of a pair of afterflow branch road.Wherein, described the 3rd diode D3 and the 3rd switching tube Q3 consist of positive afterflow branch road; Described the 4th switching tube Q4 and the 4th diode D4 consist of negative afterflow branch road.The common port of described the 3rd switching tube Q3 and described the 4th switching tube Q4 is the mid point of described afterflow branch road.
Concrete, described afterflow branch road is: the plus earth of described the 3rd diode D3, and the negative electrode of described the 3rd diode D3 connects the first end of described the 3rd switching tube Q3; The first end of described the 4th switching tube Q4 of the second termination of described the 3rd switching tube Q3; The anode of described the 4th diode D4 of the second termination of described the 4th switching tube Q4; The minus earth of described the 4th diode D4.
Described the 5th switching tube Q5 and described the 6th switching tube Q6 successively series connection consist of the perpendicular brachium pontis input of a pair of inversion branch road between the output of the output of described positive Boost booster circuit and negative Boost booster circuit.Wherein, described the 5th switching tube Q5 consists of the perpendicular brachium pontis positive input branch road of inversion; Described the 6th switching tube Q6 consists of the perpendicular brachium pontis negative input branch road of inversion.The common port of described the 5th switching tube Q5 and described the 6th switching tube Q6 is the mid point of the perpendicular brachium pontis input of described inversion branch road.
Concrete, the perpendicular brachium pontis input of described inversion branch road is: the positive Boost voltage input end of first end conduct of described the 5th switching tube Q5 connects the output of described positive Boost booster circuit, the first end of described the 6th switching tube Q6 of the second termination of described the 5th switching tube Q5; The second end of described the 6th switching tube Q6 connects the output of described negative Boost booster circuit as negative Boost voltage input end.
The perpendicular brachium pontis of the mid point of the mid point of described input branch road, afterflow branch road and inversion is inputted the mid point short circuit of branch road, is referred to as the output mid point of described inverter circuit 30.
The output mid point of described inverter circuit 30 connects load or electrical network by filter circuit 40.
The described five-electrical level inverter of the embodiment of the invention also comprises: the 7th switching tube Q7 and the 8th switching tube Q8.
Described the 7th switching tube Q7 is connected across in the perpendicular brachium pontis positive input branch road of described positive input branch road, positive afterflow branch road and inversion between any two branch roads; Described the 8th switching tube Q8 is connected across in the perpendicular brachium pontis negative input branch road of described negative input branch road, negative afterflow branch road and inversion between any two branch roads.
It should be noted that, any one branch road in two branch roads of at least one branch road in two branch roads of described the 7th switching tube Q7 cross-over connection and the 8th switching tube Q8 cross-over connection does not belong to a pair of branch road, and described is arbitrary right in the perpendicular brachium pontis input of described input branch road, afterflow branch road and the inversion branch road with a pair of branch road.
In the described five-electrical level inverter of the embodiment of the invention, by cross-over connection the 7th switching tube Q7 and the 8th switching tube Q8 between any two branch roads in the perpendicular brachium pontis input of described input branch road, afterflow branch road and inversion branch road, and any one branch road in two branch roads of at least one branch road in two branch roads of described the 7th switching tube Q7 cross-over connection and the 8th switching tube Q8 cross-over connection does not belong to a pair of branch road, and described is arbitrary right in the perpendicular brachium pontis input of described input branch road, afterflow branch road and the inversion branch road with a pair of branch road.Broken thus the symmetrical structure of traditional five-electrical level inverter, this structure can effectively reduce the switching loss of power device and the on-state loss of main power device, is conducive to improve system effectiveness.
In conjunction with Fig. 2, the circuit structure of the described five-electrical level inverter of the embodiment of the invention is described in detail.
As shown in Figure 2, described the 7th switching tube Q7 is connected across between described positive input branch road and the positive afterflow branch road; Described the 8th switching tube Q8 is connected across between described negative afterflow branch road and the perpendicular brachium pontis negative input branch road of inversion.
Concrete, the first end of described the first switching tube Q1 of the first termination of described the 7th switching tube Q7, the first end of described the 3rd switching tube Q3 of the second termination of described the 7th switching tube Q7.
The second end of described the 4th switching tube Q4 of the first termination of described the 8th switching tube Q8, the second end of described the 6th switching tube Q6 of the second termination of described the 8th switching tube Q8.
Certainly, shown in Figure 2 only is a kind of specific implementation form of the embodiment of the invention, in actual applications, the described five-electrical level inverter of the embodiment of the invention can but be not limited to be realized by circuit structure shown in Figure 2.
The below describes in detail to the operation principle of the described five-electrical level inverter of the embodiment of the invention as an example of circuit structure shown in Figure 2 example.
The operation principle of circuit when as shown in Figure 2, inputting positive voltage:
When the input positive voltage was higher, the Boost booster circuit was not worked, and the input positive voltage is directly connected to inverter circuit 30.As shown in Figure 2, on circuit form, described the 7th switching tube Q7 connects with the 3rd switching tube Q3, and this series arm and described the first switching tube Q1, the 5th switching tube Q5 all consist of parallel form.The sequential that turns on and off by suitable power ratio control switching tube, so that the 3rd switching tube Q3 opens in advance, turn-offs in advance than the first switching tube Q1, the 5th switching tube Q5, thereby the switching loss of the first switching tube Q1, the 5th switching tube Q5 is transferred to the branch road at the 7th switching tube Q7 place.Simultaneously, in the circuit shown in Figure 2, described the first switching tube Q1 and the 5th switching tube Q5 are equivalent to relation in parallel, and two switching tubes are shared electric current jointly, thereby reduce the conduction loss of master power switch pipe.At this moment, circuit working is at the three-level inverter state.
When the input positive voltage was low, the Boost booster circuit was started working, and input positive voltage one tunnel is connected with the first switching tube Q1, and another road links to each other with described the 5th switching tube Q5 after boosting through the Boost booster circuit.At this moment, in conjunction with shown in Figure 2, on circuit form, described the 7th switching tube Q7 connects with the 3rd switching tube Q3, and this series arm and described the first switching tube Q1 consist of parallel form.The sequential that turns on and off by suitable power ratio control switching tube, so that described the 3rd switching tube Q3 opens in advance, turn-offs in advance than the first switching tube Q1, thus the switching loss of larger reduction master power switch pipe Q1.Simultaneously, in this case, described the 5th switching tube Q5 and the first switching tube Q1 consist of the five-electrical level inverter structure, can further reduce the switching loss of power switch pipe, and reduce the size of outputting inductance.
The operation principle of circuit during the input negative voltage:
When the input negative voltage was higher, the Boost booster circuit was not worked, and the input negative voltage is directly connected to inverter circuit 30.As shown in Figure 2, on circuit form, described the 4th switching tube Q4 connects with the 8th switching tube Q8, and this series arm and described second switch pipe Q2, the 6th switching tube Q6 all consist of parallel form.The sequential that turns on and off by suitable power ratio control switching tube, so that the 4th switching tube Q4 opens in advance, turn-offs in advance than second switch pipe Q2, the 6th switching tube Q6, thereby the switching loss of second switch pipe Q2, the 6th switching tube Q6 is transferred to the branch road at the 8th switching tube Q8 place.Simultaneously, in the circuit shown in Figure 2, described second switch pipe Q2 and the 6th switching tube Q6 are equivalent to relation in parallel, and two switching tubes are shared electric current jointly, thereby reduce the conduction loss of master power switch pipe.At this moment, circuit working is at the three-level inverter state.
When the input negative voltage was low, the Boost booster circuit was started working, and input negative voltage one tunnel is connected with second switch pipe Q2, and another road links to each other with described the 6th switching tube Q6 after boosting through the Boost booster circuit.At this moment, in conjunction with shown in Figure 2, on circuit form, described the 4th switching tube Q4 connects with the 8th switching tube Q8, and this series arm and described the 6th switching tube Q6 consist of parallel form.The sequential that turns on and off by suitable power ratio control switching tube, so that described the 4th switching tube Q4 opens in advance, turn-offs in advance than the 6th switching tube Q6, thus the switching loss of larger reduction master power switch pipe Q6.Simultaneously, in this case, described the 6th switching tube Q6 and second switch pipe Q2 consist of the five-electrical level inverter structure, can further reduce the switching loss of power switch pipe, and reduce the size of outputting inductance.
This shows, in the embodiment of the invention one described five-electrical level inverter, by in traditional symmetry five level inverter circuits, increasing the 7th switching tube Q7 and the 8th switching tube Q8, break symmetrical structure, can effectively reduce the switching loss of power device and the on-state loss of main power device thus, be conducive to improve system effectiveness.
As shown in Figure 2, described positive Boost booster circuit 10 comprises: the 9th switching tube Q9, the first capacitor C 1, the 3rd capacitor C 3, the first inductance L 1, the 5th diode D5, the 7th diode D7; Described negative Boost booster circuit 20 comprises: the tenth switching tube Q10, the second capacitor C 2, the 4th capacitor C 4, the second inductance L 2, the 6th diode D6, the 8th diode D8.
Wherein, an end of described the first capacitor C 1 links to each other as the input of described positive Boost booster circuit 10 with an end of the first inductance L 1, connects the positive pole of described power supply PV1; One end of described the second capacitor C 2 of another termination of described the first capacitor C 1; The other end of described the second capacitor C 2 links to each other as the input of described negative Boost booster circuit 20 with an end of the second inductance L 2, connects the negative pole of described power supply PV1.
The first end of described the 9th switching tube Q9 of another termination of described the first inductance L 1 and the anode of the 5th diode D5; The first end of described the tenth switching tube Q10 of the second termination of described the 9th switching tube Q9; The other end of described the second inductance L 2 of the second termination of described the tenth switching tube Q10 and the negative electrode of the 6th diode D6.
The negative electrode of described the 5th diode D5 connects an end of described the 3rd capacitor C 3; One end of described the 4th capacitor C 4 of another termination of described the 3rd capacitor C 3; The anode of described the 6th diode D6 of another termination of described the 4th capacitor C 4.
The common end grounding of the common port of the common port of described the 9th switching tube Q9 and the tenth switching tube Q10, described the first capacitor C 1 and the second capacitor C 2, described the 3rd capacitor C 3 and the 4th capacitor C 4.
Wherein, the negative electrode of described the 5th diode D5 is as the output of described positive Boost booster circuit 10; The anode of described the 6th diode D6 is as the output of described negative Boost booster circuit 20.
Described the 7th diode D7 is as the bypass diode of described positive Boost booster circuit 10, and its anode connects the input of described positive Boost booster circuit 10, and negative electrode connects the output of described positive Boost booster circuit 10.
Described the 8th diode D8 is as the bypass diode of described negative Boost booster circuit 20, and its negative electrode connects the input of described negative Boost booster circuit 20, and anode connects the output of described negative Boost booster circuit 20.
Described filter circuit 30 comprises: the 3rd inductance L 3 and the 5th capacitor C 5.
The output mid point of the described inverter circuit 30 of described the 3rd inductance L 3 one terminations, the other end of described the 3rd inductance L 3 is by described the 5th capacitor C 5 ground connection.
The load of described circuit is in parallel with described the 5th capacitor C 5.
With reference to Fig. 3, the five-electrical level inverter circuit diagram that provides for the embodiment of the invention two.
In embodiment illustrated in fig. 3 two, described the 7th switching tube Q7 is connected across between described positive input branch road and the perpendicular brachium pontis positive input branch road of inversion; Described the 8th switching tube Q8 is connected across between described negative input branch road and the negative afterflow branch road.
Concrete, the first end of described the 5th switching tube Q5 of the first termination of described the 7th switching tube Q7, the first end of described the first switching tube Q1 of the second termination of described the 7th switching tube Q7.
The second end of described the 4th switching tube Q4 of the first termination of described the 8th switching tube Q8, the second end of the described second switch pipe of the second termination Q2 of described the 8th switching tube Q8.
The operation principle of the embodiment of the invention two described five-electrical level inverters is identical with embodiment one, does not repeat them here.
With reference to Fig. 4, the five-electrical level inverter circuit diagram that provides for the embodiment of the invention three.
In embodiment illustrated in fig. 4 two, described the 7th switching tube Q7 is connected across between described positive afterflow branch road and the perpendicular brachium pontis positive input branch road of inversion; Described the 8th switching tube Q8 is connected across between described negative input branch road and the negative afterflow branch road.
Concrete, the first end of described the 5th switching tube Q5 of the first termination of described the 7th switching tube Q7, the first end of described the 3rd switching tube Q3 of the second termination of described the 7th switching tube Q7.
The second end of described the 4th switching tube Q4 of the first termination of described the 8th switching tube Q8, the second end of the described second switch pipe of the second termination Q2 of described the 8th switching tube Q8.
The operation principle of the embodiment of the invention three described five-electrical level inverters is identical with embodiment one, does not repeat them here.
In the embodiment of the invention three and the embodiment four described five-electrical level inverters, by in traditional symmetry five level inverter circuits, increasing the 7th switching tube Q7 and the 8th switching tube Q8, break symmetrical structure, can effectively reduce the switching loss of power device and the on-state loss of main power device thus, be conducive to improve system effectiveness.
In actual applications, there are multiple choices the position of described the 7th switching tube Q7 and the 8th switching tube Q8, is not limited to shown in Fig. 2,3,4 circuit.Cross-over connection the 7th switching tube Q7 and the 8th switching tube Q8 between any any two branch roads that satisfy in the perpendicular brachium pontis input of described input branch road, afterflow branch road and inversion branch road, and the circuit that any one branch road at least one branch road in two branch roads of described the 7th switching tube cross-over connection and two branch roads of the 8th switching tube cross-over connection does not belong to a pair of branch road all can be applied to the described five-electrical level inverter of the embodiment of the invention, realizes that the embodiment of the invention requires the beneficial effect that reaches.
In other embodiments of the invention, described five-electrical level inverter can also be connected across between described positive input branch road and the positive afterflow branch road for: described the 7th switching tube Q7; Described the 8th switching tube Q8 is connected across between described negative input branch road and the perpendicular brachium pontis negative input branch road of inversion.Concrete, the first end of described the first switching tube Q1 of the first termination of described the 7th switching tube Q7, the first end of described the 3rd switching tube Q3 of the second termination of described the 7th switching tube Q7.The second end of the described second switch pipe of the first termination Q2 of described the 8th switching tube Q8, the second end of described the 6th switching tube Q6 of the second termination of described the 8th switching tube Q8.
In other embodiments of the invention, described five-electrical level inverter can also be connected across between described positive input branch road and the perpendicular brachium pontis positive input branch road of inversion for: described the 7th switching tube Q7; Described the 8th switching tube Q8 is connected across between described negative afterflow branch road and the perpendicular brachium pontis negative input branch road of inversion.The first end of described the 5th switching tube Q5 of the first termination of described the 7th switching tube Q7, the first end of described the first switching tube Q1 of the second termination of described the 7th switching tube Q7.The second end of described the 6th switching tube Q6 of the first termination of described the 8th switching tube Q8, the second end of described the 4th switching tube Q4 of the second termination of described the 8th switching tube Q8.
In other embodiments of the invention, described five-electrical level inverter can also be connected across between described positive afterflow branch road and the perpendicular brachium pontis positive input branch road of inversion for: described the 7th switching tube Q7; Described the 8th switching tube Q8 is connected across between described negative input branch road and the perpendicular brachium pontis negative input branch road of inversion.Concrete, the first end of described the 5th switching tube Q5 of the first termination of described the 7th switching tube Q7, the first end of described the 3rd switching tube Q3 of the second termination of described the 7th switching tube Q7.The second end of described the 6th switching tube Q6 of the first termination of described the 8th switching tube Q8, the second end of the described second switch pipe of the second termination Q2 of described the 8th switching tube Q8.
Need to prove, in the described five-electrical level inverter of aforementioned each embodiment of the present invention, for effectively reducing the switching loss of main power tube, described the first switching tube Q1, second switch pipe Q2, the 3rd switching tube Q3, the 4th switching tube Q4, the 5th switching tube Q5, the 6th switching tube Q6 all can adopt high-power IGBT (Insulated Gate Bipolar Transistor, insulated gate bipolar transistor); Described the 7th switching tube Q7 and the 8th switching tube Q8 then can adopt faster power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, metal-oxide half field effect transistor) of switching speed.
Concrete, shown in figure, described IGBT is made of a triode and a diode; The collector electrode of described triode and the negative electrode of described diode join, and consist of the first end of described IGBT; The emitter of described triode and the anode of described diode join, and consist of the second end of described IGBT.
Described MOSFET is made of a metal-oxide-semiconductor and a diode; The source electrode of described metal-oxide-semiconductor and the negative electrode of described diode join, and consist of the first end of described MOSFET; The drain electrode of described metal-oxide-semiconductor and the anode of described diode join, and consist of the second end of described MOSFET.
For the described five-electrical level inverter of aforementioned each embodiment of the present invention, described five-electrical level inverter may further include: described five-electrical level inverter further comprises: the first power relay, the second power relay, the 3rd power relay and the 4th power relay.
Wherein, described the first power relay is in parallel with the bypass diode of described positive Boost booster circuit; Described the second power relay is in parallel with the bypass diode of described negative Boost booster circuit.
Described the 3rd power relay is in parallel with described the first diode D1 or connect; Described the 4th power relay is in parallel with described the second diode D2 or connect.
Describe in detail below in conjunction with concrete circuitous pattern.
With reference to Fig. 5, the five-electrical level inverter circuit diagram that provides for the embodiment of the invention four.As shown in Figure 5, the difference of the embodiment of the invention four described five-electrical level inverters and embodiment one is: described five-electrical level inverter further comprises: the first power relay RL1, the second power relay RL2, the 3rd power relay RL3 and the 4th power relay RL4.
Wherein, the bypass diode of described the first power relay RL1 and described positive Boost booster circuit, it is in parallel to be described the 7th diode D7; The bypass diode of described the second power relay RL2 and described negative Boost booster circuit, it is in parallel to be described the 8th diode D8.
Described the 3rd power relay RL3 is in parallel with described the first diode D1; Described the 4th power relay RL4 is in parallel with described the second diode D2.
Circuit structure shown in Figure 5 operation principle when the input positive voltage:
When the input positive voltage is higher, the Boost booster circuit is not worked, the input positive voltage is connected to inverter circuit by two branch roads, one the tunnel is connected with the 5th switching tube Q5 through the first power relay RL1, another road is connected with the first switching tube Q1 through the 3rd power relay RL3, at this moment, the first diode D1, the 7th switching tube Q7 and the 3rd switching tube Q3 consist of the afterflow branch road.As shown in Figure 2, described the 7th switching tube Q7 connects with the 3rd switching tube Q3, and on circuit form, this series arm and described the first switching tube Q1, the 5th switching tube Q5 all consist of parallel form.The sequential that turns on and off by suitable power ratio control switching tube, so that the 3rd switching tube Q3 opens in advance, turn-offs in advance than the first switching tube Q1, the 5th switching tube Q5, thereby the switching loss of the first switching tube Q1, the 5th switching tube Q5 is transferred to the branch road at the 7th switching tube Q7 place.Simultaneously, in the circuit shown in Figure 2, described the first switching tube Q1 and the 5th switching tube Q5 are equivalent to relation in parallel, and two switching tubes are shared electric current jointly, thereby reduce the conduction loss of master power switch pipe.At this moment, circuit working is at the three-level inverter state.
When the input positive voltage is low, the Boost booster circuit is started working, input positive voltage one tunnel is connected with the first switching tube Q1 through the 3rd power relay RL3, another road links to each other with described the 5th switching tube Q5 after boosting through Boost, at this moment, the first diode D1, the 7th switching tube Q7 and the 3rd switching tube Q3 consist of the afterflow branch road.At this moment, in conjunction with shown in Figure 2, described the 7th switching tube Q7 connects with the 3rd switching tube Q3, and on circuit form, this series arm and described the first switching tube Q1 consist of parallel form.The sequential that turns on and off by suitable power ratio control switching tube, so that described the 3rd switching tube Q3 opens in advance, turn-offs in advance than the first switching tube Q1, thus the switching loss of larger reduction master power switch pipe Q1.Simultaneously, in this case, described the 5th switching tube Q5 and the first switching tube Q1 consist of the five-electrical level inverter structure, can further reduce the switching loss of power switch pipe, and reduce the size of outputting inductance.
The operation principle of circuit is identical with it during the input negative voltage, does not repeat them here.
This shows, in the embodiment of the invention four described five-electrical level inverters, by in traditional symmetry five level inverter circuits, increasing the 7th switching tube Q7 and the 8th switching tube Q8, break symmetrical structure, can effectively reduce the switching loss of power device and the on-state loss of main power device thus, be conducive to improve system effectiveness.Further, in circuit shown in the embodiment four, by being the bypass diode power relay in parallel of described the first diode D1 and the second diode D2 and Boost booster circuit, can effectively reduce the turn-on consumption of each diode.
With reference to Fig. 6, the five-electrical level inverter circuit diagram that provides for the embodiment of the invention five.As shown in Figure 6, the difference of the embodiment of the invention five described five-electrical level inverters and embodiment two is: described five-electrical level inverter further comprises: the first power relay RL1, the second power relay RL2, the 3rd power relay RL3 and the 4th power relay RL4.
Wherein, wherein, the bypass diode of described the first power relay RL1 and described positive Boost booster circuit, it is in parallel to be described the 7th diode D7; The bypass diode of described the second power relay RL and described negative Boost booster circuit, it is in parallel to be described the 8th diode D8.
Described the 3rd power relay RL3 is in parallel with described the first diode D1; Described the 4th power relay RL4 is in parallel with described the second diode D2.
With reference to Fig. 7, the five-electrical level inverter circuit diagram that provides for the embodiment of the invention six.As shown in Figure 7, the difference of the embodiment of the invention six described five-electrical level inverters and embodiment three is: described five-electrical level inverter further comprises: the first power relay RL1, the second power relay RL2, the 3rd power relay RL3 and the 4th power relay RL4.
Wherein, the bypass diode of described the first power relay RL1 and described positive Boost booster circuit, it is in parallel to be described the 7th diode D7; The bypass diode of described the second power relay RL and described negative Boost booster circuit, it is in parallel to be described the 8th diode D8.
Described the 3rd power relay RL3 is in parallel with described the first diode D1; Described the 4th power relay RL4 is in parallel with described the second diode D2.
The embodiment of the invention five is identical with embodiment four with the operation principle of embodiment six described five-electrical level inverters, does not repeat them here.
In the embodiment of the invention five and the embodiment six described five-electrical level inverters, by in traditional symmetry five level inverter circuits, increasing the 7th switching tube Q7 and the 8th switching tube Q8, break symmetrical structure, can effectively reduce the switching loss of power device and the on-state loss of main power device thus, be conducive to improve system effectiveness.Further, in circuit shown in the embodiment five box embodiment, by being the bypass diode power relay in parallel of described the first diode D1 and the second diode D2 and Boost booster circuit, can effectively reduce the turn-on consumption of each diode.
With reference to Fig. 8, the five-electrical level inverter circuit diagram that provides for the embodiment of the invention seven.As shown in Figure 8, wherein, the bypass diode of described the first power relay RL1 and described positive Boost booster circuit, it is in parallel to be described the 7th diode D7; The bypass diode of described the second power relay RL and described negative Boost booster circuit, it is in parallel to be described the 8th diode D8.
Described the 3rd power relay RL3 connects with described the first diode D1; Described the 4th power relay RL4 is in parallel with described the second diode D2.
When described the 3rd power relay RL3 connects with described the first diode D1, can intercept the branch road that electric current flows through described the first diode D1 place.For power relay, because the body diode, cause the electric current may two-way flow.And in when normal operation, do not allow the existence of reverse current, and therefore, by with power relay and diode series connection, effectively block reverse current.
The operation principle of the embodiment of the invention seven described circuit is identical with the described circuit of aforementioned each embodiment, does not repeat them here.
Need to prove, positive Boost booster circuit described in above-mentioned Fig. 3 to Fig. 8, negative Boost booster circuit, and the circuit structure of inverter circuit identical with Fig. 2, do not repeat them here.
More than to a kind of five-electrical level inverter provided by the present invention, be described in detail, used specific case herein principle of the present invention and execution mode are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications.In sum, this description should not be construed as limitation of the present invention.
Claims (12)
1. a five-electrical level inverter is characterized in that, described five-electrical level inverter comprises: positive Boost booster circuit, negative Boost booster circuit and inverter circuit;
Described inverter circuit comprises:
The a pair of input branch road that the first diode, the first switching tube, second switch pipe, the second diode are followed in series to form; Wherein, described the first diode and the first switching tube consist of the positive input branch road, and described second switch pipe and the second diode consist of the negative input branch road;
The a pair of afterflow branch road that the 3rd diode, the 3rd switching tube, the 4th switching tube, the 4th diode are followed in series to form; Wherein, described the 3rd diode and the 3rd switching tube consist of positive afterflow branch road, and described the 4th switching tube and the 4th diode consist of negative afterflow branch road;
The perpendicular brachium pontis input of a pair of inversion that the 5th switching tube and the 6th switching tube are followed in series to form branch road; Wherein, described the 5th switching tube consists of the perpendicular brachium pontis positive input branch road of inversion, and described the 6th switching tube consists of the perpendicular brachium pontis negative input branch road of inversion;
Described inverter circuit also comprises: the 7th switching tube and the 8th switching tube;
Described the 7th switching tube is connected across in the perpendicular brachium pontis positive input branch road of described positive input branch road, positive afterflow branch road and inversion between any two branch roads; Described the 8th switching tube is connected across in the perpendicular brachium pontis negative input branch road of described negative input branch road, negative afterflow branch road and inversion between any two branch roads;
And any one branch road at least one branch road in two branch roads of described the 7th switching tube cross-over connection and two branch roads of the 8th switching tube cross-over connection does not belong to a pair of branch road, and described is arbitrary right in the perpendicular brachium pontis input of described input branch road, afterflow branch road and the inversion branch road with a pair of branch road.
2. five-electrical level inverter according to claim 1 is characterized in that, the anode of described the first diode connects positive source, and the negative electrode of described the first diode connects the first end of described the first switching tube; The first end of the described second switch pipe of the second termination of described the first switching tube; The anode of described second diode of the second termination of described second switch pipe; The negative electrode of described the second diode connects the negative pole of described power supply;
The plus earth of described the 3rd diode, the negative electrode of described the 3rd diode connects the first end of described the 3rd switching tube; The first end of described the 4th switching tube of the second termination of described the 3rd switching tube; The anode of described the 4th diode of the second termination of described the 4th switching tube; The minus earth of described the 4th diode;
The positive Boost voltage input end of first end conduct of described the 5th switching tube connects the output of described positive Boost booster circuit, the first end of described the 6th switching tube of the second termination of described the 5th switching tube; The second end of described the 6th switching tube connects the output of described negative Boost booster circuit as negative Boost voltage input end;
The common port of the common port of the common port of described the first switching tube and described second switch pipe, described the 3rd switching tube and described the 4th switching tube, described the 5th switching tube and described the 6th switching tube is the output mid point of described inverter circuit.
3. five-electrical level inverter according to claim 1 and 2 is characterized in that, described the 7th switching tube is connected across between described positive input branch road and the positive afterflow branch road; Described the 8th switching tube is connected across between described negative afterflow branch road and the perpendicular brachium pontis negative input branch road of inversion.
4. five-electrical level inverter according to claim 3 is characterized in that, the first end of described first switching tube of the first termination of described the 7th switching tube, the first end of described the 3rd switching tube of the second termination of described the 7th switching tube;
The second end of described the 4th switching tube of the first termination of described the 8th switch, the second end of described the 6th switching tube of the second termination of described the 8th switching tube.
5. five-electrical level inverter according to claim 1 and 2 is characterized in that, described the 7th switching tube is connected across between described positive input branch road and the perpendicular brachium pontis positive input branch road of inversion; Described the 8th switching tube is connected across between described negative input branch road and the negative afterflow branch road.
6. five-electrical level inverter according to claim 5 is characterized in that, the first end of described the 5th switching tube of the first termination of described the 7th switching tube, the first end of described first switching tube of the second termination of described the 7th switching tube;
The second end of described the 4th switching tube of the first termination of described the 8th switching tube, the second end of the described second switch pipe of the second termination of described the 8th switching tube.
7. five level inverter circuits according to claim 1 and 2 is characterized in that, described the 7th switching tube is connected across between described positive afterflow branch road and the perpendicular brachium pontis positive input branch road of inversion; Described the 8th switching tube is connected across between described negative input branch road and the negative afterflow branch road.
8. according to claim 7 five-electrical level inverter is characterized in that the first end of described the 5th switching tube of the first termination of described the 7th switching tube, the first end of described the 3rd switching tube of the second termination of described the 7th switching tube;
The second end of described the 4th switching tube of the first termination of described the 8th switching tube, the second end of the described second switch pipe of the second termination of described the 8th switching tube.
9. according to claim 1 to 8 each described five-electrical level inverters, it is characterized in that,
Described positive Boost booster circuit comprises: the 9th switching tube, the first electric capacity, the 3rd electric capacity, the first inductance, the 5th diode, the 7th diode; Described negative Boost booster circuit comprises: the tenth switching tube, the second electric capacity, the 4th electric capacity, the second inductance, the 6th diode, the 8th diode;
Wherein, an end of described the first electric capacity links to each other as the input of described positive Boost booster circuit with an end of the first inductance, connects the positive pole of described power supply; One end of described second electric capacity of another termination of described the first electric capacity; One end of the other end of described the second electric capacity and the second inductance links to each other as the input of described negative Boost booster circuit, connects the negative pole of described power supply;
The first end of described the 9th switching tube of another termination of described the first inductance and the anode of the 5th diode; The first end of described the tenth switching tube of the second termination of described the 9th switching tube; The other end of described second inductance of the second termination of described the tenth switching tube and the negative electrode of the 6th diode;
The negative electrode of described the 5th diode connects an end of described the 3rd electric capacity as the output of described positive Boost booster circuit; One end of described the 4th electric capacity of another termination of described the 3rd electric capacity; The anode of described the 6th diode of another termination of described the 4th electric capacity; The anode of described the 6th diode is as the output of described negative Boost booster circuit;
The common end grounding of the common port of the common port of described the 9th switching tube and the tenth switching tube, described the first electric capacity and the second electric capacity, described the 3rd electric capacity and the 4th electric capacity;
Described the 7th diode is as the bypass diode of described positive Boost booster circuit, and anode connects the input of described positive Boost booster circuit, and negative electrode connects the output of described positive Boost booster circuit;
Described the 8th diode is as the bypass diode of described negative Boost booster circuit, and negative electrode connects the input of described negative Boost booster circuit, and anode connects the output of described negative Boost booster circuit;
Described five-electrical level inverter also comprises: the first power relay, the second power relay, the 3rd power relay and the 4th power relay;
Described the first power relay is in parallel with the bypass diode of described positive Boost booster circuit; Described the second power relay is in parallel with the bypass diode of described negative Boost booster circuit;
Described the 3rd power relay is with described the first diodes in parallel or connect; Described the 4th power relay is with described the second diodes in parallel or connect.
10. according to claim 1 to 8 each described five-electrical level inverters, it is characterized in that described the first switching tube, second switch pipe, the 3rd switching tube, the 4th switching tube, the 5th switching tube, the 6th switching tube are insulated gate bipolar transistor IGBT; Described the 7th switching tube and the 8th switching tube are metal-oxide half field effect transistor MOSFET.
11. five-electrical level inverter according to claim 10 is characterized in that, described IGBT comprises a triode and a diode; The collector electrode of described triode and the negative electrode of described diode join, and consist of the first end of described IGBT; The emitter of described triode and the anode of described diode join, and consist of the second end of described IGBT.
12. according to claim 10 or 11 described five-electrical level inverters, it is characterized in that described MOSFET comprises that a metal-oxide-semiconductor and a diode consist of; The source electrode of described metal-oxide-semiconductor and the negative electrode of described diode join, and consist of the first end of described MOSFET; The drain electrode of described metal-oxide-semiconductor and the anode of described diode join, and consist of the second end of described MOSFET.
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| US9712083B2 (en) | 2014-12-18 | 2017-07-18 | Sungrow Power Supply Co., Ltd. | Method and device for switching operation mode of a five-level inverter |
| EP3035509A3 (en) * | 2014-12-18 | 2016-08-03 | Sungrow Power Supply Co., Ltd. | Method and device for switching operation mode of a five-level inverter |
| CN110071651A (en) * | 2019-06-13 | 2019-07-30 | 河北工业大学 | A kind of non-isolation type boost inverter circuit of symmetrical configuration |
| CN110071651B (en) * | 2019-06-13 | 2023-05-12 | 河北工业大学 | Non-isolated boost inverter circuit with symmetrical structure |
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