CN102958220B - Method and device for regulating flicker of indicator lamps - Google Patents

Method and device for regulating flicker of indicator lamps Download PDF

Info

Publication number
CN102958220B
CN102958220B CN201110237691.3A CN201110237691A CN102958220B CN 102958220 B CN102958220 B CN 102958220B CN 201110237691 A CN201110237691 A CN 201110237691A CN 102958220 B CN102958220 B CN 102958220B
Authority
CN
China
Prior art keywords
flicker
unit
bit
bit map
flicker cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201110237691.3A
Other languages
Chinese (zh)
Other versions
CN102958220A (en
Inventor
许俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Centec Communications Co Ltd
Original Assignee
Centec Networks Suzhou Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centec Networks Suzhou Co Ltd filed Critical Centec Networks Suzhou Co Ltd
Priority to CN201110237691.3A priority Critical patent/CN102958220B/en
Publication of CN102958220A publication Critical patent/CN102958220A/en
Application granted granted Critical
Publication of CN102958220B publication Critical patent/CN102958220B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)

Abstract

The invention provides a method for regulating flicker of indicator lamps. The method includes setting N unit flicker cycles; determining fixed lengths of bitmaps according to lengths M of the unit flicker cycles; repeatedly arraying the same unit flicker cycle with the length M until the sum of the lengths of the unit flicker cycles is equal to the fixed length of the corresponding bitmap, and forming the bitmaps corresponding to N flicker levels; and regulating the frequency of flicker of the indicator lamps by selecting the bitmaps. Each unit flicker cycle is MXtB, wherein the tB is the duration of each bit and is shorter than or equal to 1/24 second, the M is the length of the corresponding unit flicker cycle, the MXtB is longer than or equal to 1/24 second, each unit flicker cycle MXtB is equal to the sum of a light-on stage XXtB and a light-off stage YXtB, the frequency of flicker is lowered when the M is increased, and the fixed length of each bitmap can be exactly divided by the length M of each unit flicker cycle. Compared with the prior art, the method for regulating flicker of the indicator lamps has the advantage that flicker of the multiple indicator lamps is controlled by selecting the limited bitmaps.

Description

Indicator light flash adjustment method and device
Technical field
The present invention relates to electronic technology field, particularly relate to a kind of indicator light flash adjustment method and device.
Background technology
On various network-termination device, as Ethernet switch etc., often all adopt LED(Light Emitting Diode, light-emitting diode) as the operating state of status indicator lamp indicating terminal equipment, some terminal equipment has multiple indicator light, by the change of different flicker frequencies, as states such as quick flashing, slow sudden strains of a muscle, carry out operating states different in indicating equipment.
The method of existing control indicator light flicker is realized by the frequency of by-pass cock indicator light, frequency divider is adopted to regulate divide ratio to control the cycle of the high and low level of indicator light signal, if the cycle is elongated, then indicator light flicker frequency is slack-off, otherwise flicker frequency accelerates.But for there being multiple indicator light terminal equipment, the state shown due to each indicator light is different, then need multiple frequency divider one to one to regulate.Along with the increase of indicator light quantity, frequency divider quantity increases thereupon, and cost also linearly increases thereupon.
Summary of the invention
In order to solve the problem, the invention provides a kind of indicator light flash adjustment method and device, this control method and device can utilize the selection of limited bit map to control the flicker of multiple indicator light.
Concrete technical scheme is as follows:
A kind of indicator light flash adjustment method that the embodiment of the present invention provides, comprising:
Set N number of unit flicker cycle, each unit flicker cycle is M* tB, wherein, tB is the duration of each bit, tB≤1/24 second, M is unit flicker cycle length, M* tB >=1/24 second, described each unit flicker cycle M* tB=ignition phase X* tB+ extinguishes stage Y* tB, and M is larger, and flicker frequency is slower;
According to described unit flicker cycle length M, determine the regular length of bit map, the aliquot described each unit flicker cycle length M of regular length of described bit map;
By same unit flicker cycle length M repeated arrangement to the regular length of bit map, form the bit map of corresponding N number of flicker grade;
By selecting described bit map, regulate the flicker frequency of indicator light.
According to one of the present invention preferred embodiment, described bit map is with binary representation, and bit value lights indicator light for time " 1 ", extinguishes indicator light when bit value is " 0 ".
According to one of the present invention preferred embodiment, the bit value of beginning and the bit value of end of the ignition phase X of described each unit flicker cycle are " 1 ", and all bit values of described extinguishing stage Y are " 0 ".
According to one of the present invention preferred embodiment, the bit value interval being positioned at centre position in described ignition phase X is set to " 0 ", and " 0 " that occurred by interval regulates the brightness of indicator light.
According to one of the present invention preferred embodiment, the duration tB of described each bit is 1/60 second.
According to one of the present invention preferred embodiment, this control method supports that multiple port exports, and the duration that now each bit exports is tB/ port sum.
A kind of indicator light flash adjustment device that the embodiment of the present invention provides, comprising:
Unit flicker cycle unit, for setting N number of unit flicker cycle, each unit flicker cycle is M* tB, wherein, tB is the duration of each bit, tB≤1/24 second, M is unit flicker cycle length, M*tB >=1/24 second, it is slower that described each unit flicker cycle M*tB=ignition phase X*tB+ extinguishes the larger flicker frequency of stage Y*tB, M;
Bit map fixed-length cell, for according to described unit flicker cycle length M, determines the regular length of bit map, the aliquot each unit flicker cycle length M of regular length of described bit map;
For by same unit flicker cycle length M repeated arrangement to the regular length of bit map, form the unit of the bit map of corresponding N number of flicker grade;
For by selecting described bit map, regulate the unit of the flicker frequency of indicator light.
According to one of the present invention preferred embodiment, described bit map is with binary representation, and bit value lights indicator light for time " 1 ", extinguishes indicator light when bit value is " 0 ".
According to one of the present invention preferred embodiment, the bit value of beginning and the bit value of end of the ignition phase X of described each unit flicker cycle are " 1 ", and all bit values of described extinguishing stage Y are " 0 ".
According to one of the present invention preferred embodiment, the bit value interval being positioned at centre position in described ignition phase X is set to " 0 ", and " 0 " that occurred by interval regulates the brightness of indicator light.
As can be seen from the above technical solutions, a kind of indicator light flash adjustment method provided by the invention, this control method can utilize the selection of limited bit map to control the flicker of multiple indicator light, adjustable brightness and flicker frequency, do not need regulation voltage and use frequency divider, simple, and also do not need to increase hardware along with the increase of indicator light quantity, reduce costs.
Accompanying drawing explanation
Fig. 1 is the flow chart of the indicator light flash adjustment method of an embodiment of the present invention;
Fig. 2 is the bit map of 4 kinds of flicker frequencies of the high brightness of the embodiment of the present invention one;
Fig. 3 is the bit map of 4 kinds of flicker frequencies of the low-light level of the embodiment of the present invention one;
Fig. 4 is the bit map of 2 kinds of flicker frequencies of the high brightness of the embodiment of the present invention two;
Fig. 5 is the bit map of 2 kinds of flicker frequencies of the middle brightness of the embodiment of the present invention two;
Fig. 6 is the bit map of 2 kinds of flicker frequencies of the low-light level of the embodiment of the present invention two;
Fig. 7 is the indicator light flash adjustment apparatus module figure of an embodiment of the present invention.
Embodiment
In order to make the object, technical solutions and advantages of the present invention clearly, describe the present invention below in conjunction with the drawings and specific embodiments.
The present invention adopts the selection of limited bit map to control the flicker of multiple indicator light lamp, and described bit map is the character string formed by multiple bit value, and exports bit value as conditional code in the mode of Serial output, controls the blink states of indicator light.
As shown in Figure 1, be the flow chart of the indicator light flash adjustment method of an embodiment of the present invention, described control method comprises:
A, set N number of unit flicker cycle, each unit flicker cycle is M* tB, wherein, tB is the duration of each bit, tB≤1/24 second, M, N are positive integer, M is unit flicker cycle length, i.e. number of bits, M* tB >=1/24 second, described each unit flicker cycle M* tB=ignition phase X* tB+ extinguishes stage Y* tB, and M is larger, and flicker frequency is slower.
The state that each unit flicker cycle comprises ignition phase X and extinguishing stage Y, ignition phase X performance is that indicator light is bright, and the state extinguishing stage Y performance is that indicator light goes out.
The persistence of vision time due to human eye is approximately 1/24 second, is that tB is set to≤1/24 second persistence of vision time of human eye, makes the duration settings tB of each bit human eye can not differentiate the state of each bit, ensureing not discovered by human eye when there is error code.Unit flicker cycle M* tB is set to >=1/24 second persistence of vision time of human eye, is that the light on and off of indicator light are distinguished by human eye, there is flicker effect.
B, according to described unit flicker cycle length M, determine the regular length of bit map, the aliquot described each unit flicker cycle length M of regular length of described bit map.
When determining the regular length of bit map, the least common multiple of each unit flicker cycle length M or the multiple of the least common multiple regular length as described bit map can be got.Preferably, adopt least common multiple as the regular length of bit map.
The grade of the unit flicker cycle of setting is more, and namely N is larger, and the regular length of described bit map is larger.
C, by same unit flicker cycle length M repeated arrangement to the regular length of bit map, form the bit map of corresponding N number of flicker grade.
Regular length due to bit map is the multiple of unit flicker cycle length, and forming corresponding bit map to each unit flicker cycle length M, is by same unit flicker cycle length M repeated arrangement, until take the regular length of described bit map.Corresponding to N number of different unit flicker cycle, the bit map of N number of flicker grade can be formed.
Described bit map with binary representation, bit value for " 1 " time output signal for lighting indicator light, when bit value be " 0 " output signal for extinguish indicator light, bit value when starting in described bit map with at the end of bit value contrary.The bit value of the beginning of described ignition phase X and the bit value of end are " 1 ", and all bit values of described extinguishing stage Y are " 0 ".
D, by selecting described bit map, regulate the flicker frequency of indicator light.
Described bit map exports as conditional code in the mode of Serial output, and the duration of each bit is tB, controls the blink states of indicator light.Owing to there being N number of different unit flicker cycle, to the bit map that should have N number of flicker grade, corresponding to N kind flicker frequency, control the flicker of indicator light.
When multiple port supported by needs, the duration that each bit exports is tB/ port sum.The duration tB of each bit such as set is 1/60 second, needs the port sum supported to be 30, and the duration that so now each bit exports will be reduced to 1/(60*30) second.Rely on latch to keep bit output value, for each LED, the duration that each bit exports is constant, remains 1/60 second.
The mode that the present invention adopts the selection of limited bit map to carry out flicker to control can also carry out brightness regulation.
The method of existing control indicator light brightness is by regulating the magnitude of voltage be carried on indicator light to realize, and often adopts hardware circuit to carry out regulating resistance partial pressure value.But in order to realize carrying out dynamic micro-adjustments by digital form, the design of its hardware circuit is comparatively complicated, single-chip microcomputer need be utilized to regulate numerical digit resistance or realized the adjustment of voltage by digital-to-analogue conversion (D/A) device, turn increasing cost simultaneously.
The mode that the present invention is then is " 0 " by arranging bit value at the interval, centre position of ignition phase X, carries out brightness regulation.Duration due to each bit is less than persistence of vision time of human eye, the time that " 0 " control indicator light that interval occurs goes out is too short, and human eye can not be discovered indicator light and go out, and only perceived brightness is dimmed, " 0 " that interval occurs is more frequent, and the brightness of indicator light is darker.Thus " 0 " that occurred by interval can carry out brightness regulation, sets different brightness degrees.
In an ethernet switch, usual each port has one or more LED as indicator light, the speed of the Link State of display port and receipts/literary composition of transmitting messages, the LED of each port can export serial presence code stream by Ethernet switching chip and control.By controlling LED flicker frequency and brightness, show different states.LED flicker speed can show the Link State of each port and the speed of receipts/literary composition of transmitting messages, and different LED brightness can adapt to the application of different occasion, such as, in machine room, does not need LED too bright, simultaneously also in order to reduce power consumption; And with switch out of doors, due to outdoor light, then need the brightness improving LED; When indoor, can also the lower Night of furnishing brightness, reduce the LED of glimmering and the rest of people, life are impacted.
In the present invention, it is adopt the mode of bit map to represent, in order to control brightness and the flicker frequency of LED that Ethernet switching chip exports the signal controlling LED.
Embodiment 1
Generally for simple and shorten for the purpose of bitmap lengths, the progression of the control of LED brightness and flicker frequency is preferably not more than 4 grades.Suppose in Ethernet switch, the brightness progression of LED is 2 grades, is divided into high brightness and low-light level, and LED flicker progression is 4 grades, is divided into most quick flashing, secondary quick flashing, dodges slowly, dodges the most slowly.
The duration setting each bit is 1/60 second (being less than the persistence of vision time of human eye).When outputing signal as lightening LED lamp time " 1 ", output signal as extinguishing LED time " 0 ".In a flicker cycle, the length of output signal " 1 " is longer, and flicker frequency is slower.
To set first unit flicker cycle be flicker frequency is most quick flashing grade, because brightness progression is 2 grades, will have the output of " 0 " when low-light level in ignition phase, and the bit value of the beginning of ignition phase and the bit value of end is " 1 ".Thus the length can determining the unit flicker week of the highlighted most quick flashing grade of LED is 6, and namely export " 111 " continuously and and then exports " 000 ", this unit flicker cycle comprises the ignition phase of " 111 " and the extinguishing stage of " 000 ", then repeats.Such flicker cycle is 1/10 second (being greater than the persistence of vision time of human eye), is the flicker frequency of most quick flashing.Also be 6 in the unit flicker cycle length of low bright most quick flashing grade, namely export " 101 " and then exports " 000 ", this unit flicker cycle comprises the ignition phase of " 101 " and the extinguishing stage of " 000 ", then repeats.
To set second unit flicker cycle be flicker frequency is time quick flashing grade, can lengthen ignition phase and extinguish the length in stage, slow down flicker frequency.In unit flicker cycle when high brightness, " 1 " that exports continuously can be lengthened to " 11111 ", and then export " 00000 ", then repeat.This unit flicker cycle length is 10, and flicker cycle is 1/6 second, is reduced to the flicker frequency of time quick flashing.In the 2nd, 3,4 one or two bit values can be selected in ignition phase in unit flicker cycle when low-light level to be " 0 ", but " 0 " must be interval to be occurred, can not continuous two be " 0 ", namely export " 10111 ", " 11011 ", " 11101 " or " 10101 ", and then export " 00000 " and then repeat.
Same, set the 3rd unit flicker cycle be flicker frequency is dodge grade slowly, and in the unit flicker cycle of high brightness, can be lengthened to exporting continuously " 1 " " 1111111111 ", and then output " 0000000000 ", then repeats.This unit flicker cycle length is 20, and flicker cycle is 1/3 second, is reduced to slow flicker frequency of dodging.In unit flicker cycle when low-light level, one in the middle of in ignition phase or several can be selected to be " 0 ", but " 0 " must occur at interval, can not continuous two be " 0 ", " 1110110111 " or " 1101110111 " etc. can be exported, and then export " 0000000000 ", then repeat.
Same, to set the 4th unit flicker cycle be flicker frequency is dodge grade the most slowly, in the unit flicker cycle of high brightness, can lengthen exporting continuously " 1 " and " 0 ", as output 15 " 1 " will be lengthened to, and then export 15 " 0 ", then repeat.This unit flicker cycle length is 30, and flicker cycle is 1/2 second, is reduced to the flicker frequency of dodging the most slowly.In unit flicker cycle when low-light level, select one or several in the middle of in ignition phase be " 0 ", but " 0 " must interval appearance, can not continuous two be " 0 ", the way of output that ignition phase is concrete can be multiple, not exhaustive at this.
Like this, according to the unit flicker cycle length (6,10,20,30) of each grade above-mentioned, can determine that the regular length of bit map is 60.In this process, the method asking least common multiple can be adopted to carry out, when determining the regular length of bit map, first determine according to unit flicker cycle length (namely the longest) of the darkest the slowest grade, judge whether this length or its multiple also can be divided exactly by the unit flicker cycle length of other grades.Like this, the number can divided exactly by 6,10,20,30, be easy to be defined as be 60 multiple, the regular length thus choosing described bit map is 60.
When choosing flicker speed grade, can incremental units flicker cycle length in order, as selected respectively in above-described embodiment 3 " 1 " and 3 " 0 ", 4 " 1 " and 4 " 0 ", 5 " 1 " and 5 " 0 ", 6 " 1 " and 6 " 0 ", corresponding flicker cycle is 1/10 second respectively, 1/7.5 second, 1/6 second and 1/5 second, and wherein be spaced apart 1/30 second, be less than the persistence of vision time of human eye, be not easily therefore easily perceived by humans.Therefore, in order to improve distinguishable rate, preferably, the length of the unit flicker cycle of two adjacent ranks at least will differ 4, is namely spaced apart more than 1/15 second.The time interval is longer, more easily distinguishes the difference of the flicker speed between each grade.
Then, by same unit flicker cycle length (6,10,20,30) repeated arrangement to the regular length of bit map, the bit map of corresponding 4 flickers grade 2 brightness degrees (totally 8 grades) is formed.Regular length due to bit map is the multiple of unit flicker cycle length, when corresponding bit map is formed to each unit flicker cycle length, by same unit flicker cycle length repeated arrangement, until take the regular length of described bit map, as shown in Figures 2 and 3.
The bit map of 4 kinds of flicker frequencies when high brightness as shown in Figure 2, exports when most quick flashing grade " 111 " and " 000 " that comprise repeated arrangement 10 times, then constantly repeats the bit map of regular length.Export when secondary quick flashing grade " 11111 " and " 00000 " that comprise repeated arrangement 5 times.Slow dodge grade time export 10 " 1 " and 10 " 0 " that comprise repeated arrangement 3 times.Export 15 " 1 " and 15 " 0 " that comprise repeated arrangement 2 times when dodging grade the most slowly.
The bit map of 4 kinds of flicker frequencies when low-light level as shown in Figure 3, exports when most quick flashing grade " 101 " and " 000 " that comprise repeated arrangement 10 times, then constantly repeats the bit map of regular length.Export when secondary quick flashing grade " 11011 " and " 00000 " that comprise repeated arrangement 5 times.Slow dodge grade time export " 1101110111 " and 10 " 0 " that comprise repeated arrangement 3 times.Export " 110111101110111 " and 15 " 0 " that comprise repeated arrangement 2 times when dodging grade the most slowly.
Finally, by selecting described bit map, regulate the flicker frequency of indicator light.According to setting, the bit map output signal of each grade, controls the change that LED carries out flicker frequency and brightness.
In the bit map of each grade described, the duration of each bit is 1/60 second, exports according to described bit map the light on and off that the signal of telecommunication controls LED, thus controls flicker frequency and the brightness of LED.
When supporting multiple port to export, the duration that each bit exports is tB/ port sum.Rely on latch to keep bit output value, for the LED of each port, the duration that each bit exports is still 1/60 second.
It is worth mentioning that, when the progression requiring to control becomes many, the duration that can set each bit of bit map is less value, and as 1/120 second etc., the fine setting degree of the progression controlled according to actual needs and brightness set.
Embodiment 2
Suppose in Ethernet switch, the brightness progression of LED is 3 grades, is divided into high brightness, middle brightness and low-light level, and LED flicker progression is 2 grades, is divided into quick flashing and slow sudden strain of a muscle.In setting bit map, the duration of each bit is 1/30 second (being less than the persistence of vision time of human eye).
Brightness degree due to LED is 3 grades, " 0 " all will be had in ignition phase to export when middle brightness and low-light level, and the bit value of the beginning of ignition phase and the bit value of end are " 1 ", thus can determine that in the unit flicker cycle length for during quick flashing grade of glimmering be 10, namely high brightness exports " 11111 " continuously and and then exports " 00000 ", then repeats.Such flicker cycle is 1/3 second (being greater than the persistence of vision time of human eye), is the flicker frequency of quick flashing.Export " 11011 " when middle brightness and and then export " 00000 ", then repeat.Export " 10101 " when low-light level and and then export " 00000 ", then repeat.
When flicker is for slow sudden strain of a muscle grade, lengthens ignition phase and the length extinguishing the stage, slow down flicker frequency.Be 20 as unit flicker cycle length can be lengthened to, when high brightness, export 10 " 1 " and 10 " 0 " continuously, then repeat.This unit flicker cycle is then 2/3 second, is reduced to slow flicker frequency of dodging.The bit value can selecting to be positioned in ignition phase one, centre position or two when middle brightness is for " 0 " but " 0 " must be interval occurs, can not continuous two be " 0 ", can export " 1110110111 " etc., and then export 10 " 0 ", then repeat.Can select to be positioned in ignition phase two of centre position when low-light level or the bit value of several is " 0 ", " 0 " must be that interval occurs equally, can not continuous two be " 0 ", and the quantity of " 0 " is than many during middle brightness, as " 1010101011 ", and then export 10 " 0 ", then repeat.
Like this, according to the length of the unit flicker cycle of each grade in the present embodiment, can determine that the regular length of bit map is 20.
Then, by same unit flicker cycle length (10,20) repeated arrangement to the regular length of bit map, the bit map of corresponding 2 flickers grade 3 brightness degrees (totally 6 grades) is formed, as shown in Figure 4, Figure 5 and Figure 6.
The bit map of 2 kinds of flicker frequencies when high brightness as shown in Figure 4, exports when quick flashing grade " 11111 " and " 00000 " that comprise repeated arrangement 4 times.Slow dodge grade time export 10 " 1 " and 10 " 0 " that comprise repeated arrangement 2 times.
The bit map of 2 kinds of flicker frequencies when middle brightness as shown in Figure 5, exports when quick flashing grade " 11011 " and " 00000 " that comprise repeated arrangement 4 times.Slow dodge grade time export " 1110110111 " and 10 " 0 " that comprise repeated arrangement 2 times.
The bit map of 2 kinds of flicker frequencies when low-light level as shown in Figure 6, exports when quick flashing grade " 10101 " and " 00000 " that comprise repeated arrangement 4 times.Slow dodge grade time export " 1010101011 " and 10 " 0 " that comprise repeated arrangement 2 times.
Finally, by selecting described bit map, regulate the flicker frequency of indicator light.According to setting, the bit map output signal of each grade, controls the change that LED carries out flicker frequency and brightness.The duration of each bit is 1/30 second, exports according to described bit map the light on and off that the signal of telecommunication controls LED, thus controls flicker frequency and the brightness of LED.
As shown in Figure 7, for the indicator light flash adjustment method of an embodiment of the present invention is realized by indicator light flash adjustment device, this device comprises:
Unit flicker cycle unit, for setting N number of unit flicker cycle, each unit flicker cycle is M*tB, wherein, tB is the duration of each bit, tB≤1/24 second, M, N are positive integer, and M is unit flicker cycle length, i.e. number of bits, M*tB >=1/24 second, it is slower that described each unit flicker cycle M*tB=ignition phase X*tB+ extinguishes the larger flicker frequency of stage Y*tB, M.
The state that each unit flicker cycle comprises ignition phase X and extinguishing stage Y, ignition phase X performance is that indicator light is bright, and the state extinguishing stage Y performance is that indicator light goes out.
The persistence of vision time due to human eye is approximately 1/24 second, is that tB is set to≤1/24 second persistence of vision time of human eye, makes the duration settings tB of each bit human eye can not differentiate the state of each bit, ensureing not discovered by human eye when there is error code.Unit flicker cycle M*tB is set to >=1/24 second persistence of vision time of human eye, is that the light on and off of indicator light are distinguished by human eye, there is flicker effect.
Bit map fixed-length cell, for according to described unit flicker cycle length M, determines the regular length of bit map, the aliquot described each unit flicker cycle length M of regular length of described bit map.
When determining the regular length of bit map, the least common multiple of each unit flicker cycle length M or the multiple of the least common multiple regular length as described bit map can be got.Preferably, adopt least common multiple as the regular length of bit map.
The grade of the unit flicker cycle of setting is more, and namely N is larger, and the regular length of described bit map is larger.
Bit map unit, for by same unit flicker cycle length M repeated arrangement to the regular length of bit map, form the bit map of corresponding N number of flicker grade.
Regular length due to bit map is the multiple of unit flicker cycle length, and forming corresponding bit map to each unit flicker cycle length M, is by same unit flicker cycle length M repeated arrangement, until take the regular length of described bit map.Corresponding to N number of different unit flicker cycle, the bit map of N number of flicker grade can be formed.
Described bit map with binary representation, bit value for " 1 " time output signal for lighting indicator light, when bit value be " 0 " output signal for extinguish indicator light, bit value when starting in described bit map with at the end of bit value contrary.The bit value of the beginning of described ignition phase X and the bit value of end are " 1 ", and all bit values of described extinguishing stage Y are " 0 ".
Regulon, for by selecting described bit map, regulates the flicker frequency of indicator light.
Described bit map exports as conditional code in the mode of Serial output, and the duration of each bit is tB, controls the blink states of indicator light.Owing to there being N number of different unit flicker cycle, to the bit map that should have N number of flicker grade, corresponding to N kind flicker frequency, control the flicker of indicator light.
When multiple port supported by needs, the duration that each bit exports is tB/ port sum.The duration tB of each bit such as set is 1/60 second, needs the port sum supported to be 30, and the duration that so now each bit exports will be reduced to 1/(60*30) second.Rely on latch to keep bit output value, for each LED, the duration that each bit exports is constant, remains 1/60 second.
The mode that the present invention adopts the selection of limited bit map to carry out flicker to control can also carry out brightness regulation.
The method of existing control indicator light brightness is by regulating the magnitude of voltage be carried on indicator light to realize, and often adopts hardware circuit to carry out regulating resistance partial pressure value.But in order to realize carrying out dynamic micro-adjustments by digital form, the design of its hardware circuit is comparatively complicated, single-chip microcomputer need be utilized to regulate numerical digit resistance or realized the adjustment of voltage by digital-to-analogue conversion (D/A) device, turn increasing cost simultaneously.
The mode that the present invention is then is " 0 " by arranging bit value at the interval, centre position of ignition phase X, carries out brightness regulation.Duration due to each bit is less than persistence of vision time of human eye, the time that " 0 " control indicator light that interval occurs goes out is too short, and human eye can not be discovered indicator light and go out, and only perceived brightness is dimmed, " 0 " that interval occurs is more frequent, and the brightness of indicator light is darker.Thus " 0 " that occurred by interval can carry out brightness regulation, sets different brightness degrees.
In an ethernet switch, usual each port has one or more LED as indicator light, the speed of the Link State of display port and receipts/literary composition of transmitting messages, the LED of each port can export serial presence code stream by Ethernet switching chip and control.By controlling LED flicker frequency and brightness, show different states.LED flicker speed can show the Link State of each port and the speed of receipts/literary composition of transmitting messages, and different LED brightness can adapt to the application of different occasion, such as, in machine room, does not need LED too bright, simultaneously also in order to reduce power consumption; And with switch out of doors, due to outdoor light, then need the brightness improving LED; When indoor, can also the lower Night of furnishing brightness, reduce the LED of glimmering and the rest of people, life are impacted.
In the present invention, it is adopt the mode of bit map to represent, in order to control brightness and the flicker frequency of LED that Ethernet switching chip exports the signal controlling LED.
From the above, the present invention controls brightness and the flicker frequency of indicator light by the selection of limited bit map, can not need voltage regulating device and frequency divider completely, simple, and along with the increase of indicator light quantity, its cost is changeless.
For convenience of description, various unit is divided into describe respectively with function when describing above device.Certainly, the function of each unit can be realized in same or multiple software and/or hardware when implementing the application.
As seen through the above description of the embodiments, those skilled in the art can be well understood to the mode that the application can add required general hardware platform by software and realizes.Based on such understanding, the technical scheme of the application can embody with the form of software product the part that prior art contributes in essence in other words, this computer software product can be stored in storage medium, as ROM/RAM, magnetic disc, CD etc., comprising some instructions in order to make a computer equipment (can be personal computer, server, or the network equipment etc.) perform the method described in some part of each execution mode of the application or execution mode.
Device embodiments described above is only schematic, the wherein said unit illustrated as separating component or can may not be and physically separates, parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of module wherein can be selected according to the actual needs to realize the object of present embodiment scheme.Those of ordinary skill in the art, when not paying creative work, are namely appreciated that and implement.
The application can be used in numerous general or special purpose computing system environment or configuration.Such as: personal computer, server computer, handheld device or portable set, laptop device, multicomputer system, system, set top box, programmable consumer-elcetronics devices, network PC, minicom, mainframe computer, the distributed computing environment (DCE) comprising above any system or equipment etc. based on microprocessor.
The application can describe in the general context of computer executable instructions, such as program module.Usually, program module comprises the routine, program, object, assembly, data structure etc. that perform particular task or realize particular abstract data type.Also can put into practice the application in a distributed computing environment, in these distributed computing environment (DCE), be executed the task by the remote processing devices be connected by communication network.In a distributed computing environment, program module can be arranged in the local and remote computer-readable storage medium comprising memory device.
Be to be understood that, although this specification is described according to execution mode, but not each execution mode only comprises an independently technical scheme, this narrating mode of specification is only for clarity sake, those skilled in the art should by specification integrally, technical scheme in each execution mode also through appropriately combined, can form other execution modes that it will be appreciated by those skilled in the art that.
A series of detailed description listed is above only illustrating for feasibility execution mode of the present invention; they are also not used to limit the scope of the invention, all do not depart from the skill of the present invention equivalent implementations done of spirit or change all should be included within protection scope of the present invention.

Claims (10)

1. an indicator light flash adjustment method, is characterized in that, comprising:
Set N number of unit flicker cycle, each unit flicker cycle is M*tB, wherein, tB is the duration of each bit, tB≤1/24 second, M is unit flicker cycle length, M*tB >=1/24 second, it is slower that described each unit flicker cycle M*tB=ignition phase X*tB+ extinguishes the larger flicker frequency of stage Y*tB, M;
According to described unit flicker cycle length M, determine the regular length of bit map, the aliquot each unit flicker cycle length M of regular length of described bit map;
By same unit flicker cycle length M repeated arrangement to the regular length of bit map, form the bit map of corresponding N number of flicker grade;
By selecting described bit map, regulate the flicker frequency of indicator light.
2. control method according to claim 1, is characterized in that, described bit map is with binary representation, and bit value lights indicator light for time " 1 ", extinguishes indicator light when bit value is " 0 ".
3. control method according to claim 2, is characterized in that, the bit value of beginning and the bit value of end of the ignition phase X of described each unit flicker cycle are " 1 ", and all bit values of described extinguishing stage Y are " 0 ".
4. control method according to claim 3, is characterized in that, the bit value interval being positioned at centre position in described ignition phase X is set to " 0 ", and " 0 " that occurred by interval regulates the brightness of indicator light.
5. control method according to claim 1, is characterized in that, the duration tB of described each bit is 1/60 second.
6. control method according to claim 1 or 5, it is characterized in that, this control method supports that multiple port exports, and the duration that now each bit exports is tB/port sum.
7. an indicator light flash adjustment device, is characterized in that, described adjusting device comprises:
Unit flicker cycle unit, for setting N number of unit flicker cycle, each unit flicker cycle is M*tB, wherein, tB is the duration of each bit, tB≤1/24 second, M is unit flicker cycle length, M*tB >=1/24 second, it is slower that described each unit flicker cycle M*tB=ignition phase X*tB+ extinguishes the larger flicker frequency of stage Y*tB, M;
Bit map fixed-length cell, for according to described unit flicker cycle length M, determines the regular length of bit map, the aliquot each unit flicker cycle length M of regular length of described bit map;
For by same unit flicker cycle length M repeated arrangement to the regular length of bit map, form the unit of the bit map of corresponding N number of flicker grade;
For by selecting described bit map, regulate the unit of the flicker frequency of indicator light.
8. adjusting device according to claim 7, is characterized in that, described bit map is with binary representation, and bit value lights indicator light for time " 1 ", extinguishes indicator light when bit value is " 0 ".
9. adjusting device according to claim 8, is characterized in that, the bit value of beginning and the bit value of end of the ignition phase X of described each unit flicker cycle are " 1 ", and all bit values of described extinguishing stage Y are " 0 ".
10. adjusting device according to claim 9, is characterized in that, the bit value interval being positioned at centre position in described ignition phase X is set to " 0 ", and " 0 " that occurred by interval regulates the brightness of indicator light.
CN201110237691.3A 2011-08-18 2011-08-18 Method and device for regulating flicker of indicator lamps Active CN102958220B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110237691.3A CN102958220B (en) 2011-08-18 2011-08-18 Method and device for regulating flicker of indicator lamps

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110237691.3A CN102958220B (en) 2011-08-18 2011-08-18 Method and device for regulating flicker of indicator lamps

Publications (2)

Publication Number Publication Date
CN102958220A CN102958220A (en) 2013-03-06
CN102958220B true CN102958220B (en) 2015-04-22

Family

ID=47766253

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110237691.3A Active CN102958220B (en) 2011-08-18 2011-08-18 Method and device for regulating flicker of indicator lamps

Country Status (1)

Country Link
CN (1) CN102958220B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105321527B (en) * 2014-06-26 2019-07-19 广东美的制冷设备有限公司 Terminal operating environment reminding method and system
CN105611682A (en) * 2014-11-24 2016-05-25 中兴通讯股份有限公司 Method and device for controlling indication lamps
CN109275220B (en) * 2017-07-17 2022-03-22 迈普通信技术股份有限公司 LED lamp control method, device, control device and computer readable storage medium
CN113180347B (en) * 2021-05-06 2024-01-26 湖北爱微迈智能科技有限责任公司 Colorful precious stone system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1802065A (en) * 2006-01-23 2006-07-12 北京飞天诚信科技有限公司 Respiration lamp controlling method and its device
CN1842238A (en) * 2005-03-31 2006-10-04 华为技术有限公司 Signal lamp flashing controlling method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4480828B2 (en) * 1999-12-28 2010-06-16 アビックス株式会社 Linear illumination system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1842238A (en) * 2005-03-31 2006-10-04 华为技术有限公司 Signal lamp flashing controlling method
CN1802065A (en) * 2006-01-23 2006-07-12 北京飞天诚信科技有限公司 Respiration lamp controlling method and its device

Also Published As

Publication number Publication date
CN102958220A (en) 2013-03-06

Similar Documents

Publication Publication Date Title
US8587212B2 (en) Lighting system, dimming control apparatus and dimming control method
CN109892016B (en) Light emitting diode controller, lighting control system and method for lighting control
CN102958220B (en) Method and device for regulating flicker of indicator lamps
JP2015228372A (en) Method and apparatus for operating high-power led group
CN102215622A (en) Power control device for LED lighting and lighting system
CN111246628A (en) Control method, device, equipment and storage medium for optical module indicator lamp
CN103945617B (en) A kind of LED guardrail tube control circuit and device
CN102573184B (en) Lighting fixture control chip, device, system as well as addressing method thereof
CN106804081B (en) Light adjusting circuit and dimming controlling method
CN202383979U (en) Led display system
CN203775483U (en) Intelligent LED light modulator based on KNX bus
CN106817805A (en) Indicate lamp control method and device
EP2154934B1 (en) Method for adjusting brightness of light sources
CN110769545A (en) LED lamp, and system and method for adjusting brightness of LED lamp
CN108882435B (en) Circuit capable of realizing continuous dimming without stroboflash
CN204795797U (en) LED backlight controller
CN212157841U (en) Control device of indicator lamp and electrical equipment
CN201374864Y (en) Electronic ballast with switching-type light adjusting framework
CN1722926A (en) The intelligent type LED controlling system and method
CN104955223A (en) Digital tube display LED shadowless lamp circuit with double dimming function
EP2587897A1 (en) Controller for a fluorescent lamp
CN210053622U (en) Digital dimming system
JP2012221627A (en) Lighting control system
CN104470136A (en) Tunnel lamp control system
Zhang et al. Research on DALI and Development of Master-Slave module

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP03 Change of name, title or address
CP03 Change of name, title or address

Address after: 215000 unit 13 / 16, 4th floor, building B, No.5 Xinghan street, Suzhou Industrial Park, Jiangsu Province

Patentee after: Suzhou Shengke Communication Co.,Ltd.

Address before: 215021 unit 13 / 16, floor 4, building B, No. 5, Xinghan street, Suzhou Industrial Park, Suzhou, Jiangsu

Patentee before: CENTEC NETWORKS (SU ZHOU) Co.,Ltd.