CN102841808B - The enhancing efficiency method and its computer system of computer system - Google Patents
The enhancing efficiency method and its computer system of computer system Download PDFInfo
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- CN102841808B CN102841808B CN201110167464.8A CN201110167464A CN102841808B CN 102841808 B CN102841808 B CN 102841808B CN 201110167464 A CN201110167464 A CN 201110167464A CN 102841808 B CN102841808 B CN 102841808B
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Abstract
The enhancing efficiency method and its computer system of a kind of computer system, suitable for multi-core processing unit, its step includes a plurality of cores (Cores) working condition that multi-core processing unit chip is detected with a detecting unit, and the working condition for transmitting core sets the core number to be closed to administrative unit, and by administrative unit.Then, administrative unit transmission one sets command to multi-core processing unit, and closes one first group of core of idle state.
Description
【Technical field】
The present invention is particularly a kind of for computer system on a kind of method and system for managing multi-core processing unit
Enhancing efficiency method and its computer system.
【Background technology】
Desktop computer and other data processing systems generally all include CPU (CPU), to carry out arithmetic
Computing, logical operation, control function and the processing of other data, and be that processor is intensive for current many computer applications, such as
Three-dimensional (3D) scene is drawn, in three-dimensional (3D) image processing, because the description of each image object is all comprising hundreds of or thousands of
The combination of pel represents, to reach image instantaneity and integrality, must at the appointed time limit in pel is defined, positioned,
Textures, coloring, drawing, its amount of calculation can be out of CPU (CPU) disposal abilities.
To reduce the load of CPU (CPU), and processing speed is lifted, specific function processing unit is used for auxiliary
Help CPU (CPU) to handle complex and instantaneity data, be have the characteristics of specific function processing unit
A plurality of cores (Cores), information can be imported simultaneously and carries out calculation process, such as graphics processing unit (GPU) while import figure
First information enters a plurality of cores and carries out computing, can meet the demand of instantaneity and integrality, therefore such multi-core is handled
Unit starts to apply in personal computer system, and uses the CPU (CPU) of unitary core processing originally in recent years
Also start the framework of development multi-core, use lifting processing speed and operation efficiency.
The efficiency of multi-core processing unit depends on working frequency, and the working frequency of overall multi-core processing unit is then
The trouble free service frequency for detecting whole cores takes operating frequency value of the minimum as entirety, therefore just by and large, multi-core
The executable working frequency of the core of processing unit thereon is all higher than the working frequency arranged, but because the limit of chip management system
System, multi-core processing unit can not be promoted to higher working frequency.
In addition, in the execution of most applications, the demand of information processing is not so huge, therefore part multinuclear
Core on heart processing unit is to be in idle state, does not carry out computing, and different is unfortunate.
【The content of the invention】
In view of the above problems, the invention reside in provide a computer system enhancing efficiency method and its computer system, by
To solve to commonly use the core that multi-core processing unit can not be promoted on higher working frequency and part multi-core processing unit
The problem of often in idle state.
The invention discloses the enhancing efficiency method of computer system through detecting unit detecting multi-core processing unit chip
The operating state of upper a plurality of cores (Cores), and be converted to a status command signal and be sent to administrative unit, then with administrative unit
The such core amounts to be closed are set, and are converted to a setting signal.Administrative unit transmission setting signal at most core processing
Unit chip, close one first group of core in idle state.
The invention discloses computer system include a multi-core processing unit, a detecting unit and an administrative unit, wherein
Detecting unit is electrically connected with multi-core processing unit, and administrative unit is electrically connected with multi-core processing unit and detecting unit.Detect
The working condition of a plurality of cores of unit detecting multi-core processing unit is surveyed, and is converted to a status command signal and is sent to management
Unit.Administrative unit sets the core amounts to be closed according to status command signal, and is converted to a setting signal and is sent to multi-core
Processing unit, to close one first group core of the working condition as idle state.
The effect of of the invention, is, is closed the core in idle state of multi-core processing unit through detecting mode
Close, to improve the working frequency of multi-core processing unit chip, and then lift the overall operation efficiency of computer system, reach performance
Optimized purpose.
Feature, implementation and effect for the present invention, schema is hereby coordinated to make most preferred embodiment detailed description as follows.
【Brief description of the drawings】
Fig. 1 is the schematic diagram of the computer system of the present invention.
Fig. 2 is the method implementation steps flow chart according to the present invention.
Fig. 3 is the step flow chart that the detecting unit of the present invention is detected.
Fig. 4 is that the flow chart of kernel instruction is closed in the administrative unit setting of the present invention.
Fig. 5 is the schematic diagram for closing idle core according to setting instruction according to multi-core processing unit of the present invention.
【Embodiment】
Fig. 1 is the schematic diagram according to the computer system of the present invention, and the system 1 has an at least multi-core processing unit 10,
One detecting unit 20 and an administrative unit 30, detecting unit 20 are electrically connected with multi-core processing unit 10.In addition, administrative unit
30 are electrically connected with multi-core processing unit 10 and detecting unit 20 respectively, and administrative unit 30 includes a display module 301 and one
Set module 302.
Fig. 2 is the method implementation steps flow chart according to the present invention, and first, the system 1 is detected more through detecting unit 20
The working condition of a plurality of cores on core processing unit 10, its detecting flow process please coordinate the contained step flows of Fig. 3 simultaneously.
Detecting unit 20 first determines whether a plurality of cores have one first group of core 101 on multi-core processing unit 10
For idle state and to have one second group of core be operating state, is such as no, then waits a circulation time, such as 5 seconds, then carry out
Detecting, right those skilled in the art, corresponding according to actual design demand it can adjust circulation time value；As being yes, then detecting is single
Member 20 calculates the overall work frequency of current multi-core processing unit 10, and detects on the chip of multi-core processing unit 10 first group
Core 101, and the number and numbering of second group of core.Detecting result is converted into a status command signal by detecting unit 20, and is passed
Deliver to administrative unit 30.
Display module 301 in administrative unit 30 receives the status command signal that detecting unit 20 is transmitted, and corresponding display
First group of core 101, second groups of kernel states and numberings of the core of multi-core processing unit 10.Setting module 302 includes two kinds
Setting pattern, the first setting pattern and the second setting pattern, setting module 302 can individually operate any setting pattern,
Or offer user selects a setting pattern and set, and is not limited thereto.
The step flow of kernel instruction, display of the user in administrative unit 30 are closed in the setting that please also refer to Fig. 4
Module 301 obtains the information of detecting, and the instruction of core is closed through the setting setting of module 302, and setting module 302 provides two kinds
Set model selection：First setting pattern and the second setting pattern.
First set pattern as：The core number to be closed and numbering may be selected in user, and produces one and close core
Instruction；Second set pattern as：One default working frequency of user's setting, is calculated by setting module 302 and is intended to reach this work frequency
Rate must close core number, by administrative unit 30 produce close core instruction.Administrative unit 30, which produces, closes a core
Instruction, be converted into a setting signal, and be sent to multi-core processing unit 10, multi-core processing unit 10 is according to setting signal
Working condition corresponding to closing is first group of idle core 101.
Fig. 5 is to close working condition as first group of idle core according to instruction is set according to multi-core processing unit of the present invention
The schematic diagram of the heart.When it is first group of idle core 101 that multi-core processing unit 10, which closes work clothes state, because of overall multi-core
The working frequency of processing unit 10 takes operating frequency value of the minimum as entirety to detect the trouble free service frequency of whole cores,
When the core number of unlatching is reduced, multi-core processing unit chip can detect work of the new trouble free service frequency values as entirety again
Working frequency value, therefore the operating frequency value of multi-core processing unit 10 will improve, and and then lifting efficiency.
Although embodiments of the invention are disclosed above described, the present invention is so not limited to, it is any to be familiar with related art techniques
Person, without departing from the spirit and scope of the present invention, such as according to the shape described in the present patent application scope, construction, feature and number
Amount, which is worked as, can do a little change, therefore the scope of patent protection of the present invention must regard claim institute circle appended by this specification
The person of determining is defined.
Claims (6)
1. a kind of enhancing efficiency method of computer system, it is characterised in that comprise the following steps：
The working condition of a plurality of cores of a multi-core processing unit is detected with a detecting unit, and is converted to state news
Number；
The detecting unit transmits the status command signal to an administrative unit；
The such core amounts to be closed are set with the administrative unit, and are converted to a setting signal；And
The administrative unit transmits the setting signal to the multi-core processing unit, and it is one to close the working condition in such core
One first group of core of idle state；
The multi-core processing unit detects the trouble free service frequency of whole cores again, takes minimum single as multi-core processing
The working frequency of member；
The step of wherein detecting the working condition of such core of the multi-core processing unit, further includes：
The detecting unit judge such core whether there is for idle state first group of core and be the one of operating state
Second group of core, waits a circulation time if not, and the detecting unit performs cycle criterion, if it is, the detecting unit calculates
One operating frequency value of such core；And
The detecting unit detects first group of core of the multi-core processing unit and the quantity and numbering of second group of core；
Wherein transmitting the status command signal to the step of administrative unit further includes：
The detecting unit transmits first group of core of the multi-core processing unit and the quantity of second group of core, numbering and is somebody's turn to do
Working frequency is to the administrative unit；
The step of wherein setting the such core amounts to be closed with the administrative unit further includes：
With a default working frequency for setting the module sets multi-core processing unit；
The administrative unit presets working frequency according to this and calculates the such core amounts to be closed；And
First group of core is selectively closed off with the setting module.
A 2. computer system, it is characterised in that include：
One multi-core processing unit, includes a plurality of cores；
One detecting unit, the multi-core processing unit is electrically connected with, the detecting unit detects the working condition of such core, and turns
A status command signal is changed to, wherein, the working condition that the detecting unit detects such core further comprises：The detecting unit judges
Such core whether there is be one first group of core of idle state and be operating state one second group of core, if not etc.
A circulation time is waited, the detecting unit performs cycle criterion, if it is, the detecting unit calculates a working frequency of such core
Value；And the detecting unit detects first group of core of the multi-core processing unit and the quantity and volume of second group of core
Number；And
One administrative unit, the multi-core processing unit and the detecting unit being electrically connected with, the administrative unit receives the status command signal,
And the such core amounts to be closed are set according to the status command signal, and be converted to a setting signal；
Wherein, the administrative unit transmits the setting signal to the multi-core processing unit, idle as one to close the working condition
At least the one of the state core, the multi-core processing unit detect the trouble free service frequency of whole cores, take minimum to make again
For the working frequency of the multi-core processing unit；The administrative unit is pre- with the one of a setting module sets multi-core processing unit
If working frequency；The administrative unit presets working frequency according to this and calculates the such core amounts to be closed；And with the setting
Module selectively closes off first group of core.
3. computer system according to claim 2, it is characterised in that wherein the administrative unit includes：
One display module, the status command signal of reception, and the display module correspondingly shows the operating state of such core, the spare time
Configuration state and the numbering；And
One setting module, is selectively closed off at least the one of the idle state core.
4. computer system according to claim 3, it is characterised in that wherein the setting module further includes：
One first setting pattern, to select the core in the idle state to be closed to number, and be converted to setting news
Number.
5. computer system according to claim 3, it is characterised in that wherein the setting module further includes：
One second setting pattern, to set a default working frequency, the second setting pattern presets working frequency meter according to this
The core amounts of closing needed for calculating simultaneously are converted to the setting signal.
6. computer system according to claim 3, it is characterised in that wherein the setting module further includes：
One first setting pattern, to select the core in the idle state to be closed to number, and be converted to setting news
Number；And
One second setting pattern, to set a default working frequency, the second setting pattern receives a setting value, pre- according to this
If working frequency calculates the required core amounts closed and is converted to the setting signal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110167464.8A CN102841808B (en) | 2011-06-21 | 2011-06-21 | The enhancing efficiency method and its computer system of computer system |
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| CN201110167464.8A CN102841808B (en) | 2011-06-21 | 2011-06-21 | The enhancing efficiency method and its computer system of computer system |
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| CN102841808A CN102841808A (en) | 2012-12-26 |
| CN102841808B true CN102841808B (en) | 2017-12-08 |
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| CN105068871B (en) | 2015-07-28 | 2018-12-21 | 深圳市万普拉斯科技有限公司 | The control method and device of calculation resources |
| CN105718318B (en) * | 2016-01-27 | 2019-12-13 | 戴西(上海)软件有限公司 | Integrated scheduling optimization method based on auxiliary engineering design software |
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| CN101436098A (en) * | 2008-12-24 | 2009-05-20 | 华为技术有限公司 | Method and apparatus for reducing power consumption of multiple-core symmetrical multiprocessing system |
| CN101751113A (en) * | 2008-10-17 | 2010-06-23 | 环旭电子股份有限公司 | Energy-saving management system and method of server |
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| CN1225681C (en) * | 2003-01-07 | 2005-11-02 | 纬创资通股份有限公司 | Computer system capable of switching working frequency and its switching method |
| US7861068B2 (en) * | 2006-03-07 | 2010-12-28 | Intel Corporation | Method and apparatus for using dynamic workload characteristics to control CPU frequency and voltage scaling |
| CN102096461B (en) * | 2011-01-13 | 2013-06-19 | 浙江大学 | Energy-saving method of cloud data center based on virtual machine migration and load perception integration |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1641534A (en) * | 2004-01-13 | 2005-07-20 | Lg电子株式会社 | Apparatus for controlling power of processor having a plurality of cores and control method of the same |
| CN101111814A (en) * | 2004-12-30 | 2008-01-23 | 英特尔公司 | Operating point management in multi-core architectures |
| CN101751113A (en) * | 2008-10-17 | 2010-06-23 | 环旭电子股份有限公司 | Energy-saving management system and method of server |
| CN101436098A (en) * | 2008-12-24 | 2009-05-20 | 华为技术有限公司 | Method and apparatus for reducing power consumption of multiple-core symmetrical multiprocessing system |
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