CN102800626A - Method for preparing dielectric film on dual damascene structure through etching forming process - Google Patents
Method for preparing dielectric film on dual damascene structure through etching forming process Download PDFInfo
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- CN102800626A CN102800626A CN201210293370XA CN201210293370A CN102800626A CN 102800626 A CN102800626 A CN 102800626A CN 201210293370X A CN201210293370X A CN 201210293370XA CN 201210293370 A CN201210293370 A CN 201210293370A CN 102800626 A CN102800626 A CN 102800626A
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- dielectric film
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- photoresistance
- contact hole
- etching
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Abstract
The invention relates to a method for preparing a dielectric film on a dual damascene structure through the etching forming process, which comprises the following execution steps of: (S1) providing a dielectric substrate, and forming a dielectric film on the dielectric substrate; (S2) deeply coating a first photoresist layer different from the surface of the dielectric substrate on an upper overlying layer of the dielectric film, forming the contact hole pattern through exposure and development, and further preparing the contact hole through the etching forming process; (S3) coating a second photoresist layer on the dielectric film with the contact hole; and (S4) coating a third photoresist layer on the second photoresist layer, forming the groove pattern through exposure and development, and preparing the groove through the etching forming process. With the method for preparing a dielectric film on a dual damascene structure through the etching forming process, not only can the production capacity of equipment be increased and equipment loss is reduced, but also the production process is optimized, the production efficiency is increased, and the production cost is lowered.
Description
Technical field
The present invention relates to technical field of semiconductor device, relate in particular to a kind of method of double damask structure dielectric film etching moulding process.
Background technology
At present, adopt the dielectric film etching moulding process of double damask structure to be generally VFTL (Via First Trench Last, VFTL) technology in the copper wiring technique field.
See also Fig. 6 (a), Fig. 6 (b), Fig. 7, the said VFTL technology of Fig. 8 comprises three segment process:
First segment process: first contact hole, 2 exposure imagings and etching moulding process; Particularly, on said first etching barrier layer 21, deposit first dielectric constant film 22, dielectric buffer layer 23 successively, and overlying strata 24, and exposure, development photoresist layer 25, said first contact hole pattern 26 obtained.
Second segment process: photoresist 3 coatings and time carving technology;
The 3rd segment process: interconnection channel 4 exposure imagings and etching moulding process.
See also Fig. 9, shown in Figure 9 for having the vertical view after the technology etching finishes now.
Apparently; The double damask structure that said traditional handicraft preparation has first contact hole 2 and said interconnected groove 4 need carry out Twi-lithography technology and three dry carving technologies, and need carry out necessary chip back surface cleaning in said photoresist 3 coatings with after returning carving technology for the class of pollution of improving wafer.Said conventional process flow is numerous and diverse, operation is consuming time, and reduces the production capacity of production process of semiconductor board, and inefficiency finally causes expensive semiconductor production equipment cost performance on the low side, and production cost strengthens, the development of restriction semi-conductor industry.How can reasonably production link be optimized, and reduce production costs significantly, can enhance productivity simultaneously is industry problem demanding prompt solution.
So to the problem that prior art exists, this case designer relies on the industry experience for many years of being engaged in, the active research improvement is so there has been the method for inventing a kind of double damask structure dielectric film etching moulding process.
Summary of the invention
The present invention be directed in the prior art; Traditional double damask structure need carry out Twi-lithography technology and three dry carving technologies, and need carry out necessary chip back surface cleaning in said photoresist coating with after returning carving technology for the class of pollution of improving wafer, and said conventional process flow is numerous and diverse, operation is consuming time; And the production capacity of reduction production process of semiconductor board; Inefficiency finally causes expensive semiconductor production equipment cost performance on the low side, and production cost strengthens; Limit the defectives such as development of semi-conductor industry, a kind of method of double damask structure dielectric film etching moulding process is provided.
In order to address the above problem, the present invention provides a kind of method of double damask structure dielectric film etching moulding process, and said method comprises:
Execution in step S1: the dielectric material substrate is provided, and on said dielectric material substrate, forms said dielectric film, said dielectric film outwards comprises low dielectric constant films, dielectric buffer layer, overlying strata successively from said dielectric material substrate;
Execution in step S2: heavy first photoresistance that applies on the surface that differs from said dielectric material substrate of the overlying strata of said dielectric film, and exposure, developing forms said contact hole pattern, and then through the said contact hole of etching moulding prepared;
Execution in step S3: have coating second photoresistance on the dielectric film of said contact hole;
Execution in step S4: on said second photoresistance, apply the 3rd photoresistance, and the said channel patterns of formation that makes public, develops, and then through the said groove of etching moulding prepared.
Optional, between said dielectric material substrate and the said low dielectric constant films etching barrier layer is set.
Optional, said second photoresistance is not damaged in said the 3rd photoresistance forms the exposure, developing process of channel patterns.
Optional, the control of the said second photoresistance coating process includes but not limited to said resistance material, spin speed and temperature.
Optional, said etching barrier layer is the carborundum that nitrogen mixes.
Optional, said dielectric constant film is a silicon dioxide.
Optional, said dielectric buffer layer is a silicon nitride.
Optional, said overlying strata is a silicon dioxide.
In sum, the method through double damask structure dielectric film etching moulding process according to the invention not only can improve equipment capacity, and the consume of minimizing equipment, and optimization production technology are enhanced productivity, and reduction produces.
Description of drawings
Shown in Figure 1 for the method flow diagram of double damask structure dielectric film etching moulding process of the present invention;
Fig. 2 (a) is depicted as the structural representation that deposits said dielectric film on the dielectric material substrate according to the invention and form said contact hole pattern;
Fig. 2 (b) is depicted as the structural representation that deposits said dielectric film on the dielectric material substrate according to the invention and form said contact hole;
Shown in Figure 3 is the structural representation with dielectric film surface-coated second photoresistance of contact hole according to the invention;
Shown in Figure 4 is the structural representation that applies the 3rd photoresistance on second photoresistance according to the invention and form channel patterns;
Shown in Figure 5 is the sketch map with said double damask structure of contact hole and groove according to the invention;
Fig. 6 (a) is depicted as the structural representation of first contact hole graph in the existing technology;
Fig. 6 (b) is depicted as the structural representation of first contact hole in the existing technology;
Structural representation for photoresist coating in the existing technology shown in Figure 7;
Shown in Figure 8 is the structural representation that photoresist returns quarter in the existing technology;
Shown in Figure 9 for having the vertical view after the technology etching finishes now.
Embodiment
By the technology contents, the structural feature that specify the invention, reached purpose and effect, will combine embodiment and conjunction with figs. to specify below.
See also Fig. 1, shown in Figure 1 for the method flow diagram of double damask structure dielectric film etching moulding process of the present invention.The method of said double damask structure dielectric film etching moulding process may further comprise the steps:
Execution in step S1: the dielectric material substrate is provided, and on said dielectric material substrate, forms said dielectric film; Said dielectric film outwards comprises low dielectric constant films, dielectric buffer layer, overlying strata successively from said dielectric material substrate.In the present invention, preferred, between said dielectric material substrate and the said low dielectric constant films etching barrier layer is set.
Execution in step S2: contact hole exposure, development, etching moulding; Heavy first photoresistance that applies on the surface that differs from said dielectric material substrate of the overlying strata of said dielectric film, and exposure, developing forms said contact hole pattern, and then through the said contact hole of etching moulding prepared.
Execution in step S3: have coating second photoresistance on the dielectric film of said contact hole, the control of the said second photoresistance coating process includes but not limited to said resistance material, spin speed and temperature;
Execution in step S4: on said second photoresistance, apply the 3rd photoresistance, and the said channel patterns of formation that makes public, develops, and then through the said groove of etching moulding prepared; Said second photoresistance is not damaged in said the 3rd photoresistance forms the exposure, developing process of channel patterns.
See also Fig. 2 (a), Fig. 2 (b), Fig. 3, Fig. 4, Fig. 5, and combine to consult Fig. 1, Fig. 2 (a) is depicted as the said dielectric film of deposition on the dielectric material substrate according to the invention and forms the structural representation of said contact hole pattern.Fig. 2 (b) is depicted as the structural representation that deposits said dielectric film on the dielectric material substrate according to the invention and form said contact hole.Shown in Figure 3 is the structural representation with dielectric film surface-coated second photoresistance of contact hole according to the invention.Shown in Figure 4 is the structural representation that applies the 3rd photoresistance on second photoresistance according to the invention and form channel patterns.Shown in Figure 5 is the sketch map with said double damask structure of contact hole and groove according to the invention.Among the present invention, the method for said double damask structure dielectric film etching moulding process may further comprise the steps:
Execution in step S1: dielectric material substrate (not shown) is provided, and on said dielectric material substrate, forms said dielectric film 1; Said dielectric film 1 outwards comprises low dielectric constant films 11, dielectric buffer layer 12, overlying strata 13 successively from said dielectric material substrate.
In the present invention, preferred, between said dielectric material substrate and the said low dielectric constant films 11 etching barrier layer 10 is set.The carborundum that said etching barrier layer 10 mixes for nitrogen.Said dielectric constant film 11 is a silicon dioxide.Said dielectric buffer layer 12 is a silicon nitride.Said overlying strata 13 is a silicon dioxide.
Execution in step S2: contact hole 14 exposures, development, etching moulding; Heavy first photoresistance 15 that applies on the surface that differs from said dielectric material substrate of the overlying strata 13 of said dielectric film 1; And the said contact hole pattern 141 of formation that makes public, develops; And then through the said contact hole 14 of etching moulding prepared, said etching technics stops on the said etching barrier layer 10.
Execution in step S3: coating second photoresistance 16 on the dielectric film with said contact hole 10 1, the coating process governing factor of said second photoresistance 16 includes but not limited to material, spin speed and the temperature of said second photoresistance 16;
Execution in step S4: on said second photoresistance 16, apply the 3rd photoresistance 17, and the said channel patterns 18 of formation that makes public, develops, and then through the said groove 181 of etching moulding prepared; Said second photoresistance 16 is not damaged in said the 3rd photoresistance 17 forms the exposure, developing process of channel patterns 18.
Significantly, the method through double damask structure dielectric film etching moulding process according to the invention prepares said double damask structure with contact hole and through hole and only need carry out Twi-lithography and twice etching technology among step S2 and the step S4.Compare with existing technological process, the method for double damask structure dielectric film etching moulding process according to the invention can effectively reduce the photoetching process number of times, reduces production costs.In addition, use the method for double damask structure dielectric film etching moulding process of the present invention can save that photoresist returns necessary chip back surface cleaning in the carving technology in the traditional handicraft, enhance productivity.
In sum, the method for double damask structure dielectric film etching moulding process according to the invention not only can improve equipment capacity, and the consume of minimizing equipment, and optimization production technology are enhanced productivity, and reduce production costs.
Those skilled in the art all should be appreciated that, under the situation that does not break away from the spirit or scope of the present invention, can carry out various modifications and modification to the present invention.Thereby, if when any modification or modification fall in the protection range of appended claims and equivalent, think that the present invention contains these modifications and modification.
Claims (8)
1. the method for a double damask structure dielectric film etching moulding process is characterized in that said method comprises:
Execution in step S1: the dielectric material substrate is provided, and on said dielectric material substrate, forms said dielectric film, said dielectric film outwards comprises low dielectric constant films, dielectric buffer layer, overlying strata successively from said dielectric material substrate;
Execution in step S2: heavy first photoresistance that applies on the surface that differs from said dielectric material substrate of the overlying strata of said dielectric film, and exposure, developing forms said contact hole pattern, and then through the said contact hole of etching moulding prepared;
Execution in step S3: have coating second photoresistance on the dielectric film of said contact hole;
Execution in step S4: on said second photoresistance, apply the 3rd photoresistance, and the said channel patterns of formation that makes public, develops, and then through the said groove of etching moulding prepared.
2. the method for double damask structure dielectric film etching moulding process as claimed in claim 1 is characterized in that, between said dielectric material substrate and the said low dielectric constant films etching barrier layer is set.
3. the method for double damask structure dielectric film etching moulding process as claimed in claim 1 is characterized in that, said second photoresistance is not damaged in said the 3rd photoresistance forms the exposure, developing process of channel patterns.
4. the method for double damask structure dielectric film etching moulding process as claimed in claim 3 is characterized in that the control of the said second photoresistance coating process includes but not limited to said resistance material, spin speed and temperature.
5. the method for double damask structure dielectric film etching moulding process as claimed in claim 1 is characterized in that, said etching barrier layer is the carborundum that nitrogen mixes.
6. the method for double damask structure dielectric film etching moulding process as claimed in claim 1 is characterized in that said dielectric constant film is a silicon dioxide.
7. the method for double damask structure dielectric film etching moulding process as claimed in claim 1 is characterized in that said dielectric buffer layer is a silicon nitride.
8. the method for double damask structure dielectric film etching moulding process as claimed in claim 1 is characterized in that said overlying strata is a silicon dioxide.
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| CN201210293370XA CN102800626A (en) | 2012-08-16 | 2012-08-16 | Method for preparing dielectric film on dual damascene structure through etching forming process |
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| CN201210293370XA CN102800626A (en) | 2012-08-16 | 2012-08-16 | Method for preparing dielectric film on dual damascene structure through etching forming process |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103904024A (en) * | 2012-12-26 | 2014-07-02 | 第一毛织株式会社 | Method for forming a dual damascene structure of a semiconductor device, and a semiconductor device therewith |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6319809B1 (en) * | 2000-07-12 | 2001-11-20 | Taiwan Semiconductor Manfacturing Company | Method to reduce via poison in low-k Cu dual damascene by UV-treatment |
| TW465106B (en) * | 1999-12-03 | 2001-11-21 | Lucent Technologies Inc | Methods for fabricating a multilevel interconnection for an integrated circuit device utilizing a selective overlayer |
| US20030032274A1 (en) * | 2000-12-26 | 2003-02-13 | Daniels Brian J. | Method for eliminating reaction between photoresist and OSG |
| US20050170625A1 (en) * | 2004-01-29 | 2005-08-04 | Chartered Semiconductor Manufacturing Ltd. | Novel method to control dual damascene trench etch profile and trench depth uniformity |
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2012
- 2012-08-16 CN CN201210293370XA patent/CN102800626A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW465106B (en) * | 1999-12-03 | 2001-11-21 | Lucent Technologies Inc | Methods for fabricating a multilevel interconnection for an integrated circuit device utilizing a selective overlayer |
| US6319809B1 (en) * | 2000-07-12 | 2001-11-20 | Taiwan Semiconductor Manfacturing Company | Method to reduce via poison in low-k Cu dual damascene by UV-treatment |
| US20030032274A1 (en) * | 2000-12-26 | 2003-02-13 | Daniels Brian J. | Method for eliminating reaction between photoresist and OSG |
| US20050170625A1 (en) * | 2004-01-29 | 2005-08-04 | Chartered Semiconductor Manufacturing Ltd. | Novel method to control dual damascene trench etch profile and trench depth uniformity |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103904024A (en) * | 2012-12-26 | 2014-07-02 | 第一毛织株式会社 | Method for forming a dual damascene structure of a semiconductor device, and a semiconductor device therewith |
| CN103904024B (en) * | 2012-12-26 | 2016-09-07 | 第一毛织株式会社 | The method forming the dual-damascene structure of semiconductor devices and the semiconductor devices being produced from |
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Application publication date: 20121128 |