CN102780487A - Built-in self-test circuit for voltage controlled oscillators - Google Patents

Abstract

A built-in self-test circuit for testing a voltage controlled oscillator comprises a voltage controlled oscillator, a buffer having an input coupled to an output of the voltage controlled oscillator and a radio frequency peak detector coupled to the output of the buffer. The radio frequency peak detector is configured to receive an AC signal from the voltage controlled oscillator and generate a DC value proportional to the AC signal at an output of the radio frequency peak detector. Furthermore, the output of the radio frequency peak detector generates a DC value proportional to an amplitude of the AC signal from the voltage controlled oscillator when the voltage controlled oscillator functions correctly. On the other hand, the output of the radio frequency peak detector is at zero volts when the voltage controlled oscillator fails to generate an AC signal.

Description

The built-in self slowdown monitoring circuit that is used for voltage controlled oscillator

Technical field

The present invention relates to be used for the built-in self slowdown monitoring circuit of voltage controlled oscillator.

Background technology

In radio circuit, for example, receiver or transceiver, (VCO) is used for frequency synthesizer with voltage controlled oscillator, thereby radiofrequency signal is carried out down conversion or frequency up-conversion.Frequency synthesizer can comprise: oscillator, be designed to come control frequency by the voltage that receives, and this voltage is generated by the frequency synthesizer controls system, and this control system is formed by frequency divider, frequency and phase detectors, charge pump and low pass filter.In the frequency synthesizer controls system, the output of frequency divider and the reference signal at frequency and phase detectors place are compared.The output of frequency and phase detectors is connected to low pass filter, and further is connected to oscillator.As a result, in response to the voltage from low pass filter, oscillator generates the signal of expectation.

In the technology of making semiconductor chip, can on wafer, set up a plurality of VCO circuit.In order to detect the fault voltage controlled oscillator of wafer, during the different phase of making semiconductor device, adopt various testing circuits to detect voltage controlled oscillator.Have two kinds of main types: the semiconductor of implementing in wafer scale detects and detects at the semiconductor that package level is implemented.The favorable characteristics of wafer-level test is: the wafer scale product test helps to reduce packaging cost and improves rate of finished products.

Can use probe testing device or built-in self slowdown monitoring circuit to implement wafer scale detects.Probe testing device can comprise: various probes.Can in the various probes each be connected to the testing weld pad on the wafer that will detect.Probe testing device generates test signal, and reads testing result from the probe that is connected to the testing weld pad on the wafer.If a circuit module on the wafer is not worked or its result exceeds the circuit module predetermined restricted, then probe testing device can find this fault through the result from the probe that is connected to the faulty circuit module.Through adopting probe testing device, can find the faulty circuit module, thereby make this wafer being sent to before the ensuing stage of semiconductor fabrication process, filter out these faulty circuit modules.As a result, saved the cost of encapsulation failure chip.

Can the built-in self slowdown monitoring circuit be arranged in the zone of drawing scribe line.Though traditional built-in self slowdown monitoring circuit possibly only detect the dc characteristics of open circuit, short circuit and active device; But because the dc characteristics of VCO is the radio-frequency performance key factor in the VCO predetermined restricted whether of confirming VCO, thus traditional built-in self slowdown monitoring circuit maybe be not abundant assessment VCO.As a result, although passed through the wafer-level test of open circuit, short circuit and dc characteristics, some VCO circuit possibly still can not be tested through last packaged chip.

Summary of the invention

In order to address the above problem; According to an aspect of the present invention, a kind of circuit is provided, has comprised: the radio frequency peak detector; Be configured to receive AC signal, and generate and the proportional D. C. value of AC signal at the output of radio frequency peak detector from voltage controlled oscillator; And buffer, between radio frequency peak detector and voltage controlled oscillator.

Wherein, the radio frequency peak detector comprises: n type metal oxide semiconductor (NMOS) transistor, move in weak inversion region; And first filter, be connected between the output of drain electrode end and radio frequency peak detector of nmos pass transistor.

Wherein, first filter is configured to: the minimum frequency that the cut-off frequency of first filter generates less than voltage controlled oscillator.

Wherein, the grid of nmos pass transistor is connected to the fixed voltage electromotive force.

Wherein, this circuit further comprises: second filter is connected in series with first filter; And blocking capacitor, between the drain electrode end of the input of radio frequency peak detector and nmos pass transistor.

Wherein, buffer comprises: p type metal oxide semiconductor (PMOS) transistor and the nmos pass transistor that are connected in series; And blocking capacitor, between the input and grid node of buffer, the grid node is connected to the grid of transistorized grid of PMOS and nmos pass transistor;

Wherein, voltage controlled oscillator is cross-coupled oscillator.

Wherein, voltage controlled oscillator is formed on the identical wafer with the radio frequency peak detector.

According to a further aspect in the invention, a kind of system is provided, has comprised: voltage controlled oscillator; Buffer has input, and input is connected to the output of voltage controlled oscillator; And the radio frequency peak detector, be configured to receive AC signal, and generate and the proportional D. C. value of AC signal at the output of radio frequency peak detector from voltage controlled oscillator.

Wherein, voltage controlled oscillator is the interconnection oscillator, comprising: the L-C accumulator is formed by first inductor, second inductor and capacitor; Cross-coupled transistor is right, and wherein, the grid of the first transistor of pair of transistors is connected to the drain electrode of the right transistor seconds of transistor, and the grid of transistor seconds is connected to the drain electrode of the first transistor; And bias current sources, be connected cross-coupled transistor to and ground between.

Wherein, buffer is configured to voltage controlled oscillator and radio frequency peak detector are isolated.

Wherein, the radio frequency peak detector comprises: n type metal oxide semiconductor (NMOS) transistor, move in weak inversion region; First filter is connected to the drain electrode end of nmos pass transistor; And second filter, be connected between the output of first filter and radio frequency peak detector.

Wherein, the cut-off frequency of first filter and second filter is less than the minimum frequency of voltage controlled oscillator generation.

Wherein, the radio frequency peak detector comprises: blocking capacitor, and between the input of the output of buffer and radio frequency peak detector.

Wherein, voltage controlled oscillator, buffer and radio frequency peak detector are formed on the same wafer.

In accordance with a further aspect of the present invention, a kind of method is provided, has comprised: receive AC signal from voltage controlled oscillator via buffer; Detect the peak value of AC signal; And peak value is transformed to D. C. value at the output of radio frequency peak detector.

This method further comprises: the transistorized grid of n type metal oxide semiconductor (NMOS) is connected to fixed voltage; Drain electrode place at nmos pass transistor generates DC component and alternating current component; The a plurality of filters that connect between the drain electrode through being employed in nmos pass transistor and the output of radio frequency peak detector are removed alternating current components; And generate and from the proportional D. C. value of amplitude of the AC signal of voltage controlled oscillator.

This method further comprises: buffer is arranged between voltage controlled oscillator and the radio frequency peak detector.

Wherein, the radio frequency peak detector is configured so that:

When the voltage controlled oscillator true(-)running, the output of radio frequency peak detector generates and the proportional D. C. value of amplitude from the AC signal of voltage controlled oscillator; And

When voltage controlled oscillator can not generate AC signal, the output of radio frequency peak detector was in 0 volt.

This method further comprises: on same wafer, form voltage controlled oscillator, buffer and radio frequency peak detector.

Description of drawings

In order to understand embodiment and advantage thereof better, will combine following description that accompanying drawing carries out as a reference now, wherein:

Fig. 1 shows the block diagram of built-in self slowdown monitoring circuit that is used to detect voltage controlled oscillator according to embodiment;

Fig. 2 shows the concrete schematic diagram at the built-in self slowdown monitoring circuit shown in Fig. 1;

Fig. 3 A-Fig. 3 C shows the built-in self slowdown monitoring circuit that is used to test the VCO that generates the 5.2GHz signal; And

Fig. 4 A-Fig. 4 C shows the concrete simulation result of the built-in self slowdown monitoring circuit shown in Fig. 3 A.

Except as otherwise noted, otherwise respective digital in different accompanying drawings and label are commonly referred to as corresponding component.For the clear related fields that each embodiment is shown are drawn accompanying drawing, but be not necessarily to scale.

Embodiment

Below, go through the manufacturing and the use of the preferred embodiment of the present invention.Yet, should be appreciated that, the invention provides many applicable inventive concepts that can in various concrete environment, realize.The specific embodiment of being discussed only illustrates manufacturing and uses concrete mode of the present invention, and is not used in restriction scope of the present invention.

In concrete context, describing the present invention, will be transformed to D. C. value from the amplitude of the AC signal of cross-coupled voltage controlled oscillator based on the peak detector of single transistor about preferred embodiment.Yet, can also apply the present invention to the AC signal amplitude is transformed to D. C. value according to the topological structure of various peak detectors.

At first, with reference to Fig. 1, show the block diagram of the built-in self slowdown monitoring circuit that is used to test voltage controlled oscillator (VCO) according to embodiment.In wafer, possibly have a plurality of VCO circuit, for example, at the VCO shown in Fig. 1 102.In order to test the AC characteristic of VCO 102, preferably, in identical wafer, set up radio frequency (RF) peak detector 106, and this peak detector is connected to the output of VCO 102 via buffer 104.RF peak detector 106 is configured to: when VCO 102 generated AC signal, RF peak detector 106 detected the amplitude of AC signal, and the proportional direct current output of the amplitude of generation and AC signal.The concrete operations of RF peak detector 106 hereinafter, will be described with reference to Fig. 2.On the other hand, when VCO 102 can not generate AC signal, the output of RF peak detector 106 was in 0 volt.Having the favorable characteristics that detects the RF peak detector on the sheet certainly is before encapsulation, to discern fault VCO, thereby in the later step of semiconductor fabrication process, reduces unnecessary time and cost.

Fig. 2 shows the concrete schematic diagram of the built-in self slowdown monitoring circuit shown in Fig. 1.According to embodiment, cross-coupled VCO is used to illustrate the inventive aspect of various embodiment.Cross-coupled VCO 102 comprises: the first inductor L _P1, the second inductor L _P2, capacitor C _P, a pair of n channel-type metal-oxide semiconductor (MOS) (NMOS) transistor M1 and M2 and bias current sources I _BiasWith the first inductor L _P1With the second inductor L _P2Be connected to voltage potential VDD at one end, and be connected to capacitor C at other end place _PL-C accumulator (tank) is by the first inductor L _P1, the second inductor L _P2, and capacitor C _PForm, this accumulator further is connected to pair of NMOS transistors M1 and M2.Should be noted that inductor L _P1, L _P2, and capacitor C _PCan be respectively by collocation from the capacity effect of the inductive effect (effective) of the square region of wafer and nmos pass transistor such as the square spiral inductor.

Nmos pass transistor M1 and nmos pass transistor M2 are cross-connected to relative end.More specifically, the grid of nmos pass transistor M1 is connected to the drain electrode of nmos pass transistor M2, and the grid of nmos pass transistor M2 is connected to the drain electrode of nmos pass transistor M1.As shown in Figure 2, the drain electrode of nmos pass transistor M1 and M2 further is connected to the L-C accumulator, this accumulator is by inductor L _P2, L _P1, and capacitor C _PForm.The source electrode of nmos pass transistor M1 and M2 is linked together, and via bias current sources I _BiasGround connection.As be known in the art, cross-coupled VCO 102 is through fine setting (fine-tuning) capacitor C _PValue can have wideer tuning range.The operation principle of cross-coupled VCO is well-known in the art, and therefore, does not discuss among this paper.

Buffer 104 comprises: p channel-type metal-oxide semiconductor (MOS) (PMOS) the transistor M that is connected in series _PWith nmos pass transistor M _NMore specifically, with PMOS transistor M _PSource electrode be connected to voltage potential VDD, and with PMOS transistor M _PDrain electrode be connected to nmos pass transistor M _NDrain electrode.PMOS transistor M _PGrid and nmos pass transistor M _NGrid link together, and via first interpolar coupling (blocking) capacitor C _B1Further be connected to the output of cross-coupled VCO102.Buffer further comprises: two bias resistor R _B1And R _B2With the first bias resistor R _B1From bias potential V _B1Be connected to M _PAnd M _NGrid.With the second bias resistor R _B2Be connected two transistor M _PAnd M _NGrid and the drain electrode between.Buffer 104 is used to isolate cross-coupled VCO 102 and RF peak detector 106, thereby prevents that RF peak detector 106 and the operation of cross-coupled VCO 102 from making a difference.The operation principle of the buffer shown in Fig. 2 is well known in the art, and therefore, this paper does not discuss.Yet should be noted that can be through replacing the buffer shown in Fig. 2 with any circuit that RF peak detector 106 is isolated with VCO 102.For example, can be through being implemented in the isolation between VCO 102 and the RF peak detector 106 at interpolation differential pair between VCO 102 and the RF peak detector 106.

RF peak detector 106 comprises: at nmos pass transistor M3, the second blocking capacitor C of weak inversion (inversion) district operation _B2, first filter and second filter.Show the RF peak detector of the nmos pass transistor that is employed in the weak inversion region operation though should be noted that Fig. 2, the RF peak detector shown in Fig. 2 is merely instance, and this peak detector can't limit the scope of claim inadequately.Those of ordinary skill in the art should identify multiple variation, replacement and revise.For example, can replace RF peak detector 106 through any circuit that can the amplitude of AC signal be transformed to D. C. value.In addition, show two filters that are connected in series though should be noted that Fig. 2, single filter can be accomplished the function of removing unnecessary high-frequency signal and generating D. C. value at the output of RF peak detector 106.

Though possibly have the method for multiple realization RF peak detector, when on wafer, realizing the RF peak detector, have demand for simple and performance.As a result, the topological structure of preferred simple peak detector.RF peak detector 106 is formed by single nmos pass transistor, and therefore, is the preferred embodiment of the built-in self slowdown monitoring circuit that is used to realize VCO.Nmos pass transistor M3 has the fixed voltage of being connected to V _GGrid, this fixed voltage is enough little, make nmos pass transistor M3 biasing (bias) thus in weak inversion region, move.As as known in the art, can be illustrated in the drain current of the nmos pass transistor that moves in the weak inversion region through following exponential function:

$I_D=\frac{W}{L}{I}_{\mathrm{<figure-callout\; id="0"\; label="D"\; filenames="HSA00000607505800041.png,HSA00000607505800042.png"\; state="\{\{state\}\}">D</figure-callout>}0}\&CenterDot;e^{{\mathrm{qV}}_{\mathrm{GS}}/\mathrm{nkT}}\&CenterDot;(1-e^{-{\mathrm{qV}}_{\mathrm{DS}}/\mathrm{kT}})$

Wherein, W, L, I _D0, q, nkT are the constant of nmos pass transistor.Because the grid source of nmos pass transistor (grid is to source electrode, and gate-to-source) voltage is fixed, so can above equality further be reduced to following equality:

$I_D={\mathrm{<figure-callout\; id="1"\; label="K"\; filenames="HSA00000607505800061.png"\; state="\{\{state\}\}">K</figure-callout>}}_1\&CenterDot;(1-{\mathrm{<figure-callout\; id="2"\; label="e\; K"\; filenames="HSA00000607505800052.png"\; state="\{\{state\}\}">e</figure-callout>}}^{K_{}})$

Wherein, K1 and K2 are constant.According to Qin Le progression approximation method, can replace exponential function to simplify drain current through the first three items of utilizing Taylor series.As a result, can drain current be expressed as:

$I_D={\mathrm{<figure-callout\; id="1"\; label="K"\; filenames="HSA00000607505800061.png"\; state="\{\{state\}\}">K</figure-callout>}}_1\&CenterDot;({\mathrm{<figure-callout\; id="2"\; label="K"\; filenames="HSA00000607505800052.png"\; state="\{\{state\}\}">K</figure-callout>}}_2\&CenterDot;V_{\mathrm{DS}}+\frac{1}{2}\&CenterDot;{\mathrm{<figure-callout\; id="2"\; label="K"\; filenames="HSA00000607505800052.png"\; state="\{\{state\}\}">K</figure-callout>}}_2^2\&CenterDot;V_{\mathrm{DS}}^2)$

Wherein, the output from VCO 102 generates V _DSUse cosine function replacement V _DSAbove equality is expressed as:

$I_D={\mathrm{<figure-callout\; id="1"\; label="K"\; filenames="HSA00000607505800061.png"\; state="\{\{state\}\}">K</figure-callout>}}_1\&CenterDot;{\mathrm{<figure-callout\; id="2"\; label="K"\; filenames="HSA00000607505800052.png"\; state="\{\{state\}\}">K</figure-callout>}}_2\&CenterDot;\cos \left(\mathrm{\&omega;X}\right)+\frac{1}{4}\&CenterDot;{\mathrm{<figure-callout\; id="1"\; label="K"\; filenames="HSA00000607505800061.png"\; state="\{\{state\}\}">K</figure-callout>}}_1\&CenterDot;{\mathrm{<figure-callout\; id="2"\; label="K"\; filenames="HSA00000607505800052.png"\; state="\{\{state\}\}">K</figure-callout>}}_2^2\&CenterDot;(1+\cos \left(2\mathrm{\&omega;X}\right))$

From above equality, drain current comprises: with the proportional DC component of amplitude and the alternating current component of the input signal that is generated from VCO 102.As a result, nmos pass transistor 106 moves in weak inversion region, and this transistor can be transformed to proportional DC component of signal and the alternating current component that is generated with VCO 102 with ac input signal.Show nmos pass transistor though should be noted that Fig. 2 in the weak inversion region operation, can also be through implementing the RF peak detector at the PMOS transistor of weak inversion region operation.As as known in the art, for fear of repetition, this paper does not have to discuss the transistorized operation of PMOS that in weak inversion region, moves.

Fig. 2 further shows by R1 and formed first filter of C1 with by R2 and formed second filter of C2.The cut-off frequency of these two filters is far below the frequency of the AC signal that generates from VCO 102.As a result, remove high-frequency ac component, and DC component can pass through these two filters in output place of nmos pass transistor M3, and the output of arrival RF peak detector 106.Favorable characteristics with the nmos pass transistor that in weak inversion region, moves is: can be with being sent to the output of RF peak detector 106 with the proportional DC component of the output amplitude of VCO, and remove unnecessary alternating current component through the low pass filter shown in Fig. 2.

Fig. 3 A shows the built-in self slowdown monitoring circuit that is used to test the VCO that generates the 5.2GHz signal.When VCO 102 true(-)runnings and when generating the 5.2GHz signal, shown in Fig. 3 B, at the V of RF peak detector 106 _AThe frequency spectrum at place comprises: DC component and in the alternating current component at 5.2GHz place.In addition, first filter and second filter are removed the high-frequency ac component.Shown in Fig. 3 C, at V _BThe frequency spectrum at place only comprises the proportional DC component of amplitude of the 5.2GHz signal that generates with VCO 102.

Fig. 4 A-4C shows the concrete simulation result of the built-in self slowdown monitoring circuit shown in Fig. 3 A.According to embodiment, when VCO 102 was in the normal mode of operation that generates the 5.2GHz AC signal, simulation result showed, at V _APlace's DC component has the voltage potential of 0.37V, and the alternating current component at the 5.2GHz place has the amplitude of 0.60V.Otherwise when VCO 102 can not be created on the AC signal at 5.2GHz place, Fig. 4 B shows DC component and the alternating current component at the 5.2GHz place is 0 volt.Fig. 4 C has further provided the relation curve between the DC component value of output of amplitude and RF peak detector 106 of the AC signal that VCO 102 generates.For example, when VCO 102 generates the AC signal of the amplitude with 0.6V, be 0.4V in the respective straight flow valuve of the output of RF peak value detector 106.Another favorable characteristics that curve among Fig. 4 C shows the RF peak detector is: can be based on the amplitude of the D. C. value inverse (back calculate) of the output of RF peak detector 106 by the AC signal of VCO 102 generations.

Although described the present invention and advantage thereof in detail, should be appreciated that, can under the situation of purport of the present invention that does not deviate from the accompanying claims qualification and scope, make various change, replacement and change.

And the application's scope is not limited in the specific embodiment of technology, machine, manufacturing, material component, device, method and the step described in this specification.Should understand as those of ordinary skills; Through of the present invention open; Being used to of existing or exploitation from now on carries out and the essentially identical function of said corresponding embodiment that adopted according to the present invention or technology, machine, the manufacturing that obtains basic identical result, and material component, device, method or step can be used according to the present invention.Therefore, accompanying claims should be included in the scope of such technology, machine, manufacturing, material component, device, method or step.

Claims (10)

1. circuit comprises:

The radio frequency peak detector is configured to receive AC signal from voltage controlled oscillator, and generates and the proportional D. C. value of said AC signal at the output of said radio frequency peak detector; And

Buffer is between said radio frequency peak detector and said voltage controlled oscillator.

2. circuit according to claim 1, wherein, said radio frequency peak detector comprises:

N type metal oxide semiconductor (NMOS) transistor moves in weak inversion region; And

First filter is connected between the said output of drain electrode end and said radio frequency peak detector of said nmos pass transistor.

3. circuit according to claim 2, wherein, said first filter is configured to: the minimum frequency that the cut-off frequency of said first filter generates less than said voltage controlled oscillator.

4. circuit according to claim 2, wherein, the grid of said nmos pass transistor is connected to the fixed voltage electromotive force.

5. circuit according to claim 2 wherein, further comprises:

Second filter is connected in series with said first filter; And

Blocking capacitor is between the said drain electrode end of the input of said radio frequency peak detector and said nmos pass transistor.

6. circuit according to claim 1, wherein, said buffer comprises:

P type metal oxide semiconductor (PMOS) transistor and the nmos pass transistor that are connected in series; And

Blocking capacitor, between the input and grid node of said buffer, said grid node is connected to the grid of transistorized grid of said PMOS and said nmos pass transistor;

7. circuit according to claim 1, wherein, said voltage controlled oscillator is cross-coupled oscillator.

8. circuit according to claim 1, wherein, said voltage controlled oscillator is formed on the identical wafer with said radio frequency peak detector.

9. system comprises:

Voltage controlled oscillator;

Buffer has input, and said input is connected to the output of said voltage controlled oscillator; And

The radio frequency peak detector is configured to receive the AC signal from said voltage controlled oscillator, and generates and the proportional D. C. value of said AC signal at the output of said radio frequency peak detector.

10. method comprises:

Receive AC signal via buffer from voltage controlled oscillator;

Detect the peak value of said AC signal; And

Output at the radio frequency peak detector is transformed to D. C. value with said peak value.

Images